xref: /freebsd/sys/arm/ti/clk/ti_mux_clock.c (revision b3e7694832e81d7a904a10f525f8797b753bf0d3)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
3  *
4  * Copyright (c) 2020 Oskar Holmlund <oskar.holmlund@ohdata.se>
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
20  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
21  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
22  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
23  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  */
27 
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
30 
31 #include <sys/param.h>
32 #include <sys/conf.h>
33 #include <sys/bus.h>
34 #include <sys/kernel.h>
35 #include <sys/module.h>
36 #include <sys/systm.h>
37 #include <sys/libkern.h>
38 #include <sys/types.h>
39 #include <sys/malloc.h>
40 
41 #include <machine/bus.h>
42 #include <dev/fdt/simplebus.h>
43 
44 #include <dev/extres/clk/clk_mux.h>
45 #include <dev/ofw/ofw_bus.h>
46 #include <dev/ofw/ofw_bus_subr.h>
47 
48 #include "clock_common.h"
49 
50 #if 0
51 #define DPRINTF(dev, msg...) device_printf(dev, msg)
52 #else
53 #define DPRINTF(dev, msg...)
54 #endif
55 
56 /*
57  * Devicetree description
58  * Documentation/devicetree/bindings/clock/ti/mux.txt
59  */
60 
61 struct ti_mux_softc {
62 	device_t		sc_dev;
63 	bool			attach_done;
64 
65 	struct clk_mux_def	mux_def;
66 	struct clock_cell_info	clock_cell;
67 	struct clkdom 		*clkdom;
68 };
69 
70 static int ti_mux_probe(device_t dev);
71 static int ti_mux_attach(device_t dev);
72 static int ti_mux_detach(device_t dev);
73 
74 #define TI_MUX_CLOCK			2
75 #define TI_COMPOSITE_MUX_CLOCK		1
76 #define TI_MUX_END			0
77 
78 static struct ofw_compat_data compat_data[] = {
79 	{ "ti,mux-clock",		TI_MUX_CLOCK },
80 	{ "ti,composite-mux-clock",	TI_COMPOSITE_MUX_CLOCK },
81 	{ NULL,				TI_MUX_END }
82 };
83 
84 static int
85 ti_mux_probe(device_t dev)
86 {
87 	if (!ofw_bus_status_okay(dev))
88 		return (ENXIO);
89 
90 	if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
91 		return (ENXIO);
92 
93 	device_set_desc(dev, "TI Mux Clock");
94 
95 	return (BUS_PROBE_DEFAULT);
96 }
97 
98 static int
99 register_clk(struct ti_mux_softc *sc) {
100 	int err;
101 
102 	sc->clkdom = clkdom_create(sc->sc_dev);
103 	if (sc->clkdom == NULL) {
104 		DPRINTF(sc->sc_dev, "Failed to create clkdom\n");
105 		return ENXIO;
106 	}
107 
108 	err = clknode_mux_register(sc->clkdom, &sc->mux_def);
109 	if (err) {
110 		DPRINTF(sc->sc_dev, "clknode_mux_register failed %x\n", err);
111 		return ENXIO;
112 	}
113 
114 	err = clkdom_finit(sc->clkdom);
115 	if (err) {
116 		DPRINTF(sc->sc_dev, "Clk domain finit fails %x.\n", err);
117 		return ENXIO;
118 	}
119 
120 	return 0;
121 }
122 
123 static int
124 ti_mux_attach(device_t dev)
125 {
126 	struct ti_mux_softc *sc;
127 	phandle_t node;
128 	int err;
129 	cell_t value;
130 
131 	sc = device_get_softc(dev);
132 	sc->sc_dev = dev;
133 	node = ofw_bus_get_node(dev);
134 
135 	/* Grab the content of reg properties */
136 	OF_getencprop(node, "reg", &value, sizeof(value));
137 	sc->mux_def.offset = value;
138 
139 	if (OF_hasprop(node, "ti,bit-shift")) {
140 		OF_getencprop(node, "ti,bit-shift", &value, sizeof(value));
141 		sc->mux_def.shift = value;
142 		DPRINTF(sc->sc_dev, "ti,bit-shift => shift %x\n", sc->mux_def.shift);
143 	}
144 	if (OF_hasprop(node, "ti,index-starts-at-one")) {
145 		/* FIXME: Add support in dev/extres/clk */
146 		/*sc->mux_def.mux_flags =  ... */
147 		device_printf(sc->sc_dev, "ti,index-starts-at-one - Not implemented\n");
148 	}
149 
150 	if (OF_hasprop(node, "ti,set-rate-parent"))
151 		device_printf(sc->sc_dev, "ti,set-rate-parent - Not implemented\n");
152 	if (OF_hasprop(node, "ti,latch-bit"))
153 		device_printf(sc->sc_dev, "ti,latch-bit - Not implemented\n");
154 
155 	read_clock_cells(sc->sc_dev, &sc->clock_cell);
156 
157 	create_clkdef(sc->sc_dev, &sc->clock_cell, &sc->mux_def.clkdef);
158 
159 	/* Figure out the width from ti_max_div */
160 	if (sc->mux_def.mux_flags)
161 		sc->mux_def.width = fls(sc->clock_cell.num_real_clocks-1);
162 	else
163 		sc->mux_def.width = fls(sc->clock_cell.num_real_clocks);
164 
165 	DPRINTF(sc->sc_dev, "sc->clock_cell.num_real_clocks %x def.width %x\n",
166 		sc->clock_cell.num_real_clocks, sc->mux_def.width);
167 
168 	err = find_parent_clock_names(sc->sc_dev, &sc->clock_cell, &sc->mux_def.clkdef);
169 
170 	if (err) {
171 		/* free_clkdef will be called in ti_mux_new_pass */
172 		DPRINTF(sc->sc_dev, "find_parent_clock_names failed\n");
173 		return (bus_generic_attach(sc->sc_dev));
174 	}
175 
176 	err = register_clk(sc);
177 
178 	if (err) {
179 		/* free_clkdef will be called in ti_mux_new_pass */
180 		DPRINTF(sc->sc_dev, "register_clk failed\n");
181 		return (bus_generic_attach(sc->sc_dev));
182 	}
183 
184 	sc->attach_done = true;
185 
186 	free_clkdef(&sc->mux_def.clkdef);
187 
188 	return (bus_generic_attach(sc->sc_dev));
189 }
190 
191 static void
192 ti_mux_new_pass(device_t dev)
193 {
194 	struct ti_mux_softc *sc;
195 	int err;
196 
197 	sc = device_get_softc(dev);
198 
199 	if (sc->attach_done) {
200 		return;
201 	}
202 
203 	err = find_parent_clock_names(sc->sc_dev, &sc->clock_cell, &sc->mux_def.clkdef);
204 	if (err) {
205 		/* free_clkdef will be called in later call to ti_mux_new_pass */
206 		DPRINTF(sc->sc_dev, "ti_mux_new_pass find_parent_clock_names failed\n");
207 		return;
208 	}
209 
210 	err = register_clk(sc);
211 	if (err) {
212 		/* free_clkdef will be called in later call to ti_mux_new_pass */
213 		DPRINTF(sc->sc_dev, "ti_mux_new_pass register_clk failed\n");
214 		return;
215 	}
216 
217 	sc->attach_done = true;
218 
219 	free_clkdef(&sc->mux_def.clkdef);
220 }
221 
222 static int
223 ti_mux_detach(device_t dev)
224 {
225 	return (EBUSY);
226 }
227 
228 static device_method_t ti_mux_methods[] = {
229 	/* Device interface */
230 	DEVMETHOD(device_probe,		ti_mux_probe),
231 	DEVMETHOD(device_attach,	ti_mux_attach),
232 	DEVMETHOD(device_detach,	ti_mux_detach),
233 
234 	/* Bus interface */
235 	DEVMETHOD(bus_new_pass,		ti_mux_new_pass),
236 
237 	DEVMETHOD_END
238 };
239 
240 DEFINE_CLASS_0(ti_mux, ti_mux_driver, ti_mux_methods,
241 	sizeof(struct ti_mux_softc));
242 
243 EARLY_DRIVER_MODULE(ti_mux, simplebus, ti_mux_driver, 0, 0,
244     BUS_PASS_BUS + BUS_PASS_ORDER_MIDDLE);
245 MODULE_VERSION(ti_mux, 1);
246