1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2020 Oskar Holmlund <oskar.holmlund@ohdata.se> 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 20 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 21 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 22 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 23 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 * $FreeBSD$ 28 */ 29 30 #include <sys/cdefs.h> 31 __FBSDID("$FreeBSD$"); 32 33 #include <sys/param.h> 34 #include <sys/conf.h> 35 #include <sys/bus.h> 36 #include <sys/kernel.h> 37 #include <sys/module.h> 38 #include <sys/systm.h> 39 #include <sys/libkern.h> 40 41 #include <machine/bus.h> 42 #include <dev/fdt/simplebus.h> 43 44 #include <dev/extres/clk/clk_div.h> 45 #include <dev/ofw/ofw_bus.h> 46 #include <dev/ofw/ofw_bus_subr.h> 47 48 #include "clock_common.h" 49 50 #if 0 51 #define DPRINTF(dev, msg...) device_printf(dev, msg) 52 #else 53 #define DPRINTF(dev, msg...) 54 #endif 55 56 /* 57 * Devicetree description 58 * Documentation/devicetree/bindings/clock/ti/divider.txt 59 */ 60 61 struct ti_divider_softc { 62 device_t sc_dev; 63 bool attach_done; 64 struct clk_div_def div_def; 65 66 struct clock_cell_info clock_cell; 67 struct clkdom *clkdom; 68 }; 69 70 static int ti_divider_probe(device_t dev); 71 static int ti_divider_attach(device_t dev); 72 static int ti_divider_detach(device_t dev); 73 74 #define TI_DIVIDER_CLOCK 2 75 #define TI_COMPOSITE_DIVIDER_CLOCK 1 76 #define TI_DIVIDER_END 0 77 78 static struct ofw_compat_data compat_data[] = { 79 { "ti,divider-clock", TI_DIVIDER_CLOCK }, 80 { "ti,composite-divider-clock", TI_COMPOSITE_DIVIDER_CLOCK }, 81 { NULL, TI_DIVIDER_END } 82 }; 83 84 static int 85 register_clk(struct ti_divider_softc *sc) { 86 int err; 87 88 sc->clkdom = clkdom_create(sc->sc_dev); 89 if (sc->clkdom == NULL) { 90 DPRINTF(sc->sc_dev, "Failed to create clkdom\n"); 91 return (ENXIO); 92 } 93 94 err = clknode_div_register(sc->clkdom, &sc->div_def); 95 if (err) { 96 DPRINTF(sc->sc_dev, "clknode_div_register failed %x\n", err); 97 return (ENXIO); 98 } 99 100 err = clkdom_finit(sc->clkdom); 101 if (err) { 102 DPRINTF(sc->sc_dev, "Clk domain finit fails %x.\n", err); 103 return (ENXIO); 104 } 105 106 return (0); 107 } 108 109 static int 110 ti_divider_probe(device_t dev) 111 { 112 if (!ofw_bus_status_okay(dev)) 113 return (ENXIO); 114 115 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) 116 return (ENXIO); 117 118 device_set_desc(dev, "TI Divider Clock"); 119 120 return (BUS_PROBE_DEFAULT); 121 } 122 123 static int 124 ti_divider_attach(device_t dev) 125 { 126 struct ti_divider_softc *sc; 127 phandle_t node; 128 int err; 129 cell_t value; 130 uint32_t ti_max_div; 131 132 sc = device_get_softc(dev); 133 sc->sc_dev = dev; 134 node = ofw_bus_get_node(dev); 135 136 /* Grab the content of reg properties */ 137 OF_getencprop(node, "reg", &value, sizeof(value)); 138 sc->div_def.offset = value; 139 140 if (OF_hasprop(node, "ti,bit-shift")) { 141 OF_getencprop(node, "ti,bit-shift", &value, sizeof(value)); 142 sc->div_def.i_shift = value; 143 } 144 145 if (OF_hasprop(node, "ti,index-starts-at-one")) { 146 sc->div_def.div_flags = CLK_DIV_ZERO_BASED; 147 } 148 149 if (OF_hasprop(node, "ti,index-power-of-two")) { 150 /* FIXME: later */ 151 device_printf(sc->sc_dev, "ti,index-power-of-two - Not implemented\n"); 152 /* remember to update i_width a few lines below */ 153 } 154 if (OF_hasprop(node, "ti,max-div")) { 155 OF_getencprop(node, "ti,max-div", &value, sizeof(value)); 156 ti_max_div = value; 157 } 158 159 if (OF_hasprop(node, "clock-output-names")) 160 device_printf(sc->sc_dev, "clock-output-names\n"); 161 if (OF_hasprop(node, "ti,dividers")) 162 device_printf(sc->sc_dev, "ti,dividers\n"); 163 if (OF_hasprop(node, "ti,min-div")) 164 device_printf(sc->sc_dev, "ti,min-div - Not implemented\n"); 165 166 if (OF_hasprop(node, "ti,autoidle-shift")) 167 device_printf(sc->sc_dev, "ti,autoidle-shift - Not implemented\n"); 168 if (OF_hasprop(node, "ti,set-rate-parent")) 169 device_printf(sc->sc_dev, "ti,set-rate-parent - Not implemented\n"); 170 if (OF_hasprop(node, "ti,latch-bit")) 171 device_printf(sc->sc_dev, "ti,latch-bit - Not implemented\n"); 172 173 /* Figure out the width from ti_max_div */ 174 if (sc->div_def.div_flags) 175 sc->div_def.i_width = fls(ti_max_div-1); 176 else 177 sc->div_def.i_width = fls(ti_max_div); 178 179 DPRINTF(sc->sc_dev, "div_def.i_width %x\n", sc->div_def.i_width); 180 181 read_clock_cells(sc->sc_dev, &sc->clock_cell); 182 183 create_clkdef(sc->sc_dev, &sc->clock_cell, &sc->div_def.clkdef); 184 185 err = find_parent_clock_names(sc->sc_dev, &sc->clock_cell, &sc->div_def.clkdef); 186 187 if (err) { 188 /* free_clkdef will be called in ti_divider_new_pass */ 189 DPRINTF(sc->sc_dev, "find_parent_clock_names failed\n"); 190 return (bus_generic_attach(sc->sc_dev)); 191 } 192 193 err = register_clk(sc); 194 195 if (err) { 196 /* free_clkdef will be called in ti_divider_new_pass */ 197 DPRINTF(sc->sc_dev, "register_clk failed\n"); 198 return (bus_generic_attach(sc->sc_dev)); 199 } 200 201 sc->attach_done = true; 202 203 free_clkdef(&sc->div_def.clkdef); 204 205 return (bus_generic_attach(sc->sc_dev)); 206 } 207 208 static int 209 ti_divider_detach(device_t dev) 210 { 211 return (EBUSY); 212 } 213 214 static void 215 ti_divider_new_pass(device_t dev) 216 { 217 struct ti_divider_softc *sc; 218 int err; 219 220 sc = device_get_softc(dev); 221 222 if (sc->attach_done) { 223 return; 224 } 225 226 err = find_parent_clock_names(sc->sc_dev, &sc->clock_cell, &sc->div_def.clkdef); 227 if (err) { 228 /* free_clkdef will be called in a later call to ti_divider_new_pass */ 229 DPRINTF(sc->sc_dev, "new_pass find_parent_clock_names failed\n"); 230 return; 231 } 232 233 err = register_clk(sc); 234 if (err) { 235 /* free_clkdef will be called in a later call to ti_divider_new_pass */ 236 DPRINTF(sc->sc_dev, "new_pass register_clk failed\n"); 237 return; 238 } 239 240 sc->attach_done = true; 241 242 free_clkdef(&sc->div_def.clkdef); 243 } 244 245 static device_method_t ti_divider_methods[] = { 246 /* Device interface */ 247 DEVMETHOD(device_probe, ti_divider_probe), 248 DEVMETHOD(device_attach, ti_divider_attach), 249 DEVMETHOD(device_detach, ti_divider_detach), 250 251 /* Bus interface */ 252 DEVMETHOD(bus_new_pass, ti_divider_new_pass), 253 254 DEVMETHOD_END 255 }; 256 257 DEFINE_CLASS_0(ti_divider, ti_divider_driver, ti_divider_methods, 258 sizeof(struct ti_divider_softc)); 259 260 EARLY_DRIVER_MODULE(ti_divider, simplebus, ti_divider_driver, 0, 0, 261 BUS_PASS_BUS + BUS_PASS_ORDER_MIDDLE); 262 MODULE_VERSION(ti_divider, 1); 263