1 /*- 2 * Copyright (c) 2012 Damjan Marion <dmarion@Freebsd.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __FBSDID("$FreeBSD$"); 29 /* 30 * TPS65217 PMIC companion chip for AM335x SoC sitting on I2C bus 31 */ 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/eventhandler.h> 35 #include <sys/kernel.h> 36 #include <sys/module.h> 37 #include <sys/clock.h> 38 #include <sys/time.h> 39 #include <sys/bus.h> 40 #include <sys/proc.h> 41 #include <sys/reboot.h> 42 #include <sys/resource.h> 43 #include <sys/rman.h> 44 45 #include <dev/iicbus/iicbus.h> 46 #include <dev/iicbus/iiconf.h> 47 48 #include <dev/ofw/openfirm.h> 49 #include <dev/ofw/ofw_bus.h> 50 #include <dev/ofw/ofw_bus_subr.h> 51 52 #include <arm/ti/am335x/am335x_rtcvar.h> 53 54 #include "iicbus_if.h" 55 56 #define TPS65217A 0x7 57 #define TPS65217B 0xF 58 #define TPS65217C 0xE 59 #define TPS65217D 0x6 60 61 /* TPS65217 Reisters */ 62 #define TPS65217_CHIPID_REG 0x00 63 #define TPS65217_INT_REG 0x02 64 #define TPS65217_INT_PBM (1U << 6) 65 #define TPS65217_INT_ACM (1U << 5) 66 #define TPS65217_INT_USBM (1U << 4) 67 #define TPS65217_INT_PBI (1U << 2) 68 #define TPS65217_INT_ACI (1U << 1) 69 #define TPS65217_INT_USBI (1U << 0) 70 71 #define TPS65217_STATUS_REG 0x0A 72 #define TPS65217_STATUS_OFF (1U << 7) 73 #define TPS65217_STATUS_ACPWR (1U << 3) 74 #define TPS65217_STATUS_USBPWR (1U << 2) 75 #define TPS65217_STATUS_BT (1U << 0) 76 77 #define MAX_IIC_DATA_SIZE 2 78 79 80 struct am335x_pmic_softc { 81 device_t sc_dev; 82 uint32_t sc_addr; 83 struct intr_config_hook enum_hook; 84 struct resource *sc_irq_res; 85 void *sc_intrhand; 86 }; 87 88 static void am335x_pmic_shutdown(void *, int); 89 90 static int 91 am335x_pmic_read(device_t dev, uint8_t addr, uint8_t *data, uint8_t size) 92 { 93 struct am335x_pmic_softc *sc = device_get_softc(dev); 94 struct iic_msg msg[] = { 95 { sc->sc_addr, IIC_M_WR, 1, &addr }, 96 { sc->sc_addr, IIC_M_RD, size, data }, 97 }; 98 return (iicbus_transfer(dev, msg, 2)); 99 } 100 101 static int 102 am335x_pmic_write(device_t dev, uint8_t address, uint8_t *data, uint8_t size) 103 { 104 uint8_t buffer[MAX_IIC_DATA_SIZE + 1]; 105 struct am335x_pmic_softc *sc = device_get_softc(dev); 106 struct iic_msg msg[] = { 107 { sc->sc_addr, IIC_M_WR, size + 1, buffer }, 108 }; 109 110 if (size > MAX_IIC_DATA_SIZE) 111 return (ENOMEM); 112 113 buffer[0] = address; 114 memcpy(buffer + 1, data, size); 115 116 return (iicbus_transfer(dev, msg, 1)); 117 } 118 119 static void 120 am335x_pmic_intr(void *arg) 121 { 122 struct am335x_pmic_softc *sc = (struct am335x_pmic_softc *)arg; 123 uint8_t int_reg, status_reg; 124 int rv; 125 char notify_buf[16]; 126 127 THREAD_SLEEPING_OK(); 128 rv = am335x_pmic_read(sc->sc_dev, TPS65217_INT_REG, &int_reg, 1); 129 if (rv != 0) { 130 device_printf(sc->sc_dev, "Cannot read interrupt register\n"); 131 THREAD_NO_SLEEPING(); 132 return; 133 } 134 rv = am335x_pmic_read(sc->sc_dev, TPS65217_STATUS_REG, &status_reg, 1); 135 if (rv != 0) { 136 device_printf(sc->sc_dev, "Cannot read status register\n"); 137 THREAD_NO_SLEEPING(); 138 return; 139 } 140 THREAD_NO_SLEEPING(); 141 142 if ((int_reg & TPS65217_INT_PBI) && (status_reg & TPS65217_STATUS_BT)) 143 shutdown_nice(RB_POWEROFF); 144 if (int_reg & TPS65217_INT_ACI) { 145 snprintf(notify_buf, sizeof(notify_buf), "notify=0x%02x", 146 (status_reg & TPS65217_STATUS_ACPWR) ? 1 : 0); 147 devctl_notify_f("ACPI", "ACAD", "power", notify_buf, M_NOWAIT); 148 } 149 } 150 151 static int 152 am335x_pmic_probe(device_t dev) 153 { 154 struct am335x_pmic_softc *sc; 155 156 if (!ofw_bus_is_compatible(dev, "ti,tps65217")) 157 return (ENXIO); 158 159 sc = device_get_softc(dev); 160 sc->sc_dev = dev; 161 /* Convert to 8-bit addressing */ 162 sc->sc_addr = iicbus_get_addr(dev) << 1; 163 164 device_set_desc(dev, "TI TPS65217 Power Management IC"); 165 166 return (0); 167 } 168 169 static void 170 am335x_pmic_start(void *xdev) 171 { 172 struct am335x_pmic_softc *sc; 173 device_t dev = (device_t)xdev; 174 uint8_t reg; 175 char name[20]; 176 char pwr[4][11] = {"Unknown", "USB", "AC", "USB and AC"}; 177 int rv; 178 179 sc = device_get_softc(dev); 180 181 am335x_pmic_read(dev, TPS65217_CHIPID_REG, ®, 1); 182 switch (reg>>4) { 183 case TPS65217A: 184 sprintf(name, "TPS65217A ver 1.%u", reg & 0xF); 185 break; 186 case TPS65217B: 187 sprintf(name, "TPS65217B ver 1.%u", reg & 0xF); 188 break; 189 case TPS65217C: 190 sprintf(name, "TPS65217C ver 1.%u", reg & 0xF); 191 break; 192 case TPS65217D: 193 sprintf(name, "TPS65217D ver 1.%u", reg & 0xF); 194 break; 195 default: 196 sprintf(name, "Unknown PMIC"); 197 } 198 199 am335x_pmic_read(dev, TPS65217_STATUS_REG, ®, 1); 200 device_printf(dev, "%s powered by %s\n", name, pwr[(reg>>2)&0x03]); 201 202 EVENTHANDLER_REGISTER(shutdown_final, am335x_pmic_shutdown, dev, 203 SHUTDOWN_PRI_LAST); 204 205 config_intrhook_disestablish(&sc->enum_hook); 206 207 /* Unmask all interrupts and clear pending status */ 208 reg = 0; 209 am335x_pmic_write(dev, TPS65217_INT_REG, ®, 1); 210 am335x_pmic_read(dev, TPS65217_INT_REG, ®, 1); 211 212 if (sc->sc_irq_res != NULL) { 213 rv = bus_setup_intr(dev, sc->sc_irq_res, 214 INTR_TYPE_MISC | INTR_MPSAFE, NULL, am335x_pmic_intr, 215 sc, &sc->sc_intrhand); 216 if (rv != 0) 217 device_printf(dev, 218 "Unable to setup the irq handler.\n"); 219 } 220 } 221 222 static int 223 am335x_pmic_attach(device_t dev) 224 { 225 struct am335x_pmic_softc *sc; 226 int rid; 227 228 sc = device_get_softc(dev); 229 230 rid = 0; 231 sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 232 RF_ACTIVE); 233 if (!sc->sc_irq_res) { 234 device_printf(dev, "cannot allocate interrupt\n"); 235 /* return (ENXIO); */ 236 } 237 238 sc->enum_hook.ich_func = am335x_pmic_start; 239 sc->enum_hook.ich_arg = dev; 240 241 if (config_intrhook_establish(&sc->enum_hook) != 0) 242 return (ENOMEM); 243 244 return (0); 245 } 246 247 static void 248 am335x_pmic_shutdown(void *xdev, int howto) 249 { 250 device_t dev; 251 uint8_t reg; 252 253 if (!(howto & RB_POWEROFF)) 254 return; 255 dev = (device_t)xdev; 256 /* Set the OFF bit on status register to start the shutdown sequence. */ 257 reg = TPS65217_STATUS_OFF; 258 am335x_pmic_write(dev, TPS65217_STATUS_REG, ®, 1); 259 /* Toggle pmic_pwr_enable to shutdown the PMIC. */ 260 am335x_rtc_pmic_pwr_toggle(); 261 } 262 263 static device_method_t am335x_pmic_methods[] = { 264 DEVMETHOD(device_probe, am335x_pmic_probe), 265 DEVMETHOD(device_attach, am335x_pmic_attach), 266 {0, 0}, 267 }; 268 269 static driver_t am335x_pmic_driver = { 270 "am335x_pmic", 271 am335x_pmic_methods, 272 sizeof(struct am335x_pmic_softc), 273 }; 274 275 static devclass_t am335x_pmic_devclass; 276 277 DRIVER_MODULE(am335x_pmic, iicbus, am335x_pmic_driver, am335x_pmic_devclass, 0, 0); 278 MODULE_VERSION(am335x_pmic, 1); 279 MODULE_DEPEND(am335x_pmic, iicbus, 1, 1, 1); 280