1 /*- 2 * Copyright 2013 Oleksandr Tymoshenko <gonzo@freebsd.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __FBSDID("$FreeBSD$"); 29 30 #include "opt_syscons.h" 31 #include <sys/param.h> 32 #include <sys/systm.h> 33 #include <sys/kernel.h> 34 #include <sys/module.h> 35 #include <sys/clock.h> 36 #include <sys/time.h> 37 #include <sys/bus.h> 38 #include <sys/lock.h> 39 #include <sys/mutex.h> 40 #include <sys/resource.h> 41 #include <sys/rman.h> 42 #include <sys/sysctl.h> 43 #include <vm/vm.h> 44 #include <vm/pmap.h> 45 #include <sys/fbio.h> 46 #include <sys/consio.h> 47 48 #include <machine/bus.h> 49 50 #include <dev/fdt/fdt_common.h> 51 #include <dev/ofw/openfirm.h> 52 #include <dev/ofw/ofw_bus.h> 53 #include <dev/ofw/ofw_bus_subr.h> 54 55 #include <dev/videomode/videomode.h> 56 #include <dev/videomode/edidvar.h> 57 58 #include <dev/fb/fbreg.h> 59 #ifdef DEV_SC 60 #include <dev/syscons/syscons.h> 61 #else /* VT */ 62 #include <dev/vt/vt.h> 63 #endif 64 65 #include <arm/ti/ti_prcm.h> 66 #include <arm/ti/ti_scm.h> 67 68 #include "am335x_lcd.h" 69 #include "am335x_pwm.h" 70 71 #include "fb_if.h" 72 #include "hdmi_if.h" 73 74 #define LCD_PID 0x00 75 #define LCD_CTRL 0x04 76 #define CTRL_DIV_MASK 0xff 77 #define CTRL_DIV_SHIFT 8 78 #define CTRL_AUTO_UFLOW_RESTART (1 << 1) 79 #define CTRL_RASTER_MODE 1 80 #define CTRL_LIDD_MODE 0 81 #define LCD_LIDD_CTRL 0x0C 82 #define LCD_LIDD_CS0_CONF 0x10 83 #define LCD_LIDD_CS0_ADDR 0x14 84 #define LCD_LIDD_CS0_DATA 0x18 85 #define LCD_LIDD_CS1_CONF 0x1C 86 #define LCD_LIDD_CS1_ADDR 0x20 87 #define LCD_LIDD_CS1_DATA 0x24 88 #define LCD_RASTER_CTRL 0x28 89 #define RASTER_CTRL_TFT24_UNPACKED (1 << 26) 90 #define RASTER_CTRL_TFT24 (1 << 25) 91 #define RASTER_CTRL_STN565 (1 << 24) 92 #define RASTER_CTRL_TFTPMAP (1 << 23) 93 #define RASTER_CTRL_NIBMODE (1 << 22) 94 #define RASTER_CTRL_PALMODE_SHIFT 20 95 #define PALETTE_PALETTE_AND_DATA 0x00 96 #define PALETTE_PALETTE_ONLY 0x01 97 #define PALETTE_DATA_ONLY 0x02 98 #define RASTER_CTRL_REQDLY_SHIFT 12 99 #define RASTER_CTRL_MONO8B (1 << 9) 100 #define RASTER_CTRL_RBORDER (1 << 8) 101 #define RASTER_CTRL_LCDTFT (1 << 7) 102 #define RASTER_CTRL_LCDBW (1 << 1) 103 #define RASTER_CTRL_LCDEN (1 << 0) 104 #define LCD_RASTER_TIMING_0 0x2C 105 #define RASTER_TIMING_0_HBP_SHIFT 24 106 #define RASTER_TIMING_0_HFP_SHIFT 16 107 #define RASTER_TIMING_0_HSW_SHIFT 10 108 #define RASTER_TIMING_0_PPLLSB_SHIFT 4 109 #define RASTER_TIMING_0_PPLMSB_SHIFT 3 110 #define LCD_RASTER_TIMING_1 0x30 111 #define RASTER_TIMING_1_VBP_SHIFT 24 112 #define RASTER_TIMING_1_VFP_SHIFT 16 113 #define RASTER_TIMING_1_VSW_SHIFT 10 114 #define RASTER_TIMING_1_LPP_SHIFT 0 115 #define LCD_RASTER_TIMING_2 0x34 116 #define RASTER_TIMING_2_HSWHI_SHIFT 27 117 #define RASTER_TIMING_2_LPP_B10_SHIFT 26 118 #define RASTER_TIMING_2_PHSVS (1 << 25) 119 #define RASTER_TIMING_2_PHSVS_RISE (1 << 24) 120 #define RASTER_TIMING_2_PHSVS_FALL (0 << 24) 121 #define RASTER_TIMING_2_IOE (1 << 23) 122 #define RASTER_TIMING_2_IPC (1 << 22) 123 #define RASTER_TIMING_2_IHS (1 << 21) 124 #define RASTER_TIMING_2_IVS (1 << 20) 125 #define RASTER_TIMING_2_ACBI_SHIFT 16 126 #define RASTER_TIMING_2_ACB_SHIFT 8 127 #define RASTER_TIMING_2_HBPHI_SHIFT 4 128 #define RASTER_TIMING_2_HFPHI_SHIFT 0 129 #define LCD_RASTER_SUBPANEL 0x38 130 #define LCD_RASTER_SUBPANEL2 0x3C 131 #define LCD_LCDDMA_CTRL 0x40 132 #define LCDDMA_CTRL_DMA_MASTER_PRIO_SHIFT 16 133 #define LCDDMA_CTRL_TH_FIFO_RDY_SHIFT 8 134 #define LCDDMA_CTRL_BURST_SIZE_SHIFT 4 135 #define LCDDMA_CTRL_BYTES_SWAP (1 << 3) 136 #define LCDDMA_CTRL_BE (1 << 1) 137 #define LCDDMA_CTRL_FB0_ONLY 0 138 #define LCDDMA_CTRL_FB0_FB1 (1 << 0) 139 #define LCD_LCDDMA_FB0_BASE 0x44 140 #define LCD_LCDDMA_FB0_CEILING 0x48 141 #define LCD_LCDDMA_FB1_BASE 0x4C 142 #define LCD_LCDDMA_FB1_CEILING 0x50 143 #define LCD_SYSCONFIG 0x54 144 #define SYSCONFIG_STANDBY_FORCE (0 << 4) 145 #define SYSCONFIG_STANDBY_NONE (1 << 4) 146 #define SYSCONFIG_STANDBY_SMART (2 << 4) 147 #define SYSCONFIG_IDLE_FORCE (0 << 2) 148 #define SYSCONFIG_IDLE_NONE (1 << 2) 149 #define SYSCONFIG_IDLE_SMART (2 << 2) 150 #define LCD_IRQSTATUS_RAW 0x58 151 #define LCD_IRQSTATUS 0x5C 152 #define LCD_IRQENABLE_SET 0x60 153 #define LCD_IRQENABLE_CLEAR 0x64 154 #define IRQ_EOF1 (1 << 9) 155 #define IRQ_EOF0 (1 << 8) 156 #define IRQ_PL (1 << 6) 157 #define IRQ_FUF (1 << 5) 158 #define IRQ_ACB (1 << 3) 159 #define IRQ_SYNC_LOST (1 << 2) 160 #define IRQ_RASTER_DONE (1 << 1) 161 #define IRQ_FRAME_DONE (1 << 0) 162 #define LCD_END_OF_INT_IND 0x68 163 #define LCD_CLKC_ENABLE 0x6C 164 #define CLKC_ENABLE_DMA (1 << 2) 165 #define CLKC_ENABLE_LDID (1 << 1) 166 #define CLKC_ENABLE_CORE (1 << 0) 167 #define LCD_CLKC_RESET 0x70 168 #define CLKC_RESET_MAIN (1 << 3) 169 #define CLKC_RESET_DMA (1 << 2) 170 #define CLKC_RESET_LDID (1 << 1) 171 #define CLKC_RESET_CORE (1 << 0) 172 173 #define LCD_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) 174 #define LCD_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) 175 #define LCD_LOCK_INIT(_sc) mtx_init(&(_sc)->sc_mtx, \ 176 device_get_nameunit(_sc->sc_dev), "am335x_lcd", MTX_DEF) 177 #define LCD_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->sc_mtx); 178 179 #define LCD_READ4(_sc, reg) bus_read_4((_sc)->sc_mem_res, reg); 180 #define LCD_WRITE4(_sc, reg, value) \ 181 bus_write_4((_sc)->sc_mem_res, reg, value); 182 183 /* Backlight is controlled by eCAS interface on PWM unit 0 */ 184 #define PWM_UNIT 0 185 #define PWM_PERIOD 100 186 187 #define MODE_HBP(mode) ((mode)->htotal - (mode)->hsync_end) 188 #define MODE_HFP(mode) ((mode)->hsync_start - (mode)->hdisplay) 189 #define MODE_HSW(mode) ((mode)->hsync_end - (mode)->hsync_start) 190 #define MODE_VBP(mode) ((mode)->vtotal - (mode)->vsync_end) 191 #define MODE_VFP(mode) ((mode)->vsync_start - (mode)->vdisplay) 192 #define MODE_VSW(mode) ((mode)->vsync_end - (mode)->vsync_start) 193 194 #define MAX_PIXEL_CLOCK 126000 195 #define MAX_BANDWIDTH (1280*1024*60) 196 197 struct am335x_lcd_softc { 198 device_t sc_dev; 199 struct fb_info sc_fb_info; 200 struct resource *sc_mem_res; 201 struct resource *sc_irq_res; 202 void *sc_intr_hl; 203 struct mtx sc_mtx; 204 int sc_backlight; 205 struct sysctl_oid *sc_oid; 206 207 struct panel_info sc_panel; 208 209 /* Framebuffer */ 210 bus_dma_tag_t sc_dma_tag; 211 bus_dmamap_t sc_dma_map; 212 size_t sc_fb_size; 213 bus_addr_t sc_fb_phys; 214 uint8_t *sc_fb_base; 215 216 /* HDMI framer */ 217 phandle_t sc_hdmi_framer; 218 eventhandler_tag sc_hdmi_evh; 219 }; 220 221 static void 222 am335x_fb_dmamap_cb(void *arg, bus_dma_segment_t *segs, int nseg, int err) 223 { 224 bus_addr_t *addr; 225 226 if (err) 227 return; 228 229 addr = (bus_addr_t*)arg; 230 *addr = segs[0].ds_addr; 231 } 232 233 static uint32_t 234 am335x_lcd_calc_divisor(uint32_t reference, uint32_t freq) 235 { 236 uint32_t div, i; 237 uint32_t delta, min_delta; 238 239 min_delta = freq; 240 div = 255; 241 242 /* Raster mode case: divisors are in range from 2 to 255 */ 243 for (i = 2; i < 255; i++) { 244 delta = abs(reference/i - freq); 245 if (delta < min_delta) { 246 div = i; 247 min_delta = delta; 248 } 249 } 250 251 return (div); 252 } 253 254 static int 255 am335x_lcd_sysctl_backlight(SYSCTL_HANDLER_ARGS) 256 { 257 struct am335x_lcd_softc *sc = (struct am335x_lcd_softc*)arg1; 258 int error; 259 int backlight; 260 261 backlight = sc->sc_backlight; 262 error = sysctl_handle_int(oidp, &backlight, 0, req); 263 264 if (error != 0 || req->newptr == NULL) 265 return (error); 266 267 if (backlight < 0) 268 backlight = 0; 269 if (backlight > 100) 270 backlight = 100; 271 272 LCD_LOCK(sc); 273 error = am335x_pwm_config_ecap(PWM_UNIT, PWM_PERIOD, 274 backlight*PWM_PERIOD/100); 275 if (error == 0) 276 sc->sc_backlight = backlight; 277 LCD_UNLOCK(sc); 278 279 return (error); 280 } 281 282 static uint32_t 283 am335x_mode_vrefresh(const struct videomode *mode) 284 { 285 uint32_t refresh; 286 287 /* Calculate vertical refresh rate */ 288 refresh = (mode->dot_clock * 1000 / mode->htotal); 289 refresh = (refresh + mode->vtotal / 2) / mode->vtotal; 290 291 if (mode->flags & VID_INTERLACE) 292 refresh *= 2; 293 if (mode->flags & VID_DBLSCAN) 294 refresh /= 2; 295 296 return refresh; 297 } 298 299 static int 300 am335x_mode_is_valid(const struct videomode *mode) 301 { 302 uint32_t hbp, hfp, hsw; 303 uint32_t vbp, vfp, vsw; 304 305 if (mode->dot_clock > MAX_PIXEL_CLOCK) 306 return (0); 307 308 if (mode->hdisplay & 0xf) 309 return (0); 310 311 if (mode->vdisplay > 2048) 312 return (0); 313 314 /* Check ranges for timing parameters */ 315 hbp = MODE_HBP(mode) - 1; 316 hfp = MODE_HFP(mode) - 1; 317 hsw = MODE_HSW(mode) - 1; 318 vbp = MODE_VBP(mode); 319 vfp = MODE_VFP(mode); 320 vsw = MODE_VSW(mode) - 1; 321 322 if (hbp > 0x3ff) 323 return (0); 324 if (hfp > 0x3ff) 325 return (0); 326 if (hsw > 0x3ff) 327 return (0); 328 329 if (vbp > 0xff) 330 return (0); 331 if (vfp > 0xff) 332 return (0); 333 if (vsw > 0x3f) 334 return (0); 335 if (mode->vdisplay*mode->hdisplay*am335x_mode_vrefresh(mode) 336 > MAX_BANDWIDTH) 337 return (0); 338 339 return (1); 340 } 341 342 static void 343 am335x_read_hdmi_property(device_t dev) 344 { 345 phandle_t node; 346 phandle_t endpoint; 347 phandle_t hdmi_xref; 348 struct am335x_lcd_softc *sc; 349 350 sc = device_get_softc(dev); 351 node = ofw_bus_get_node(dev); 352 sc->sc_hdmi_framer = 0; 353 354 /* 355 * Old FreeBSD way of referencing to HDMI framer 356 */ 357 if (OF_getencprop(node, "hdmi", &hdmi_xref, sizeof(hdmi_xref)) != -1) { 358 sc->sc_hdmi_framer = hdmi_xref; 359 return; 360 } 361 362 /* 363 * Use bindings described in Linux docs: 364 * bindings/media/video-interfaces.txt 365 * We assume that the only endpoint in LCDC node 366 * is HDMI framer. 367 */ 368 node = ofw_bus_find_child(node, "port"); 369 370 /* No media bindings */ 371 if (node == 0) 372 return; 373 374 for (endpoint = OF_child(node); endpoint != 0; endpoint = OF_peer(endpoint)) { 375 if (OF_getencprop(endpoint, "remote-endpoint", &node, sizeof(node)) != -1) { 376 /* port node of remote endpoint */ 377 node = OF_node_from_xref(node); 378 /* port/ node */ 379 node = OF_parent(node); 380 /* actual owner of port/endpoint, in our case HDMI framer */ 381 sc->sc_hdmi_framer = OF_parent(node); 382 if (sc->sc_hdmi_framer != 0) 383 return; 384 } 385 } 386 } 387 388 static int 389 am335x_read_property(device_t dev, phandle_t node, const char *name, uint32_t *val) 390 { 391 pcell_t cell; 392 393 if ((OF_getencprop(node, name, &cell, sizeof(cell))) <= 0) { 394 device_printf(dev, "missing '%s' attribute in LCD panel info\n", 395 name); 396 return (ENXIO); 397 } 398 399 *val = cell; 400 401 return (0); 402 } 403 404 static int 405 am335x_read_timing(device_t dev, phandle_t node, struct panel_info *panel) 406 { 407 int error; 408 phandle_t timings_node, timing_node, native; 409 410 timings_node = ofw_bus_find_child(node, "display-timings"); 411 if (timings_node == 0) { 412 device_printf(dev, "no \"display-timings\" node\n"); 413 return (-1); 414 } 415 416 if (OF_searchencprop(timings_node, "native-mode", &native, 417 sizeof(native)) == -1) { 418 device_printf(dev, "no \"native-mode\" reference in \"timings\" node\n"); 419 return (-1); 420 } 421 422 timing_node = OF_node_from_xref(native); 423 424 error = 0; 425 if ((error = am335x_read_property(dev, timing_node, 426 "hactive", &panel->panel_width))) 427 goto out; 428 429 if ((error = am335x_read_property(dev, timing_node, 430 "vactive", &panel->panel_height))) 431 goto out; 432 433 if ((error = am335x_read_property(dev, timing_node, 434 "hfront-porch", &panel->panel_hfp))) 435 goto out; 436 437 if ((error = am335x_read_property(dev, timing_node, 438 "hback-porch", &panel->panel_hbp))) 439 goto out; 440 441 if ((error = am335x_read_property(dev, timing_node, 442 "hsync-len", &panel->panel_hsw))) 443 goto out; 444 445 if ((error = am335x_read_property(dev, timing_node, 446 "vfront-porch", &panel->panel_vfp))) 447 goto out; 448 449 if ((error = am335x_read_property(dev, timing_node, 450 "vback-porch", &panel->panel_vbp))) 451 goto out; 452 453 if ((error = am335x_read_property(dev, timing_node, 454 "vsync-len", &panel->panel_vsw))) 455 goto out; 456 457 if ((error = am335x_read_property(dev, timing_node, 458 "clock-frequency", &panel->panel_pxl_clk))) 459 goto out; 460 461 if ((error = am335x_read_property(dev, timing_node, 462 "pixelclk-active", &panel->pixelclk_active))) 463 goto out; 464 465 if ((error = am335x_read_property(dev, timing_node, 466 "hsync-active", &panel->hsync_active))) 467 goto out; 468 469 if ((error = am335x_read_property(dev, timing_node, 470 "vsync-active", &panel->vsync_active))) 471 goto out; 472 473 out: 474 return (error); 475 } 476 477 static int 478 am335x_read_panel_info(device_t dev, phandle_t node, struct panel_info *panel) 479 { 480 phandle_t panel_info_node; 481 482 panel_info_node = ofw_bus_find_child(node, "panel-info"); 483 if (panel_info_node == 0) 484 return (-1); 485 486 am335x_read_property(dev, panel_info_node, 487 "ac-bias", &panel->ac_bias); 488 489 am335x_read_property(dev, panel_info_node, 490 "ac-bias-intrpt", &panel->ac_bias_intrpt); 491 492 am335x_read_property(dev, panel_info_node, 493 "dma-burst-sz", &panel->dma_burst_sz); 494 495 am335x_read_property(dev, panel_info_node, 496 "bpp", &panel->bpp); 497 498 am335x_read_property(dev, panel_info_node, 499 "fdd", &panel->fdd); 500 501 am335x_read_property(dev, panel_info_node, 502 "sync-edge", &panel->sync_edge); 503 504 am335x_read_property(dev, panel_info_node, 505 "sync-ctrl", &panel->sync_ctrl); 506 507 return (0); 508 } 509 510 static void 511 am335x_lcd_intr(void *arg) 512 { 513 struct am335x_lcd_softc *sc = arg; 514 uint32_t reg; 515 516 reg = LCD_READ4(sc, LCD_IRQSTATUS); 517 LCD_WRITE4(sc, LCD_IRQSTATUS, reg); 518 /* Read value back to make sure it reached the hardware */ 519 reg = LCD_READ4(sc, LCD_IRQSTATUS); 520 521 if (reg & IRQ_SYNC_LOST) { 522 reg = LCD_READ4(sc, LCD_RASTER_CTRL); 523 reg &= ~RASTER_CTRL_LCDEN; 524 LCD_WRITE4(sc, LCD_RASTER_CTRL, reg); 525 526 reg = LCD_READ4(sc, LCD_RASTER_CTRL); 527 reg |= RASTER_CTRL_LCDEN; 528 LCD_WRITE4(sc, LCD_RASTER_CTRL, reg); 529 goto done; 530 } 531 532 if (reg & IRQ_PL) { 533 reg = LCD_READ4(sc, LCD_RASTER_CTRL); 534 reg &= ~RASTER_CTRL_LCDEN; 535 LCD_WRITE4(sc, LCD_RASTER_CTRL, reg); 536 537 reg = LCD_READ4(sc, LCD_RASTER_CTRL); 538 reg |= RASTER_CTRL_LCDEN; 539 LCD_WRITE4(sc, LCD_RASTER_CTRL, reg); 540 goto done; 541 } 542 543 if (reg & IRQ_EOF0) { 544 LCD_WRITE4(sc, LCD_LCDDMA_FB0_BASE, sc->sc_fb_phys); 545 LCD_WRITE4(sc, LCD_LCDDMA_FB0_CEILING, sc->sc_fb_phys + sc->sc_fb_size - 1); 546 reg &= ~IRQ_EOF0; 547 } 548 549 if (reg & IRQ_EOF1) { 550 LCD_WRITE4(sc, LCD_LCDDMA_FB1_BASE, sc->sc_fb_phys); 551 LCD_WRITE4(sc, LCD_LCDDMA_FB1_CEILING, sc->sc_fb_phys + sc->sc_fb_size - 1); 552 reg &= ~IRQ_EOF1; 553 } 554 555 if (reg & IRQ_FUF) { 556 /* TODO: Handle FUF */ 557 } 558 559 if (reg & IRQ_ACB) { 560 /* TODO: Handle ACB */ 561 } 562 563 done: 564 LCD_WRITE4(sc, LCD_END_OF_INT_IND, 0); 565 /* Read value back to make sure it reached the hardware */ 566 reg = LCD_READ4(sc, LCD_END_OF_INT_IND); 567 } 568 569 static const struct videomode * 570 am335x_lcd_pick_mode(struct edid_info *ei) 571 { 572 const struct videomode *videomode; 573 const struct videomode *m; 574 int n; 575 576 /* Get standard VGA as default */ 577 videomode = NULL; 578 579 /* 580 * Pick a mode. 581 */ 582 if (ei->edid_preferred_mode != NULL) { 583 if (am335x_mode_is_valid(ei->edid_preferred_mode)) 584 videomode = ei->edid_preferred_mode; 585 } 586 587 if (videomode == NULL) { 588 m = ei->edid_modes; 589 590 sort_modes(ei->edid_modes, 591 &ei->edid_preferred_mode, 592 ei->edid_nmodes); 593 for (n = 0; n < ei->edid_nmodes; n++) 594 if (am335x_mode_is_valid(&m[n])) { 595 videomode = &m[n]; 596 break; 597 } 598 } 599 600 return videomode; 601 } 602 603 static int 604 am335x_lcd_configure(struct am335x_lcd_softc *sc) 605 { 606 int div; 607 uint32_t reg, timing0, timing1, timing2; 608 uint32_t burst_log; 609 size_t dma_size; 610 uint32_t hbp, hfp, hsw; 611 uint32_t vbp, vfp, vsw; 612 uint32_t width, height; 613 unsigned int ref_freq; 614 int err; 615 616 /* 617 * try to adjust clock to get double of requested frequency 618 * HDMI/DVI displays are very sensitive to error in frequncy value 619 */ 620 if (ti_prcm_clk_set_source_freq(LCDC_CLK, sc->sc_panel.panel_pxl_clk*2)) { 621 device_printf(sc->sc_dev, "can't set source frequency\n"); 622 return (ENXIO); 623 } 624 625 if (ti_prcm_clk_get_source_freq(LCDC_CLK, &ref_freq)) { 626 device_printf(sc->sc_dev, "can't get reference frequency\n"); 627 return (ENXIO); 628 } 629 630 /* Panle initialization */ 631 dma_size = round_page(sc->sc_panel.panel_width*sc->sc_panel.panel_height*sc->sc_panel.bpp/8); 632 633 /* 634 * Now allocate framebuffer memory 635 */ 636 err = bus_dma_tag_create( 637 bus_get_dma_tag(sc->sc_dev), 638 4, 0, /* alignment, boundary */ 639 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */ 640 BUS_SPACE_MAXADDR, /* highaddr */ 641 NULL, NULL, /* filter, filterarg */ 642 dma_size, 1, /* maxsize, nsegments */ 643 dma_size, 0, /* maxsegsize, flags */ 644 NULL, NULL, /* lockfunc, lockarg */ 645 &sc->sc_dma_tag); 646 if (err) 647 goto done; 648 649 err = bus_dmamem_alloc(sc->sc_dma_tag, (void **)&sc->sc_fb_base, 650 BUS_DMA_COHERENT, &sc->sc_dma_map); 651 652 if (err) { 653 device_printf(sc->sc_dev, "cannot allocate framebuffer\n"); 654 goto done; 655 } 656 657 err = bus_dmamap_load(sc->sc_dma_tag, sc->sc_dma_map, sc->sc_fb_base, 658 dma_size, am335x_fb_dmamap_cb, &sc->sc_fb_phys, BUS_DMA_NOWAIT); 659 660 if (err) { 661 device_printf(sc->sc_dev, "cannot load DMA map\n"); 662 goto done; 663 } 664 665 /* Make sure it's blank */ 666 memset(sc->sc_fb_base, 0x0, dma_size); 667 668 /* Calculate actual FB Size */ 669 sc->sc_fb_size = sc->sc_panel.panel_width*sc->sc_panel.panel_height*sc->sc_panel.bpp/8; 670 671 /* Only raster mode is supported */ 672 reg = CTRL_RASTER_MODE; 673 div = am335x_lcd_calc_divisor(ref_freq, sc->sc_panel.panel_pxl_clk); 674 reg |= (div << CTRL_DIV_SHIFT); 675 LCD_WRITE4(sc, LCD_CTRL, reg); 676 677 /* Set timing */ 678 timing0 = timing1 = timing2 = 0; 679 680 hbp = sc->sc_panel.panel_hbp - 1; 681 hfp = sc->sc_panel.panel_hfp - 1; 682 hsw = sc->sc_panel.panel_hsw - 1; 683 684 vbp = sc->sc_panel.panel_vbp; 685 vfp = sc->sc_panel.panel_vfp; 686 vsw = sc->sc_panel.panel_vsw - 1; 687 688 height = sc->sc_panel.panel_height - 1; 689 width = sc->sc_panel.panel_width - 1; 690 691 /* Horizontal back porch */ 692 timing0 |= (hbp & 0xff) << RASTER_TIMING_0_HBP_SHIFT; 693 timing2 |= ((hbp >> 8) & 3) << RASTER_TIMING_2_HBPHI_SHIFT; 694 /* Horizontal front porch */ 695 timing0 |= (hfp & 0xff) << RASTER_TIMING_0_HFP_SHIFT; 696 timing2 |= ((hfp >> 8) & 3) << RASTER_TIMING_2_HFPHI_SHIFT; 697 /* Horizontal sync width */ 698 timing0 |= (hsw & 0x3f) << RASTER_TIMING_0_HSW_SHIFT; 699 timing2 |= ((hsw >> 6) & 0xf) << RASTER_TIMING_2_HSWHI_SHIFT; 700 701 /* Vertical back porch, front porch, sync width */ 702 timing1 |= (vbp & 0xff) << RASTER_TIMING_1_VBP_SHIFT; 703 timing1 |= (vfp & 0xff) << RASTER_TIMING_1_VFP_SHIFT; 704 timing1 |= (vsw & 0x3f) << RASTER_TIMING_1_VSW_SHIFT; 705 706 /* Pixels per line */ 707 timing0 |= ((width >> 10) & 1) 708 << RASTER_TIMING_0_PPLMSB_SHIFT; 709 timing0 |= ((width >> 4) & 0x3f) 710 << RASTER_TIMING_0_PPLLSB_SHIFT; 711 712 /* Lines per panel */ 713 timing1 |= (height & 0x3ff) 714 << RASTER_TIMING_1_LPP_SHIFT; 715 timing2 |= ((height >> 10 ) & 1) 716 << RASTER_TIMING_2_LPP_B10_SHIFT; 717 718 /* clock signal settings */ 719 if (sc->sc_panel.sync_ctrl) 720 timing2 |= RASTER_TIMING_2_PHSVS; 721 if (sc->sc_panel.sync_edge) 722 timing2 |= RASTER_TIMING_2_PHSVS_RISE; 723 else 724 timing2 |= RASTER_TIMING_2_PHSVS_FALL; 725 if (sc->sc_panel.hsync_active == 0) 726 timing2 |= RASTER_TIMING_2_IHS; 727 if (sc->sc_panel.vsync_active == 0) 728 timing2 |= RASTER_TIMING_2_IVS; 729 if (sc->sc_panel.pixelclk_active == 0) 730 timing2 |= RASTER_TIMING_2_IPC; 731 732 /* AC bias */ 733 timing2 |= (sc->sc_panel.ac_bias << RASTER_TIMING_2_ACB_SHIFT); 734 timing2 |= (sc->sc_panel.ac_bias_intrpt << RASTER_TIMING_2_ACBI_SHIFT); 735 736 LCD_WRITE4(sc, LCD_RASTER_TIMING_0, timing0); 737 LCD_WRITE4(sc, LCD_RASTER_TIMING_1, timing1); 738 LCD_WRITE4(sc, LCD_RASTER_TIMING_2, timing2); 739 740 /* DMA settings */ 741 reg = LCDDMA_CTRL_FB0_FB1; 742 /* Find power of 2 for current burst size */ 743 switch (sc->sc_panel.dma_burst_sz) { 744 case 1: 745 burst_log = 0; 746 break; 747 case 2: 748 burst_log = 1; 749 break; 750 case 4: 751 burst_log = 2; 752 break; 753 case 8: 754 burst_log = 3; 755 break; 756 case 16: 757 default: 758 burst_log = 4; 759 break; 760 } 761 reg |= (burst_log << LCDDMA_CTRL_BURST_SIZE_SHIFT); 762 /* XXX: FIFO TH */ 763 reg |= (0 << LCDDMA_CTRL_TH_FIFO_RDY_SHIFT); 764 LCD_WRITE4(sc, LCD_LCDDMA_CTRL, reg); 765 766 LCD_WRITE4(sc, LCD_LCDDMA_FB0_BASE, sc->sc_fb_phys); 767 LCD_WRITE4(sc, LCD_LCDDMA_FB0_CEILING, sc->sc_fb_phys + sc->sc_fb_size - 1); 768 LCD_WRITE4(sc, LCD_LCDDMA_FB1_BASE, sc->sc_fb_phys); 769 LCD_WRITE4(sc, LCD_LCDDMA_FB1_CEILING, sc->sc_fb_phys + sc->sc_fb_size - 1); 770 771 /* Enable LCD */ 772 reg = RASTER_CTRL_LCDTFT; 773 reg |= (sc->sc_panel.fdd << RASTER_CTRL_REQDLY_SHIFT); 774 reg |= (PALETTE_DATA_ONLY << RASTER_CTRL_PALMODE_SHIFT); 775 if (sc->sc_panel.bpp >= 24) 776 reg |= RASTER_CTRL_TFT24; 777 if (sc->sc_panel.bpp == 32) 778 reg |= RASTER_CTRL_TFT24_UNPACKED; 779 LCD_WRITE4(sc, LCD_RASTER_CTRL, reg); 780 781 LCD_WRITE4(sc, LCD_CLKC_ENABLE, 782 CLKC_ENABLE_DMA | CLKC_ENABLE_LDID | CLKC_ENABLE_CORE); 783 784 LCD_WRITE4(sc, LCD_CLKC_RESET, CLKC_RESET_MAIN); 785 DELAY(100); 786 LCD_WRITE4(sc, LCD_CLKC_RESET, 0); 787 788 reg = IRQ_EOF1 | IRQ_EOF0 | IRQ_FUF | IRQ_PL | 789 IRQ_ACB | IRQ_SYNC_LOST | IRQ_RASTER_DONE | 790 IRQ_FRAME_DONE; 791 LCD_WRITE4(sc, LCD_IRQENABLE_SET, reg); 792 793 reg = LCD_READ4(sc, LCD_RASTER_CTRL); 794 reg |= RASTER_CTRL_LCDEN; 795 LCD_WRITE4(sc, LCD_RASTER_CTRL, reg); 796 797 LCD_WRITE4(sc, LCD_SYSCONFIG, 798 SYSCONFIG_STANDBY_SMART | SYSCONFIG_IDLE_SMART); 799 800 sc->sc_fb_info.fb_name = device_get_nameunit(sc->sc_dev); 801 sc->sc_fb_info.fb_vbase = (intptr_t)sc->sc_fb_base; 802 sc->sc_fb_info.fb_pbase = sc->sc_fb_phys; 803 sc->sc_fb_info.fb_size = sc->sc_fb_size; 804 sc->sc_fb_info.fb_bpp = sc->sc_fb_info.fb_depth = sc->sc_panel.bpp; 805 sc->sc_fb_info.fb_stride = sc->sc_panel.panel_width*sc->sc_panel.bpp / 8; 806 sc->sc_fb_info.fb_width = sc->sc_panel.panel_width; 807 sc->sc_fb_info.fb_height = sc->sc_panel.panel_height; 808 809 #ifdef DEV_SC 810 err = (sc_attach_unit(device_get_unit(sc->sc_dev), 811 device_get_flags(sc->sc_dev) | SC_AUTODETECT_KBD)); 812 813 if (err) { 814 device_printf(sc->sc_dev, "failed to attach syscons\n"); 815 goto fail; 816 } 817 818 am335x_lcd_syscons_setup((vm_offset_t)sc->sc_fb_base, sc->sc_fb_phys, &panel); 819 #else /* VT */ 820 device_t fbd = device_add_child(sc->sc_dev, "fbd", 821 device_get_unit(sc->sc_dev)); 822 if (fbd != NULL) { 823 if (device_probe_and_attach(fbd) != 0) 824 device_printf(sc->sc_dev, "failed to attach fbd device\n"); 825 } else 826 device_printf(sc->sc_dev, "failed to add fbd child\n"); 827 #endif 828 829 done: 830 return (err); 831 } 832 833 static void 834 am335x_lcd_hdmi_event(void *arg, device_t hdmi, int event) 835 { 836 struct am335x_lcd_softc *sc; 837 const struct videomode *videomode; 838 struct videomode hdmi_mode; 839 device_t hdmi_dev; 840 uint8_t *edid; 841 uint32_t edid_len; 842 struct edid_info ei; 843 844 sc = arg; 845 846 /* Nothing to work with */ 847 if (!sc->sc_hdmi_framer) { 848 device_printf(sc->sc_dev, "HDMI event without HDMI framer set\n"); 849 return; 850 } 851 852 hdmi_dev = OF_device_from_xref(sc->sc_hdmi_framer); 853 if (!hdmi_dev) { 854 device_printf(sc->sc_dev, "no actual device for \"hdmi\" property\n"); 855 return; 856 } 857 858 edid = NULL; 859 edid_len = 0; 860 if (HDMI_GET_EDID(hdmi_dev, &edid, &edid_len) != 0) { 861 device_printf(sc->sc_dev, "failed to get EDID info from HDMI framer\n"); 862 return; 863 } 864 865 videomode = NULL; 866 867 if (edid_parse(edid, &ei) == 0) { 868 edid_print(&ei); 869 videomode = am335x_lcd_pick_mode(&ei); 870 } else 871 device_printf(sc->sc_dev, "failed to parse EDID\n"); 872 873 /* Use standard VGA as fallback */ 874 if (videomode == NULL) 875 videomode = pick_mode_by_ref(640, 480, 60); 876 877 if (videomode == NULL) { 878 device_printf(sc->sc_dev, "failed to find usable videomode"); 879 return; 880 } 881 882 device_printf(sc->sc_dev, "detected videomode: %dx%d @ %dKHz\n", videomode->hdisplay, 883 videomode->vdisplay, am335x_mode_vrefresh(videomode)); 884 885 sc->sc_panel.panel_width = videomode->hdisplay; 886 sc->sc_panel.panel_height = videomode->vdisplay; 887 sc->sc_panel.panel_hfp = videomode->hsync_start - videomode->hdisplay; 888 sc->sc_panel.panel_hbp = videomode->htotal - videomode->hsync_end; 889 sc->sc_panel.panel_hsw = videomode->hsync_end - videomode->hsync_start; 890 sc->sc_panel.panel_vfp = videomode->vsync_start - videomode->vdisplay; 891 sc->sc_panel.panel_vbp = videomode->vtotal - videomode->vsync_end; 892 sc->sc_panel.panel_vsw = videomode->vsync_end - videomode->vsync_start; 893 sc->sc_panel.pixelclk_active = 1; 894 895 /* logic for HSYNC should be reversed */ 896 if (videomode->flags & VID_NHSYNC) 897 sc->sc_panel.hsync_active = 1; 898 else 899 sc->sc_panel.hsync_active = 0; 900 901 if (videomode->flags & VID_NVSYNC) 902 sc->sc_panel.vsync_active = 0; 903 else 904 sc->sc_panel.vsync_active = 1; 905 906 sc->sc_panel.panel_pxl_clk = videomode->dot_clock * 1000; 907 908 am335x_lcd_configure(sc); 909 910 memcpy(&hdmi_mode, videomode, sizeof(hdmi_mode)); 911 hdmi_mode.hskew = videomode->hsync_end - videomode->hsync_start; 912 hdmi_mode.flags |= VID_HSKEW; 913 914 HDMI_SET_VIDEOMODE(hdmi_dev, &hdmi_mode); 915 } 916 917 static int 918 am335x_lcd_probe(device_t dev) 919 { 920 #ifdef DEV_SC 921 int err; 922 #endif 923 924 if (!ofw_bus_status_okay(dev)) 925 return (ENXIO); 926 927 if (!ofw_bus_is_compatible(dev, "ti,am33xx-tilcdc")) 928 return (ENXIO); 929 930 device_set_desc(dev, "AM335x LCD controller"); 931 932 #ifdef DEV_SC 933 err = sc_probe_unit(device_get_unit(dev), 934 device_get_flags(dev) | SC_AUTODETECT_KBD); 935 if (err != 0) 936 return (err); 937 #endif 938 939 return (BUS_PROBE_DEFAULT); 940 } 941 942 static int 943 am335x_lcd_attach(device_t dev) 944 { 945 struct am335x_lcd_softc *sc; 946 947 int err; 948 int rid; 949 struct sysctl_ctx_list *ctx; 950 struct sysctl_oid *tree; 951 phandle_t root, panel_node; 952 953 err = 0; 954 sc = device_get_softc(dev); 955 sc->sc_dev = dev; 956 957 am335x_read_hdmi_property(dev); 958 959 root = OF_finddevice("/"); 960 if (root == 0) { 961 device_printf(dev, "failed to get FDT root node\n"); 962 return (ENXIO); 963 } 964 965 sc->sc_panel.ac_bias = 255; 966 sc->sc_panel.ac_bias_intrpt = 0; 967 sc->sc_panel.dma_burst_sz = 16; 968 sc->sc_panel.bpp = 16; 969 sc->sc_panel.fdd = 128; 970 sc->sc_panel.sync_edge = 0; 971 sc->sc_panel.sync_ctrl = 1; 972 973 panel_node = fdt_find_compatible(root, "ti,tilcdc,panel", 1); 974 if (panel_node != 0) { 975 device_printf(dev, "using static panel info\n"); 976 if (am335x_read_panel_info(dev, panel_node, &sc->sc_panel)) { 977 device_printf(dev, "failed to read panel info\n"); 978 return (ENXIO); 979 } 980 981 if (am335x_read_timing(dev, panel_node, &sc->sc_panel)) { 982 device_printf(dev, "failed to read timings\n"); 983 return (ENXIO); 984 } 985 } 986 987 ti_prcm_clk_enable(LCDC_CLK); 988 989 rid = 0; 990 sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, 991 RF_ACTIVE); 992 if (!sc->sc_mem_res) { 993 device_printf(dev, "cannot allocate memory window\n"); 994 return (ENXIO); 995 } 996 997 rid = 0; 998 sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 999 RF_ACTIVE); 1000 if (!sc->sc_irq_res) { 1001 bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res); 1002 device_printf(dev, "cannot allocate interrupt\n"); 1003 return (ENXIO); 1004 } 1005 1006 if (bus_setup_intr(dev, sc->sc_irq_res, INTR_TYPE_MISC | INTR_MPSAFE, 1007 NULL, am335x_lcd_intr, sc, 1008 &sc->sc_intr_hl) != 0) { 1009 bus_release_resource(dev, SYS_RES_IRQ, rid, 1010 sc->sc_irq_res); 1011 bus_release_resource(dev, SYS_RES_MEMORY, rid, 1012 sc->sc_mem_res); 1013 device_printf(dev, "Unable to setup the irq handler.\n"); 1014 return (ENXIO); 1015 } 1016 1017 LCD_LOCK_INIT(sc); 1018 1019 /* Init backlight interface */ 1020 ctx = device_get_sysctl_ctx(sc->sc_dev); 1021 tree = device_get_sysctl_tree(sc->sc_dev); 1022 sc->sc_oid = SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 1023 "backlight", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 1024 am335x_lcd_sysctl_backlight, "I", "LCD backlight"); 1025 sc->sc_backlight = 0; 1026 /* Check if eCAS interface is available at this point */ 1027 if (am335x_pwm_config_ecap(PWM_UNIT, 1028 PWM_PERIOD, PWM_PERIOD) == 0) 1029 sc->sc_backlight = 100; 1030 1031 if (panel_node != 0) 1032 am335x_lcd_configure(sc); 1033 else 1034 sc->sc_hdmi_evh = EVENTHANDLER_REGISTER(hdmi_event, 1035 am335x_lcd_hdmi_event, sc, EVENTHANDLER_PRI_ANY); 1036 1037 return (0); 1038 } 1039 1040 static int 1041 am335x_lcd_detach(device_t dev) 1042 { 1043 /* Do not let unload driver */ 1044 return (EBUSY); 1045 } 1046 1047 static struct fb_info * 1048 am335x_lcd_fb_getinfo(device_t dev) 1049 { 1050 struct am335x_lcd_softc *sc; 1051 1052 sc = device_get_softc(dev); 1053 1054 return (&sc->sc_fb_info); 1055 } 1056 1057 static device_method_t am335x_lcd_methods[] = { 1058 DEVMETHOD(device_probe, am335x_lcd_probe), 1059 DEVMETHOD(device_attach, am335x_lcd_attach), 1060 DEVMETHOD(device_detach, am335x_lcd_detach), 1061 1062 /* Framebuffer service methods */ 1063 DEVMETHOD(fb_getinfo, am335x_lcd_fb_getinfo), 1064 1065 DEVMETHOD_END 1066 }; 1067 1068 static driver_t am335x_lcd_driver = { 1069 "fb", 1070 am335x_lcd_methods, 1071 sizeof(struct am335x_lcd_softc), 1072 }; 1073 1074 static devclass_t am335x_lcd_devclass; 1075 1076 DRIVER_MODULE(am335x_lcd, simplebus, am335x_lcd_driver, am335x_lcd_devclass, 0, 0); 1077 MODULE_VERSION(am335x_lcd, 1); 1078 MODULE_DEPEND(am335x_lcd, simplebus, 1, 1, 1); 1079