1 /*- 2 * Copyright 2013 Oleksandr Tymoshenko <gonzo@freebsd.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __FBSDID("$FreeBSD$"); 29 30 #include "opt_syscons.h" 31 #include <sys/param.h> 32 #include <sys/systm.h> 33 #include <sys/kernel.h> 34 #include <sys/module.h> 35 #include <sys/clock.h> 36 #include <sys/time.h> 37 #include <sys/bus.h> 38 #include <sys/lock.h> 39 #include <sys/mutex.h> 40 #include <sys/resource.h> 41 #include <sys/rman.h> 42 #include <sys/sysctl.h> 43 #include <vm/vm.h> 44 #include <vm/pmap.h> 45 #include <sys/fbio.h> 46 #include <sys/consio.h> 47 48 #include <machine/bus.h> 49 50 #include <dev/fdt/fdt_common.h> 51 #include <dev/ofw/openfirm.h> 52 #include <dev/ofw/ofw_bus.h> 53 #include <dev/ofw/ofw_bus_subr.h> 54 55 #include <dev/videomode/videomode.h> 56 #include <dev/videomode/edidvar.h> 57 58 #include <dev/fb/fbreg.h> 59 #ifdef DEV_SC 60 #include <dev/syscons/syscons.h> 61 #else /* VT */ 62 #include <dev/vt/vt.h> 63 #endif 64 65 #include <arm/ti/ti_prcm.h> 66 #include <arm/ti/ti_scm.h> 67 68 #include "am335x_lcd.h" 69 #include "am335x_pwm.h" 70 71 #include "fb_if.h" 72 #include "hdmi_if.h" 73 74 #define LCD_PID 0x00 75 #define LCD_CTRL 0x04 76 #define CTRL_DIV_MASK 0xff 77 #define CTRL_DIV_SHIFT 8 78 #define CTRL_AUTO_UFLOW_RESTART (1 << 1) 79 #define CTRL_RASTER_MODE 1 80 #define CTRL_LIDD_MODE 0 81 #define LCD_LIDD_CTRL 0x0C 82 #define LCD_LIDD_CS0_CONF 0x10 83 #define LCD_LIDD_CS0_ADDR 0x14 84 #define LCD_LIDD_CS0_DATA 0x18 85 #define LCD_LIDD_CS1_CONF 0x1C 86 #define LCD_LIDD_CS1_ADDR 0x20 87 #define LCD_LIDD_CS1_DATA 0x24 88 #define LCD_RASTER_CTRL 0x28 89 #define RASTER_CTRL_TFT24_UNPACKED (1 << 26) 90 #define RASTER_CTRL_TFT24 (1 << 25) 91 #define RASTER_CTRL_STN565 (1 << 24) 92 #define RASTER_CTRL_TFTPMAP (1 << 23) 93 #define RASTER_CTRL_NIBMODE (1 << 22) 94 #define RASTER_CTRL_PALMODE_SHIFT 20 95 #define PALETTE_PALETTE_AND_DATA 0x00 96 #define PALETTE_PALETTE_ONLY 0x01 97 #define PALETTE_DATA_ONLY 0x02 98 #define RASTER_CTRL_REQDLY_SHIFT 12 99 #define RASTER_CTRL_MONO8B (1 << 9) 100 #define RASTER_CTRL_RBORDER (1 << 8) 101 #define RASTER_CTRL_LCDTFT (1 << 7) 102 #define RASTER_CTRL_LCDBW (1 << 1) 103 #define RASTER_CTRL_LCDEN (1 << 0) 104 #define LCD_RASTER_TIMING_0 0x2C 105 #define RASTER_TIMING_0_HBP_SHIFT 24 106 #define RASTER_TIMING_0_HFP_SHIFT 16 107 #define RASTER_TIMING_0_HSW_SHIFT 10 108 #define RASTER_TIMING_0_PPLLSB_SHIFT 4 109 #define RASTER_TIMING_0_PPLMSB_SHIFT 3 110 #define LCD_RASTER_TIMING_1 0x30 111 #define RASTER_TIMING_1_VBP_SHIFT 24 112 #define RASTER_TIMING_1_VFP_SHIFT 16 113 #define RASTER_TIMING_1_VSW_SHIFT 10 114 #define RASTER_TIMING_1_LPP_SHIFT 0 115 #define LCD_RASTER_TIMING_2 0x34 116 #define RASTER_TIMING_2_HSWHI_SHIFT 27 117 #define RASTER_TIMING_2_LPP_B10_SHIFT 26 118 #define RASTER_TIMING_2_PHSVS (1 << 25) 119 #define RASTER_TIMING_2_PHSVS_RISE (1 << 24) 120 #define RASTER_TIMING_2_PHSVS_FALL (0 << 24) 121 #define RASTER_TIMING_2_IOE (1 << 23) 122 #define RASTER_TIMING_2_IPC (1 << 22) 123 #define RASTER_TIMING_2_IHS (1 << 21) 124 #define RASTER_TIMING_2_IVS (1 << 20) 125 #define RASTER_TIMING_2_ACBI_SHIFT 16 126 #define RASTER_TIMING_2_ACB_SHIFT 8 127 #define RASTER_TIMING_2_HBPHI_SHIFT 4 128 #define RASTER_TIMING_2_HFPHI_SHIFT 0 129 #define LCD_RASTER_SUBPANEL 0x38 130 #define LCD_RASTER_SUBPANEL2 0x3C 131 #define LCD_LCDDMA_CTRL 0x40 132 #define LCDDMA_CTRL_DMA_MASTER_PRIO_SHIFT 16 133 #define LCDDMA_CTRL_TH_FIFO_RDY_SHIFT 8 134 #define LCDDMA_CTRL_BURST_SIZE_SHIFT 4 135 #define LCDDMA_CTRL_BYTES_SWAP (1 << 3) 136 #define LCDDMA_CTRL_BE (1 << 1) 137 #define LCDDMA_CTRL_FB0_ONLY 0 138 #define LCDDMA_CTRL_FB0_FB1 (1 << 0) 139 #define LCD_LCDDMA_FB0_BASE 0x44 140 #define LCD_LCDDMA_FB0_CEILING 0x48 141 #define LCD_LCDDMA_FB1_BASE 0x4C 142 #define LCD_LCDDMA_FB1_CEILING 0x50 143 #define LCD_SYSCONFIG 0x54 144 #define SYSCONFIG_STANDBY_FORCE (0 << 4) 145 #define SYSCONFIG_STANDBY_NONE (1 << 4) 146 #define SYSCONFIG_STANDBY_SMART (2 << 4) 147 #define SYSCONFIG_IDLE_FORCE (0 << 2) 148 #define SYSCONFIG_IDLE_NONE (1 << 2) 149 #define SYSCONFIG_IDLE_SMART (2 << 2) 150 #define LCD_IRQSTATUS_RAW 0x58 151 #define LCD_IRQSTATUS 0x5C 152 #define LCD_IRQENABLE_SET 0x60 153 #define LCD_IRQENABLE_CLEAR 0x64 154 #define IRQ_EOF1 (1 << 9) 155 #define IRQ_EOF0 (1 << 8) 156 #define IRQ_PL (1 << 6) 157 #define IRQ_FUF (1 << 5) 158 #define IRQ_ACB (1 << 3) 159 #define IRQ_SYNC_LOST (1 << 2) 160 #define IRQ_RASTER_DONE (1 << 1) 161 #define IRQ_FRAME_DONE (1 << 0) 162 #define LCD_END_OF_INT_IND 0x68 163 #define LCD_CLKC_ENABLE 0x6C 164 #define CLKC_ENABLE_DMA (1 << 2) 165 #define CLKC_ENABLE_LDID (1 << 1) 166 #define CLKC_ENABLE_CORE (1 << 0) 167 #define LCD_CLKC_RESET 0x70 168 #define CLKC_RESET_MAIN (1 << 3) 169 #define CLKC_RESET_DMA (1 << 2) 170 #define CLKC_RESET_LDID (1 << 1) 171 #define CLKC_RESET_CORE (1 << 0) 172 173 #define LCD_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) 174 #define LCD_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) 175 #define LCD_LOCK_INIT(_sc) mtx_init(&(_sc)->sc_mtx, \ 176 device_get_nameunit(_sc->sc_dev), "am335x_lcd", MTX_DEF) 177 #define LCD_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->sc_mtx); 178 179 #define LCD_READ4(_sc, reg) bus_read_4((_sc)->sc_mem_res, reg); 180 #define LCD_WRITE4(_sc, reg, value) \ 181 bus_write_4((_sc)->sc_mem_res, reg, value); 182 183 /* Backlight is controlled by eCAS interface on PWM unit 0 */ 184 #define PWM_UNIT 0 185 #define PWM_PERIOD 100 186 187 #define MODE_HBP(mode) ((mode)->htotal - (mode)->hsync_end) 188 #define MODE_HFP(mode) ((mode)->hsync_start - (mode)->hdisplay) 189 #define MODE_HSW(mode) ((mode)->hsync_end - (mode)->hsync_start) 190 #define MODE_VBP(mode) ((mode)->vtotal - (mode)->vsync_end) 191 #define MODE_VFP(mode) ((mode)->vsync_start - (mode)->vdisplay) 192 #define MODE_VSW(mode) ((mode)->vsync_end - (mode)->vsync_start) 193 194 #define MAX_PIXEL_CLOCK 126000 195 #define MAX_BANDWIDTH (1280*1024*60) 196 197 struct am335x_lcd_softc { 198 device_t sc_dev; 199 struct fb_info sc_fb_info; 200 struct resource *sc_mem_res; 201 struct resource *sc_irq_res; 202 void *sc_intr_hl; 203 struct mtx sc_mtx; 204 int sc_backlight; 205 struct sysctl_oid *sc_oid; 206 207 struct panel_info sc_panel; 208 209 /* Framebuffer */ 210 bus_dma_tag_t sc_dma_tag; 211 bus_dmamap_t sc_dma_map; 212 size_t sc_fb_size; 213 bus_addr_t sc_fb_phys; 214 uint8_t *sc_fb_base; 215 216 /* HDMI framer */ 217 phandle_t sc_hdmi_framer; 218 eventhandler_tag sc_hdmi_evh; 219 }; 220 221 static void 222 am335x_fb_dmamap_cb(void *arg, bus_dma_segment_t *segs, int nseg, int err) 223 { 224 bus_addr_t *addr; 225 226 if (err) 227 return; 228 229 addr = (bus_addr_t*)arg; 230 *addr = segs[0].ds_addr; 231 } 232 233 static uint32_t 234 am335x_lcd_calc_divisor(uint32_t reference, uint32_t freq) 235 { 236 uint32_t div, i; 237 uint32_t delta, min_delta; 238 239 min_delta = freq; 240 div = 255; 241 242 /* Raster mode case: divisors are in range from 2 to 255 */ 243 for (i = 2; i < 255; i++) { 244 delta = abs(reference/i - freq); 245 if (delta < min_delta) { 246 div = i; 247 min_delta = delta; 248 } 249 } 250 251 return (div); 252 } 253 254 static int 255 am335x_lcd_sysctl_backlight(SYSCTL_HANDLER_ARGS) 256 { 257 struct am335x_lcd_softc *sc = (struct am335x_lcd_softc*)arg1; 258 int error; 259 int backlight; 260 261 backlight = sc->sc_backlight; 262 error = sysctl_handle_int(oidp, &backlight, 0, req); 263 264 if (error != 0 || req->newptr == NULL) 265 return (error); 266 267 if (backlight < 0) 268 backlight = 0; 269 if (backlight > 100) 270 backlight = 100; 271 272 LCD_LOCK(sc); 273 error = am335x_pwm_config_ecap(PWM_UNIT, PWM_PERIOD, 274 backlight*PWM_PERIOD/100); 275 if (error == 0) 276 sc->sc_backlight = backlight; 277 LCD_UNLOCK(sc); 278 279 return (error); 280 } 281 282 static uint32_t 283 am335x_mode_vrefresh(const struct videomode *mode) 284 { 285 uint32_t refresh; 286 287 /* Calculate vertical refresh rate */ 288 refresh = (mode->dot_clock * 1000 / mode->htotal); 289 refresh = (refresh + mode->vtotal / 2) / mode->vtotal; 290 291 if (mode->flags & VID_INTERLACE) 292 refresh *= 2; 293 if (mode->flags & VID_DBLSCAN) 294 refresh /= 2; 295 296 return refresh; 297 } 298 299 static int 300 am335x_mode_is_valid(const struct videomode *mode) 301 { 302 uint32_t hbp, hfp, hsw; 303 uint32_t vbp, vfp, vsw; 304 305 if (mode->dot_clock > MAX_PIXEL_CLOCK) 306 return (0); 307 308 if (mode->hdisplay & 0xf) 309 return (0); 310 311 if (mode->vdisplay > 2048) 312 return (0); 313 314 /* Check ranges for timing parameters */ 315 hbp = MODE_HBP(mode) - 1; 316 hfp = MODE_HFP(mode) - 1; 317 hsw = MODE_HSW(mode) - 1; 318 vbp = MODE_VBP(mode); 319 vfp = MODE_VFP(mode); 320 vsw = MODE_VSW(mode) - 1; 321 322 if (hbp > 0x3ff) 323 return (0); 324 if (hfp > 0x3ff) 325 return (0); 326 if (hsw > 0x3ff) 327 return (0); 328 329 if (vbp > 0xff) 330 return (0); 331 if (vfp > 0xff) 332 return (0); 333 if (vsw > 0x3f) 334 return (0); 335 if (mode->vdisplay*mode->hdisplay*am335x_mode_vrefresh(mode) 336 > MAX_BANDWIDTH) 337 return (0); 338 339 return (1); 340 } 341 342 static void 343 am335x_read_hdmi_property(device_t dev) 344 { 345 phandle_t node, xref; 346 phandle_t endpoint; 347 phandle_t hdmi_xref; 348 struct am335x_lcd_softc *sc; 349 350 sc = device_get_softc(dev); 351 node = ofw_bus_get_node(dev); 352 sc->sc_hdmi_framer = 0; 353 354 /* 355 * Old FreeBSD way of referencing to HDMI framer 356 */ 357 if (OF_getencprop(node, "hdmi", &hdmi_xref, sizeof(hdmi_xref)) != -1) { 358 sc->sc_hdmi_framer = hdmi_xref; 359 return; 360 } 361 362 /* 363 * Use bindings described in Linux docs: 364 * bindings/media/video-interfaces.txt 365 * We assume that the only endpoint in LCDC node 366 * is HDMI framer. 367 */ 368 node = ofw_bus_find_child(node, "port"); 369 370 /* No media bindings */ 371 if (node == 0) 372 return; 373 374 for (endpoint = OF_child(node); endpoint != 0; endpoint = OF_peer(endpoint)) { 375 if (OF_getencprop(endpoint, "remote-endpoint", &xref, sizeof(xref)) != -1) { 376 /* port/port@0/endpoint@0 */ 377 node = OF_node_from_xref(xref); 378 /* port/port@0 */ 379 node = OF_parent(node); 380 /* port */ 381 node = OF_parent(node); 382 /* actual owner of port, in our case HDMI framer */ 383 sc->sc_hdmi_framer = OF_xref_from_node(OF_parent(node)); 384 if (sc->sc_hdmi_framer != 0) 385 return; 386 } 387 } 388 } 389 390 static int 391 am335x_read_property(device_t dev, phandle_t node, const char *name, uint32_t *val) 392 { 393 pcell_t cell; 394 395 if ((OF_getencprop(node, name, &cell, sizeof(cell))) <= 0) { 396 device_printf(dev, "missing '%s' attribute in LCD panel info\n", 397 name); 398 return (ENXIO); 399 } 400 401 *val = cell; 402 403 return (0); 404 } 405 406 static int 407 am335x_read_timing(device_t dev, phandle_t node, struct panel_info *panel) 408 { 409 int error; 410 phandle_t timings_node, timing_node, native; 411 412 timings_node = ofw_bus_find_child(node, "display-timings"); 413 if (timings_node == 0) { 414 device_printf(dev, "no \"display-timings\" node\n"); 415 return (-1); 416 } 417 418 if (OF_searchencprop(timings_node, "native-mode", &native, 419 sizeof(native)) == -1) { 420 device_printf(dev, "no \"native-mode\" reference in \"timings\" node\n"); 421 return (-1); 422 } 423 424 timing_node = OF_node_from_xref(native); 425 426 error = 0; 427 if ((error = am335x_read_property(dev, timing_node, 428 "hactive", &panel->panel_width))) 429 goto out; 430 431 if ((error = am335x_read_property(dev, timing_node, 432 "vactive", &panel->panel_height))) 433 goto out; 434 435 if ((error = am335x_read_property(dev, timing_node, 436 "hfront-porch", &panel->panel_hfp))) 437 goto out; 438 439 if ((error = am335x_read_property(dev, timing_node, 440 "hback-porch", &panel->panel_hbp))) 441 goto out; 442 443 if ((error = am335x_read_property(dev, timing_node, 444 "hsync-len", &panel->panel_hsw))) 445 goto out; 446 447 if ((error = am335x_read_property(dev, timing_node, 448 "vfront-porch", &panel->panel_vfp))) 449 goto out; 450 451 if ((error = am335x_read_property(dev, timing_node, 452 "vback-porch", &panel->panel_vbp))) 453 goto out; 454 455 if ((error = am335x_read_property(dev, timing_node, 456 "vsync-len", &panel->panel_vsw))) 457 goto out; 458 459 if ((error = am335x_read_property(dev, timing_node, 460 "clock-frequency", &panel->panel_pxl_clk))) 461 goto out; 462 463 if ((error = am335x_read_property(dev, timing_node, 464 "pixelclk-active", &panel->pixelclk_active))) 465 goto out; 466 467 if ((error = am335x_read_property(dev, timing_node, 468 "hsync-active", &panel->hsync_active))) 469 goto out; 470 471 if ((error = am335x_read_property(dev, timing_node, 472 "vsync-active", &panel->vsync_active))) 473 goto out; 474 475 out: 476 return (error); 477 } 478 479 static int 480 am335x_read_panel_info(device_t dev, phandle_t node, struct panel_info *panel) 481 { 482 phandle_t panel_info_node; 483 484 panel_info_node = ofw_bus_find_child(node, "panel-info"); 485 if (panel_info_node == 0) 486 return (-1); 487 488 am335x_read_property(dev, panel_info_node, 489 "ac-bias", &panel->ac_bias); 490 491 am335x_read_property(dev, panel_info_node, 492 "ac-bias-intrpt", &panel->ac_bias_intrpt); 493 494 am335x_read_property(dev, panel_info_node, 495 "dma-burst-sz", &panel->dma_burst_sz); 496 497 am335x_read_property(dev, panel_info_node, 498 "bpp", &panel->bpp); 499 500 am335x_read_property(dev, panel_info_node, 501 "fdd", &panel->fdd); 502 503 am335x_read_property(dev, panel_info_node, 504 "sync-edge", &panel->sync_edge); 505 506 am335x_read_property(dev, panel_info_node, 507 "sync-ctrl", &panel->sync_ctrl); 508 509 return (0); 510 } 511 512 static void 513 am335x_lcd_intr(void *arg) 514 { 515 struct am335x_lcd_softc *sc = arg; 516 uint32_t reg; 517 518 reg = LCD_READ4(sc, LCD_IRQSTATUS); 519 LCD_WRITE4(sc, LCD_IRQSTATUS, reg); 520 /* Read value back to make sure it reached the hardware */ 521 reg = LCD_READ4(sc, LCD_IRQSTATUS); 522 523 if (reg & IRQ_SYNC_LOST) { 524 reg = LCD_READ4(sc, LCD_RASTER_CTRL); 525 reg &= ~RASTER_CTRL_LCDEN; 526 LCD_WRITE4(sc, LCD_RASTER_CTRL, reg); 527 528 reg = LCD_READ4(sc, LCD_RASTER_CTRL); 529 reg |= RASTER_CTRL_LCDEN; 530 LCD_WRITE4(sc, LCD_RASTER_CTRL, reg); 531 goto done; 532 } 533 534 if (reg & IRQ_PL) { 535 reg = LCD_READ4(sc, LCD_RASTER_CTRL); 536 reg &= ~RASTER_CTRL_LCDEN; 537 LCD_WRITE4(sc, LCD_RASTER_CTRL, reg); 538 539 reg = LCD_READ4(sc, LCD_RASTER_CTRL); 540 reg |= RASTER_CTRL_LCDEN; 541 LCD_WRITE4(sc, LCD_RASTER_CTRL, reg); 542 goto done; 543 } 544 545 if (reg & IRQ_EOF0) { 546 LCD_WRITE4(sc, LCD_LCDDMA_FB0_BASE, sc->sc_fb_phys); 547 LCD_WRITE4(sc, LCD_LCDDMA_FB0_CEILING, sc->sc_fb_phys + sc->sc_fb_size - 1); 548 reg &= ~IRQ_EOF0; 549 } 550 551 if (reg & IRQ_EOF1) { 552 LCD_WRITE4(sc, LCD_LCDDMA_FB1_BASE, sc->sc_fb_phys); 553 LCD_WRITE4(sc, LCD_LCDDMA_FB1_CEILING, sc->sc_fb_phys + sc->sc_fb_size - 1); 554 reg &= ~IRQ_EOF1; 555 } 556 557 if (reg & IRQ_FUF) { 558 /* TODO: Handle FUF */ 559 } 560 561 if (reg & IRQ_ACB) { 562 /* TODO: Handle ACB */ 563 } 564 565 done: 566 LCD_WRITE4(sc, LCD_END_OF_INT_IND, 0); 567 /* Read value back to make sure it reached the hardware */ 568 reg = LCD_READ4(sc, LCD_END_OF_INT_IND); 569 } 570 571 static const struct videomode * 572 am335x_lcd_pick_mode(struct edid_info *ei) 573 { 574 const struct videomode *videomode; 575 const struct videomode *m; 576 int n; 577 578 /* Get standard VGA as default */ 579 videomode = NULL; 580 581 /* 582 * Pick a mode. 583 */ 584 if (ei->edid_preferred_mode != NULL) { 585 if (am335x_mode_is_valid(ei->edid_preferred_mode)) 586 videomode = ei->edid_preferred_mode; 587 } 588 589 if (videomode == NULL) { 590 m = ei->edid_modes; 591 592 sort_modes(ei->edid_modes, 593 &ei->edid_preferred_mode, 594 ei->edid_nmodes); 595 for (n = 0; n < ei->edid_nmodes; n++) 596 if (am335x_mode_is_valid(&m[n])) { 597 videomode = &m[n]; 598 break; 599 } 600 } 601 602 return videomode; 603 } 604 605 static int 606 am335x_lcd_configure(struct am335x_lcd_softc *sc) 607 { 608 int div; 609 uint32_t reg, timing0, timing1, timing2; 610 uint32_t burst_log; 611 size_t dma_size; 612 uint32_t hbp, hfp, hsw; 613 uint32_t vbp, vfp, vsw; 614 uint32_t width, height; 615 unsigned int ref_freq; 616 int err; 617 618 /* 619 * try to adjust clock to get double of requested frequency 620 * HDMI/DVI displays are very sensitive to error in frequncy value 621 */ 622 if (ti_prcm_clk_set_source_freq(LCDC_CLK, sc->sc_panel.panel_pxl_clk*2)) { 623 device_printf(sc->sc_dev, "can't set source frequency\n"); 624 return (ENXIO); 625 } 626 627 if (ti_prcm_clk_get_source_freq(LCDC_CLK, &ref_freq)) { 628 device_printf(sc->sc_dev, "can't get reference frequency\n"); 629 return (ENXIO); 630 } 631 632 /* Panle initialization */ 633 dma_size = round_page(sc->sc_panel.panel_width*sc->sc_panel.panel_height*sc->sc_panel.bpp/8); 634 635 /* 636 * Now allocate framebuffer memory 637 */ 638 err = bus_dma_tag_create( 639 bus_get_dma_tag(sc->sc_dev), 640 4, 0, /* alignment, boundary */ 641 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */ 642 BUS_SPACE_MAXADDR, /* highaddr */ 643 NULL, NULL, /* filter, filterarg */ 644 dma_size, 1, /* maxsize, nsegments */ 645 dma_size, 0, /* maxsegsize, flags */ 646 NULL, NULL, /* lockfunc, lockarg */ 647 &sc->sc_dma_tag); 648 if (err) 649 goto done; 650 651 err = bus_dmamem_alloc(sc->sc_dma_tag, (void **)&sc->sc_fb_base, 652 BUS_DMA_COHERENT, &sc->sc_dma_map); 653 654 if (err) { 655 device_printf(sc->sc_dev, "cannot allocate framebuffer\n"); 656 goto done; 657 } 658 659 err = bus_dmamap_load(sc->sc_dma_tag, sc->sc_dma_map, sc->sc_fb_base, 660 dma_size, am335x_fb_dmamap_cb, &sc->sc_fb_phys, BUS_DMA_NOWAIT); 661 662 if (err) { 663 device_printf(sc->sc_dev, "cannot load DMA map\n"); 664 goto done; 665 } 666 667 /* Make sure it's blank */ 668 memset(sc->sc_fb_base, 0x0, dma_size); 669 670 /* Calculate actual FB Size */ 671 sc->sc_fb_size = sc->sc_panel.panel_width*sc->sc_panel.panel_height*sc->sc_panel.bpp/8; 672 673 /* Only raster mode is supported */ 674 reg = CTRL_RASTER_MODE; 675 div = am335x_lcd_calc_divisor(ref_freq, sc->sc_panel.panel_pxl_clk); 676 reg |= (div << CTRL_DIV_SHIFT); 677 LCD_WRITE4(sc, LCD_CTRL, reg); 678 679 /* Set timing */ 680 timing0 = timing1 = timing2 = 0; 681 682 hbp = sc->sc_panel.panel_hbp - 1; 683 hfp = sc->sc_panel.panel_hfp - 1; 684 hsw = sc->sc_panel.panel_hsw - 1; 685 686 vbp = sc->sc_panel.panel_vbp; 687 vfp = sc->sc_panel.panel_vfp; 688 vsw = sc->sc_panel.panel_vsw - 1; 689 690 height = sc->sc_panel.panel_height - 1; 691 width = sc->sc_panel.panel_width - 1; 692 693 /* Horizontal back porch */ 694 timing0 |= (hbp & 0xff) << RASTER_TIMING_0_HBP_SHIFT; 695 timing2 |= ((hbp >> 8) & 3) << RASTER_TIMING_2_HBPHI_SHIFT; 696 /* Horizontal front porch */ 697 timing0 |= (hfp & 0xff) << RASTER_TIMING_0_HFP_SHIFT; 698 timing2 |= ((hfp >> 8) & 3) << RASTER_TIMING_2_HFPHI_SHIFT; 699 /* Horizontal sync width */ 700 timing0 |= (hsw & 0x3f) << RASTER_TIMING_0_HSW_SHIFT; 701 timing2 |= ((hsw >> 6) & 0xf) << RASTER_TIMING_2_HSWHI_SHIFT; 702 703 /* Vertical back porch, front porch, sync width */ 704 timing1 |= (vbp & 0xff) << RASTER_TIMING_1_VBP_SHIFT; 705 timing1 |= (vfp & 0xff) << RASTER_TIMING_1_VFP_SHIFT; 706 timing1 |= (vsw & 0x3f) << RASTER_TIMING_1_VSW_SHIFT; 707 708 /* Pixels per line */ 709 timing0 |= ((width >> 10) & 1) 710 << RASTER_TIMING_0_PPLMSB_SHIFT; 711 timing0 |= ((width >> 4) & 0x3f) 712 << RASTER_TIMING_0_PPLLSB_SHIFT; 713 714 /* Lines per panel */ 715 timing1 |= (height & 0x3ff) 716 << RASTER_TIMING_1_LPP_SHIFT; 717 timing2 |= ((height >> 10 ) & 1) 718 << RASTER_TIMING_2_LPP_B10_SHIFT; 719 720 /* clock signal settings */ 721 if (sc->sc_panel.sync_ctrl) 722 timing2 |= RASTER_TIMING_2_PHSVS; 723 if (sc->sc_panel.sync_edge) 724 timing2 |= RASTER_TIMING_2_PHSVS_RISE; 725 else 726 timing2 |= RASTER_TIMING_2_PHSVS_FALL; 727 if (sc->sc_panel.hsync_active == 0) 728 timing2 |= RASTER_TIMING_2_IHS; 729 if (sc->sc_panel.vsync_active == 0) 730 timing2 |= RASTER_TIMING_2_IVS; 731 if (sc->sc_panel.pixelclk_active == 0) 732 timing2 |= RASTER_TIMING_2_IPC; 733 734 /* AC bias */ 735 timing2 |= (sc->sc_panel.ac_bias << RASTER_TIMING_2_ACB_SHIFT); 736 timing2 |= (sc->sc_panel.ac_bias_intrpt << RASTER_TIMING_2_ACBI_SHIFT); 737 738 LCD_WRITE4(sc, LCD_RASTER_TIMING_0, timing0); 739 LCD_WRITE4(sc, LCD_RASTER_TIMING_1, timing1); 740 LCD_WRITE4(sc, LCD_RASTER_TIMING_2, timing2); 741 742 /* DMA settings */ 743 reg = LCDDMA_CTRL_FB0_FB1; 744 /* Find power of 2 for current burst size */ 745 switch (sc->sc_panel.dma_burst_sz) { 746 case 1: 747 burst_log = 0; 748 break; 749 case 2: 750 burst_log = 1; 751 break; 752 case 4: 753 burst_log = 2; 754 break; 755 case 8: 756 burst_log = 3; 757 break; 758 case 16: 759 default: 760 burst_log = 4; 761 break; 762 } 763 reg |= (burst_log << LCDDMA_CTRL_BURST_SIZE_SHIFT); 764 /* XXX: FIFO TH */ 765 reg |= (0 << LCDDMA_CTRL_TH_FIFO_RDY_SHIFT); 766 LCD_WRITE4(sc, LCD_LCDDMA_CTRL, reg); 767 768 LCD_WRITE4(sc, LCD_LCDDMA_FB0_BASE, sc->sc_fb_phys); 769 LCD_WRITE4(sc, LCD_LCDDMA_FB0_CEILING, sc->sc_fb_phys + sc->sc_fb_size - 1); 770 LCD_WRITE4(sc, LCD_LCDDMA_FB1_BASE, sc->sc_fb_phys); 771 LCD_WRITE4(sc, LCD_LCDDMA_FB1_CEILING, sc->sc_fb_phys + sc->sc_fb_size - 1); 772 773 /* Enable LCD */ 774 reg = RASTER_CTRL_LCDTFT; 775 reg |= (sc->sc_panel.fdd << RASTER_CTRL_REQDLY_SHIFT); 776 reg |= (PALETTE_DATA_ONLY << RASTER_CTRL_PALMODE_SHIFT); 777 if (sc->sc_panel.bpp >= 24) 778 reg |= RASTER_CTRL_TFT24; 779 if (sc->sc_panel.bpp == 32) 780 reg |= RASTER_CTRL_TFT24_UNPACKED; 781 LCD_WRITE4(sc, LCD_RASTER_CTRL, reg); 782 783 LCD_WRITE4(sc, LCD_CLKC_ENABLE, 784 CLKC_ENABLE_DMA | CLKC_ENABLE_LDID | CLKC_ENABLE_CORE); 785 786 LCD_WRITE4(sc, LCD_CLKC_RESET, CLKC_RESET_MAIN); 787 DELAY(100); 788 LCD_WRITE4(sc, LCD_CLKC_RESET, 0); 789 790 reg = IRQ_EOF1 | IRQ_EOF0 | IRQ_FUF | IRQ_PL | 791 IRQ_ACB | IRQ_SYNC_LOST | IRQ_RASTER_DONE | 792 IRQ_FRAME_DONE; 793 LCD_WRITE4(sc, LCD_IRQENABLE_SET, reg); 794 795 reg = LCD_READ4(sc, LCD_RASTER_CTRL); 796 reg |= RASTER_CTRL_LCDEN; 797 LCD_WRITE4(sc, LCD_RASTER_CTRL, reg); 798 799 LCD_WRITE4(sc, LCD_SYSCONFIG, 800 SYSCONFIG_STANDBY_SMART | SYSCONFIG_IDLE_SMART); 801 802 sc->sc_fb_info.fb_name = device_get_nameunit(sc->sc_dev); 803 sc->sc_fb_info.fb_vbase = (intptr_t)sc->sc_fb_base; 804 sc->sc_fb_info.fb_pbase = sc->sc_fb_phys; 805 sc->sc_fb_info.fb_size = sc->sc_fb_size; 806 sc->sc_fb_info.fb_bpp = sc->sc_fb_info.fb_depth = sc->sc_panel.bpp; 807 sc->sc_fb_info.fb_stride = sc->sc_panel.panel_width*sc->sc_panel.bpp / 8; 808 sc->sc_fb_info.fb_width = sc->sc_panel.panel_width; 809 sc->sc_fb_info.fb_height = sc->sc_panel.panel_height; 810 811 #ifdef DEV_SC 812 err = (sc_attach_unit(device_get_unit(sc->sc_dev), 813 device_get_flags(sc->sc_dev) | SC_AUTODETECT_KBD)); 814 815 if (err) { 816 device_printf(sc->sc_dev, "failed to attach syscons\n"); 817 goto fail; 818 } 819 820 am335x_lcd_syscons_setup((vm_offset_t)sc->sc_fb_base, sc->sc_fb_phys, &panel); 821 #else /* VT */ 822 device_t fbd = device_add_child(sc->sc_dev, "fbd", 823 device_get_unit(sc->sc_dev)); 824 if (fbd != NULL) { 825 if (device_probe_and_attach(fbd) != 0) 826 device_printf(sc->sc_dev, "failed to attach fbd device\n"); 827 } else 828 device_printf(sc->sc_dev, "failed to add fbd child\n"); 829 #endif 830 831 done: 832 return (err); 833 } 834 835 static void 836 am335x_lcd_hdmi_event(void *arg, device_t hdmi, int event) 837 { 838 struct am335x_lcd_softc *sc; 839 const struct videomode *videomode; 840 struct videomode hdmi_mode; 841 device_t hdmi_dev; 842 uint8_t *edid; 843 uint32_t edid_len; 844 struct edid_info ei; 845 846 sc = arg; 847 848 /* Nothing to work with */ 849 if (!sc->sc_hdmi_framer) { 850 device_printf(sc->sc_dev, "HDMI event without HDMI framer set\n"); 851 return; 852 } 853 854 hdmi_dev = OF_device_from_xref(sc->sc_hdmi_framer); 855 if (!hdmi_dev) { 856 device_printf(sc->sc_dev, "no actual device for \"hdmi\" property\n"); 857 return; 858 } 859 860 edid = NULL; 861 edid_len = 0; 862 if (HDMI_GET_EDID(hdmi_dev, &edid, &edid_len) != 0) { 863 device_printf(sc->sc_dev, "failed to get EDID info from HDMI framer\n"); 864 return; 865 } 866 867 videomode = NULL; 868 869 if (edid_parse(edid, &ei) == 0) { 870 edid_print(&ei); 871 videomode = am335x_lcd_pick_mode(&ei); 872 } else 873 device_printf(sc->sc_dev, "failed to parse EDID\n"); 874 875 /* Use standard VGA as fallback */ 876 if (videomode == NULL) 877 videomode = pick_mode_by_ref(640, 480, 60); 878 879 if (videomode == NULL) { 880 device_printf(sc->sc_dev, "failed to find usable videomode"); 881 return; 882 } 883 884 device_printf(sc->sc_dev, "detected videomode: %dx%d @ %dKHz\n", videomode->hdisplay, 885 videomode->vdisplay, am335x_mode_vrefresh(videomode)); 886 887 sc->sc_panel.panel_width = videomode->hdisplay; 888 sc->sc_panel.panel_height = videomode->vdisplay; 889 sc->sc_panel.panel_hfp = videomode->hsync_start - videomode->hdisplay; 890 sc->sc_panel.panel_hbp = videomode->htotal - videomode->hsync_end; 891 sc->sc_panel.panel_hsw = videomode->hsync_end - videomode->hsync_start; 892 sc->sc_panel.panel_vfp = videomode->vsync_start - videomode->vdisplay; 893 sc->sc_panel.panel_vbp = videomode->vtotal - videomode->vsync_end; 894 sc->sc_panel.panel_vsw = videomode->vsync_end - videomode->vsync_start; 895 sc->sc_panel.pixelclk_active = 1; 896 897 /* logic for HSYNC should be reversed */ 898 if (videomode->flags & VID_NHSYNC) 899 sc->sc_panel.hsync_active = 1; 900 else 901 sc->sc_panel.hsync_active = 0; 902 903 if (videomode->flags & VID_NVSYNC) 904 sc->sc_panel.vsync_active = 0; 905 else 906 sc->sc_panel.vsync_active = 1; 907 908 sc->sc_panel.panel_pxl_clk = videomode->dot_clock * 1000; 909 910 am335x_lcd_configure(sc); 911 912 memcpy(&hdmi_mode, videomode, sizeof(hdmi_mode)); 913 hdmi_mode.hskew = videomode->hsync_end - videomode->hsync_start; 914 hdmi_mode.flags |= VID_HSKEW; 915 916 HDMI_SET_VIDEOMODE(hdmi_dev, &hdmi_mode); 917 } 918 919 static int 920 am335x_lcd_probe(device_t dev) 921 { 922 #ifdef DEV_SC 923 int err; 924 #endif 925 926 if (!ofw_bus_status_okay(dev)) 927 return (ENXIO); 928 929 if (!ofw_bus_is_compatible(dev, "ti,am33xx-tilcdc")) 930 return (ENXIO); 931 932 device_set_desc(dev, "AM335x LCD controller"); 933 934 #ifdef DEV_SC 935 err = sc_probe_unit(device_get_unit(dev), 936 device_get_flags(dev) | SC_AUTODETECT_KBD); 937 if (err != 0) 938 return (err); 939 #endif 940 941 return (BUS_PROBE_DEFAULT); 942 } 943 944 static int 945 am335x_lcd_attach(device_t dev) 946 { 947 struct am335x_lcd_softc *sc; 948 949 int err; 950 int rid; 951 struct sysctl_ctx_list *ctx; 952 struct sysctl_oid *tree; 953 phandle_t root, panel_node; 954 955 err = 0; 956 sc = device_get_softc(dev); 957 sc->sc_dev = dev; 958 959 am335x_read_hdmi_property(dev); 960 961 root = OF_finddevice("/"); 962 if (root == 0) { 963 device_printf(dev, "failed to get FDT root node\n"); 964 return (ENXIO); 965 } 966 967 sc->sc_panel.ac_bias = 255; 968 sc->sc_panel.ac_bias_intrpt = 0; 969 sc->sc_panel.dma_burst_sz = 16; 970 sc->sc_panel.bpp = 16; 971 sc->sc_panel.fdd = 128; 972 sc->sc_panel.sync_edge = 0; 973 sc->sc_panel.sync_ctrl = 1; 974 975 panel_node = fdt_find_compatible(root, "ti,tilcdc,panel", 1); 976 if (panel_node != 0) { 977 device_printf(dev, "using static panel info\n"); 978 if (am335x_read_panel_info(dev, panel_node, &sc->sc_panel)) { 979 device_printf(dev, "failed to read panel info\n"); 980 return (ENXIO); 981 } 982 983 if (am335x_read_timing(dev, panel_node, &sc->sc_panel)) { 984 device_printf(dev, "failed to read timings\n"); 985 return (ENXIO); 986 } 987 } 988 989 ti_prcm_clk_enable(LCDC_CLK); 990 991 rid = 0; 992 sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, 993 RF_ACTIVE); 994 if (!sc->sc_mem_res) { 995 device_printf(dev, "cannot allocate memory window\n"); 996 return (ENXIO); 997 } 998 999 rid = 0; 1000 sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 1001 RF_ACTIVE); 1002 if (!sc->sc_irq_res) { 1003 bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res); 1004 device_printf(dev, "cannot allocate interrupt\n"); 1005 return (ENXIO); 1006 } 1007 1008 if (bus_setup_intr(dev, sc->sc_irq_res, INTR_TYPE_MISC | INTR_MPSAFE, 1009 NULL, am335x_lcd_intr, sc, 1010 &sc->sc_intr_hl) != 0) { 1011 bus_release_resource(dev, SYS_RES_IRQ, rid, 1012 sc->sc_irq_res); 1013 bus_release_resource(dev, SYS_RES_MEMORY, rid, 1014 sc->sc_mem_res); 1015 device_printf(dev, "Unable to setup the irq handler.\n"); 1016 return (ENXIO); 1017 } 1018 1019 LCD_LOCK_INIT(sc); 1020 1021 /* Init backlight interface */ 1022 ctx = device_get_sysctl_ctx(sc->sc_dev); 1023 tree = device_get_sysctl_tree(sc->sc_dev); 1024 sc->sc_oid = SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 1025 "backlight", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 1026 am335x_lcd_sysctl_backlight, "I", "LCD backlight"); 1027 sc->sc_backlight = 0; 1028 /* Check if eCAS interface is available at this point */ 1029 if (am335x_pwm_config_ecap(PWM_UNIT, 1030 PWM_PERIOD, PWM_PERIOD) == 0) 1031 sc->sc_backlight = 100; 1032 1033 if (panel_node != 0) 1034 am335x_lcd_configure(sc); 1035 else 1036 sc->sc_hdmi_evh = EVENTHANDLER_REGISTER(hdmi_event, 1037 am335x_lcd_hdmi_event, sc, EVENTHANDLER_PRI_ANY); 1038 1039 return (0); 1040 } 1041 1042 static int 1043 am335x_lcd_detach(device_t dev) 1044 { 1045 /* Do not let unload driver */ 1046 return (EBUSY); 1047 } 1048 1049 static struct fb_info * 1050 am335x_lcd_fb_getinfo(device_t dev) 1051 { 1052 struct am335x_lcd_softc *sc; 1053 1054 sc = device_get_softc(dev); 1055 1056 return (&sc->sc_fb_info); 1057 } 1058 1059 static device_method_t am335x_lcd_methods[] = { 1060 DEVMETHOD(device_probe, am335x_lcd_probe), 1061 DEVMETHOD(device_attach, am335x_lcd_attach), 1062 DEVMETHOD(device_detach, am335x_lcd_detach), 1063 1064 /* Framebuffer service methods */ 1065 DEVMETHOD(fb_getinfo, am335x_lcd_fb_getinfo), 1066 1067 DEVMETHOD_END 1068 }; 1069 1070 static driver_t am335x_lcd_driver = { 1071 "fb", 1072 am335x_lcd_methods, 1073 sizeof(struct am335x_lcd_softc), 1074 }; 1075 1076 static devclass_t am335x_lcd_devclass; 1077 1078 DRIVER_MODULE(am335x_lcd, simplebus, am335x_lcd_driver, am335x_lcd_devclass, 0, 0); 1079 MODULE_VERSION(am335x_lcd, 1); 1080 MODULE_DEPEND(am335x_lcd, simplebus, 1, 1, 1); 1081