1*24ca3d19SOleksandr Tymoshenko /*- 2*24ca3d19SOleksandr Tymoshenko * Copyright 2013 Oleksandr Tymoshenko <gonzo@freebsd.org> 3*24ca3d19SOleksandr Tymoshenko * All rights reserved. 4*24ca3d19SOleksandr Tymoshenko * 5*24ca3d19SOleksandr Tymoshenko * Redistribution and use in source and binary forms, with or without 6*24ca3d19SOleksandr Tymoshenko * modification, are permitted provided that the following conditions 7*24ca3d19SOleksandr Tymoshenko * are met: 8*24ca3d19SOleksandr Tymoshenko * 1. Redistributions of source code must retain the above copyright 9*24ca3d19SOleksandr Tymoshenko * notice, this list of conditions and the following disclaimer. 10*24ca3d19SOleksandr Tymoshenko * 2. Redistributions in binary form must reproduce the above copyright 11*24ca3d19SOleksandr Tymoshenko * notice, this list of conditions and the following disclaimer in the 12*24ca3d19SOleksandr Tymoshenko * documentation and/or other materials provided with the distribution. 13*24ca3d19SOleksandr Tymoshenko * 14*24ca3d19SOleksandr Tymoshenko * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15*24ca3d19SOleksandr Tymoshenko * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16*24ca3d19SOleksandr Tymoshenko * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17*24ca3d19SOleksandr Tymoshenko * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18*24ca3d19SOleksandr Tymoshenko * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19*24ca3d19SOleksandr Tymoshenko * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20*24ca3d19SOleksandr Tymoshenko * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21*24ca3d19SOleksandr Tymoshenko * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22*24ca3d19SOleksandr Tymoshenko * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23*24ca3d19SOleksandr Tymoshenko * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24*24ca3d19SOleksandr Tymoshenko * SUCH DAMAGE. 25*24ca3d19SOleksandr Tymoshenko */ 26*24ca3d19SOleksandr Tymoshenko 27*24ca3d19SOleksandr Tymoshenko #include <sys/cdefs.h> 28*24ca3d19SOleksandr Tymoshenko __FBSDID("$FreeBSD$"); 29*24ca3d19SOleksandr Tymoshenko 30*24ca3d19SOleksandr Tymoshenko #include <sys/param.h> 31*24ca3d19SOleksandr Tymoshenko #include <sys/systm.h> 32*24ca3d19SOleksandr Tymoshenko #include <sys/kernel.h> 33*24ca3d19SOleksandr Tymoshenko #include <sys/module.h> 34*24ca3d19SOleksandr Tymoshenko #include <sys/clock.h> 35*24ca3d19SOleksandr Tymoshenko #include <sys/time.h> 36*24ca3d19SOleksandr Tymoshenko #include <sys/bus.h> 37*24ca3d19SOleksandr Tymoshenko #include <sys/lock.h> 38*24ca3d19SOleksandr Tymoshenko #include <sys/mutex.h> 39*24ca3d19SOleksandr Tymoshenko #include <sys/resource.h> 40*24ca3d19SOleksandr Tymoshenko #include <sys/rman.h> 41*24ca3d19SOleksandr Tymoshenko #include <sys/sysctl.h> 42*24ca3d19SOleksandr Tymoshenko #include <vm/vm.h> 43*24ca3d19SOleksandr Tymoshenko #include <vm/pmap.h> 44*24ca3d19SOleksandr Tymoshenko 45*24ca3d19SOleksandr Tymoshenko #include <machine/bus.h> 46*24ca3d19SOleksandr Tymoshenko 47*24ca3d19SOleksandr Tymoshenko #include <dev/fdt/fdt_common.h> 48*24ca3d19SOleksandr Tymoshenko #include <dev/ofw/openfirm.h> 49*24ca3d19SOleksandr Tymoshenko #include <dev/ofw/ofw_bus.h> 50*24ca3d19SOleksandr Tymoshenko #include <dev/ofw/ofw_bus_subr.h> 51*24ca3d19SOleksandr Tymoshenko 52*24ca3d19SOleksandr Tymoshenko #include <arm/ti/ti_prcm.h> 53*24ca3d19SOleksandr Tymoshenko #include <arm/ti/ti_scm.h> 54*24ca3d19SOleksandr Tymoshenko 55*24ca3d19SOleksandr Tymoshenko #include "am335x_lcd.h" 56*24ca3d19SOleksandr Tymoshenko #include "am335x_pwm.h" 57*24ca3d19SOleksandr Tymoshenko 58*24ca3d19SOleksandr Tymoshenko #define LCD_PID 0x00 59*24ca3d19SOleksandr Tymoshenko #define LCD_CTRL 0x04 60*24ca3d19SOleksandr Tymoshenko #define CTRL_DIV_MASK 0xff 61*24ca3d19SOleksandr Tymoshenko #define CTRL_DIV_SHIFT 8 62*24ca3d19SOleksandr Tymoshenko #define CTRL_AUTO_UFLOW_RESTART (1 << 1) 63*24ca3d19SOleksandr Tymoshenko #define CTRL_RASTER_MODE 1 64*24ca3d19SOleksandr Tymoshenko #define CTRL_LIDD_MODE 0 65*24ca3d19SOleksandr Tymoshenko #define LCD_LIDD_CTRL 0x0C 66*24ca3d19SOleksandr Tymoshenko #define LCD_LIDD_CS0_CONF 0x10 67*24ca3d19SOleksandr Tymoshenko #define LCD_LIDD_CS0_ADDR 0x14 68*24ca3d19SOleksandr Tymoshenko #define LCD_LIDD_CS0_DATA 0x18 69*24ca3d19SOleksandr Tymoshenko #define LCD_LIDD_CS1_CONF 0x1C 70*24ca3d19SOleksandr Tymoshenko #define LCD_LIDD_CS1_ADDR 0x20 71*24ca3d19SOleksandr Tymoshenko #define LCD_LIDD_CS1_DATA 0x24 72*24ca3d19SOleksandr Tymoshenko #define LCD_RASTER_CTRL 0x28 73*24ca3d19SOleksandr Tymoshenko #define RASTER_CTRL_TFT24_UNPACKED (1 << 26) 74*24ca3d19SOleksandr Tymoshenko #define RASTER_CTRL_TFT24 (1 << 25) 75*24ca3d19SOleksandr Tymoshenko #define RASTER_CTRL_STN565 (1 << 24) 76*24ca3d19SOleksandr Tymoshenko #define RASTER_CTRL_TFTPMAP (1 << 23) 77*24ca3d19SOleksandr Tymoshenko #define RASTER_CTRL_NIBMODE (1 << 22) 78*24ca3d19SOleksandr Tymoshenko #define RASTER_CTRL_PALMODE_SHIFT 20 79*24ca3d19SOleksandr Tymoshenko #define PALETTE_PALETTE_AND_DATA 0x00 80*24ca3d19SOleksandr Tymoshenko #define PALETTE_PALETTE_ONLY 0x01 81*24ca3d19SOleksandr Tymoshenko #define PALETTE_DATA_ONLY 0x02 82*24ca3d19SOleksandr Tymoshenko #define RASTER_CTRL_REQDLY_SHIFT 12 83*24ca3d19SOleksandr Tymoshenko #define RASTER_CTRL_MONO8B (1 << 9) 84*24ca3d19SOleksandr Tymoshenko #define RASTER_CTRL_RBORDER (1 << 8) 85*24ca3d19SOleksandr Tymoshenko #define RASTER_CTRL_LCDTFT (1 << 7) 86*24ca3d19SOleksandr Tymoshenko #define RASTER_CTRL_LCDBW (1 << 1) 87*24ca3d19SOleksandr Tymoshenko #define RASTER_CTRL_LCDEN (1 << 0) 88*24ca3d19SOleksandr Tymoshenko #define LCD_RASTER_TIMING_0 0x2C 89*24ca3d19SOleksandr Tymoshenko #define RASTER_TIMING_0_HBP_SHIFT 24 90*24ca3d19SOleksandr Tymoshenko #define RASTER_TIMING_0_HFP_SHIFT 16 91*24ca3d19SOleksandr Tymoshenko #define RASTER_TIMING_0_HSW_SHIFT 10 92*24ca3d19SOleksandr Tymoshenko #define RASTER_TIMING_0_PPLLSB_SHIFT 4 93*24ca3d19SOleksandr Tymoshenko #define RASTER_TIMING_0_PPLMSB_SHIFT 3 94*24ca3d19SOleksandr Tymoshenko #define LCD_RASTER_TIMING_1 0x30 95*24ca3d19SOleksandr Tymoshenko #define RASTER_TIMING_1_VBP_SHIFT 24 96*24ca3d19SOleksandr Tymoshenko #define RASTER_TIMING_1_VFP_SHIFT 16 97*24ca3d19SOleksandr Tymoshenko #define RASTER_TIMING_1_VSW_SHIFT 10 98*24ca3d19SOleksandr Tymoshenko #define RASTER_TIMING_1_LPP_SHIFT 0 99*24ca3d19SOleksandr Tymoshenko #define LCD_RASTER_TIMING_2 0x34 100*24ca3d19SOleksandr Tymoshenko #define RASTER_TIMING_2_HSWHI_SHIFT 27 101*24ca3d19SOleksandr Tymoshenko #define RASTER_TIMING_2_LPP_B10_SHIFT 26 102*24ca3d19SOleksandr Tymoshenko #define RASTER_TIMING_2_PHSVS (1 << 25) 103*24ca3d19SOleksandr Tymoshenko #define RASTER_TIMING_2_PHSVS_RISE (1 << 24) 104*24ca3d19SOleksandr Tymoshenko #define RASTER_TIMING_2_PHSVS_FALL (0 << 24) 105*24ca3d19SOleksandr Tymoshenko #define RASTER_TIMING_2_IOE (1 << 23) 106*24ca3d19SOleksandr Tymoshenko #define RASTER_TIMING_2_IPC (1 << 22) 107*24ca3d19SOleksandr Tymoshenko #define RASTER_TIMING_2_IHS (1 << 21) 108*24ca3d19SOleksandr Tymoshenko #define RASTER_TIMING_2_IVS (1 << 20) 109*24ca3d19SOleksandr Tymoshenko #define RASTER_TIMING_2_ACBI_SHIFT 16 110*24ca3d19SOleksandr Tymoshenko #define RASTER_TIMING_2_ACB_SHIFT 8 111*24ca3d19SOleksandr Tymoshenko #define RASTER_TIMING_2_HBPHI_SHIFT 4 112*24ca3d19SOleksandr Tymoshenko #define RASTER_TIMING_2_HFPHI_SHIFT 0 113*24ca3d19SOleksandr Tymoshenko #define LCD_RASTER_SUBPANEL 0x38 114*24ca3d19SOleksandr Tymoshenko #define LCD_RASTER_SUBPANEL2 0x3C 115*24ca3d19SOleksandr Tymoshenko #define LCD_LCDDMA_CTRL 0x40 116*24ca3d19SOleksandr Tymoshenko #define LCDDMA_CTRL_DMA_MASTER_PRIO_SHIFT 16 117*24ca3d19SOleksandr Tymoshenko #define LCDDMA_CTRL_TH_FIFO_RDY_SHIFT 8 118*24ca3d19SOleksandr Tymoshenko #define LCDDMA_CTRL_BURST_SIZE_SHIFT 4 119*24ca3d19SOleksandr Tymoshenko #define LCDDMA_CTRL_BYTES_SWAP (1 << 3) 120*24ca3d19SOleksandr Tymoshenko #define LCDDMA_CTRL_BE (1 << 1) 121*24ca3d19SOleksandr Tymoshenko #define LCDDMA_CTRL_FB0_ONLY 0 122*24ca3d19SOleksandr Tymoshenko #define LCDDMA_CTRL_FB0_FB1 (1 << 0) 123*24ca3d19SOleksandr Tymoshenko #define LCD_LCDDMA_FB0_BASE 0x44 124*24ca3d19SOleksandr Tymoshenko #define LCD_LCDDMA_FB0_CEILING 0x48 125*24ca3d19SOleksandr Tymoshenko #define LCD_LCDDMA_FB1_BASE 0x4C 126*24ca3d19SOleksandr Tymoshenko #define LCD_LCDDMA_FB1_CEILING 0x50 127*24ca3d19SOleksandr Tymoshenko #define LCD_SYSCONFIG 0x54 128*24ca3d19SOleksandr Tymoshenko #define SYSCONFIG_STANDBY_FORCE (0 << 4) 129*24ca3d19SOleksandr Tymoshenko #define SYSCONFIG_STANDBY_NONE (1 << 4) 130*24ca3d19SOleksandr Tymoshenko #define SYSCONFIG_STANDBY_SMART (2 << 4) 131*24ca3d19SOleksandr Tymoshenko #define SYSCONFIG_IDLE_FORCE (0 << 2) 132*24ca3d19SOleksandr Tymoshenko #define SYSCONFIG_IDLE_NONE (1 << 2) 133*24ca3d19SOleksandr Tymoshenko #define SYSCONFIG_IDLE_SMART (2 << 2) 134*24ca3d19SOleksandr Tymoshenko #define LCD_IRQSTATUS_RAW 0x58 135*24ca3d19SOleksandr Tymoshenko #define LCD_IRQSTATUS 0x5C 136*24ca3d19SOleksandr Tymoshenko #define LCD_IRQENABLE_SET 0x60 137*24ca3d19SOleksandr Tymoshenko #define LCD_IRQENABLE_CLEAR 0x64 138*24ca3d19SOleksandr Tymoshenko #define IRQ_EOF1 (1 << 9) 139*24ca3d19SOleksandr Tymoshenko #define IRQ_EOF0 (1 << 8) 140*24ca3d19SOleksandr Tymoshenko #define IRQ_PL (1 << 6) 141*24ca3d19SOleksandr Tymoshenko #define IRQ_FUF (1 << 5) 142*24ca3d19SOleksandr Tymoshenko #define IRQ_ACB (1 << 3) 143*24ca3d19SOleksandr Tymoshenko #define IRQ_SYNC_LOST (1 << 2) 144*24ca3d19SOleksandr Tymoshenko #define IRQ_RASTER_DONE (1 << 1) 145*24ca3d19SOleksandr Tymoshenko #define IRQ_FRAME_DONE (1 << 0) 146*24ca3d19SOleksandr Tymoshenko #define LCD_CLKC_ENABLE 0x6C 147*24ca3d19SOleksandr Tymoshenko #define CLKC_ENABLE_DMA (1 << 2) 148*24ca3d19SOleksandr Tymoshenko #define CLKC_ENABLE_LDID (1 << 1) 149*24ca3d19SOleksandr Tymoshenko #define CLKC_ENABLE_CORE (1 << 0) 150*24ca3d19SOleksandr Tymoshenko #define LCD_CLKC_RESET 0x70 151*24ca3d19SOleksandr Tymoshenko #define CLKC_RESET_MAIN (1 << 3) 152*24ca3d19SOleksandr Tymoshenko #define CLKC_RESET_DMA (1 << 2) 153*24ca3d19SOleksandr Tymoshenko #define CLKC_RESET_LDID (1 << 1) 154*24ca3d19SOleksandr Tymoshenko #define CLKC_RESET_CORE (1 << 0) 155*24ca3d19SOleksandr Tymoshenko 156*24ca3d19SOleksandr Tymoshenko #define LCD_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) 157*24ca3d19SOleksandr Tymoshenko #define LCD_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) 158*24ca3d19SOleksandr Tymoshenko #define LCD_LOCK_INIT(_sc) mtx_init(&(_sc)->sc_mtx, \ 159*24ca3d19SOleksandr Tymoshenko device_get_nameunit(_sc->sc_dev), "am335x_lcd", MTX_DEF) 160*24ca3d19SOleksandr Tymoshenko #define LCD_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->sc_mtx); 161*24ca3d19SOleksandr Tymoshenko 162*24ca3d19SOleksandr Tymoshenko #define LCD_READ4(_sc, reg) bus_read_4((_sc)->sc_mem_res, reg); 163*24ca3d19SOleksandr Tymoshenko #define LCD_WRITE4(_sc, reg, value) \ 164*24ca3d19SOleksandr Tymoshenko bus_write_4((_sc)->sc_mem_res, reg, value); 165*24ca3d19SOleksandr Tymoshenko 166*24ca3d19SOleksandr Tymoshenko 167*24ca3d19SOleksandr Tymoshenko /* Backlight is controlled by eCAS interface on PWM unit 0 */ 168*24ca3d19SOleksandr Tymoshenko #define PWM_UNIT 0 169*24ca3d19SOleksandr Tymoshenko #define PWM_PERIOD 100 170*24ca3d19SOleksandr Tymoshenko 171*24ca3d19SOleksandr Tymoshenko struct am335x_lcd_softc { 172*24ca3d19SOleksandr Tymoshenko device_t sc_dev; 173*24ca3d19SOleksandr Tymoshenko struct resource *sc_mem_res; 174*24ca3d19SOleksandr Tymoshenko struct resource *sc_irq_res; 175*24ca3d19SOleksandr Tymoshenko void *sc_intr_hl; 176*24ca3d19SOleksandr Tymoshenko struct mtx sc_mtx; 177*24ca3d19SOleksandr Tymoshenko int sc_backlight; 178*24ca3d19SOleksandr Tymoshenko struct sysctl_oid *sc_oid; 179*24ca3d19SOleksandr Tymoshenko 180*24ca3d19SOleksandr Tymoshenko /* Framebuffer */ 181*24ca3d19SOleksandr Tymoshenko bus_dma_tag_t sc_dma_tag; 182*24ca3d19SOleksandr Tymoshenko bus_dmamap_t sc_dma_map; 183*24ca3d19SOleksandr Tymoshenko size_t sc_fb_size; 184*24ca3d19SOleksandr Tymoshenko bus_addr_t sc_fb_phys; 185*24ca3d19SOleksandr Tymoshenko uint8_t *sc_fb_base; 186*24ca3d19SOleksandr Tymoshenko }; 187*24ca3d19SOleksandr Tymoshenko 188*24ca3d19SOleksandr Tymoshenko static void 189*24ca3d19SOleksandr Tymoshenko am335x_fb_dmamap_cb(void *arg, bus_dma_segment_t *segs, int nseg, int err) 190*24ca3d19SOleksandr Tymoshenko { 191*24ca3d19SOleksandr Tymoshenko bus_addr_t *addr; 192*24ca3d19SOleksandr Tymoshenko 193*24ca3d19SOleksandr Tymoshenko if (err) 194*24ca3d19SOleksandr Tymoshenko return; 195*24ca3d19SOleksandr Tymoshenko 196*24ca3d19SOleksandr Tymoshenko addr = (bus_addr_t*)arg; 197*24ca3d19SOleksandr Tymoshenko *addr = segs[0].ds_addr; 198*24ca3d19SOleksandr Tymoshenko } 199*24ca3d19SOleksandr Tymoshenko 200*24ca3d19SOleksandr Tymoshenko static uint32_t 201*24ca3d19SOleksandr Tymoshenko am335x_lcd_calc_divisor(uint32_t reference, uint32_t freq) 202*24ca3d19SOleksandr Tymoshenko { 203*24ca3d19SOleksandr Tymoshenko uint32_t div; 204*24ca3d19SOleksandr Tymoshenko /* Raster mode case: divisors are in range from 2 to 255 */ 205*24ca3d19SOleksandr Tymoshenko for (div = 2; div < 255; div++) 206*24ca3d19SOleksandr Tymoshenko if (reference/div <= freq) 207*24ca3d19SOleksandr Tymoshenko return (div); 208*24ca3d19SOleksandr Tymoshenko 209*24ca3d19SOleksandr Tymoshenko return (255); 210*24ca3d19SOleksandr Tymoshenko } 211*24ca3d19SOleksandr Tymoshenko 212*24ca3d19SOleksandr Tymoshenko static int 213*24ca3d19SOleksandr Tymoshenko am335x_lcd_sysctl_backlight(SYSCTL_HANDLER_ARGS) 214*24ca3d19SOleksandr Tymoshenko { 215*24ca3d19SOleksandr Tymoshenko struct am335x_lcd_softc *sc = (struct am335x_lcd_softc*)arg1; 216*24ca3d19SOleksandr Tymoshenko int error; 217*24ca3d19SOleksandr Tymoshenko int backlight; 218*24ca3d19SOleksandr Tymoshenko 219*24ca3d19SOleksandr Tymoshenko backlight = sc->sc_backlight;; 220*24ca3d19SOleksandr Tymoshenko error = sysctl_handle_int(oidp, &backlight, 0, req); 221*24ca3d19SOleksandr Tymoshenko 222*24ca3d19SOleksandr Tymoshenko if (error != 0 || req->newptr == NULL) 223*24ca3d19SOleksandr Tymoshenko return (error); 224*24ca3d19SOleksandr Tymoshenko 225*24ca3d19SOleksandr Tymoshenko if (backlight < 0) 226*24ca3d19SOleksandr Tymoshenko backlight = 0; 227*24ca3d19SOleksandr Tymoshenko if (backlight > 100) 228*24ca3d19SOleksandr Tymoshenko backlight = 100; 229*24ca3d19SOleksandr Tymoshenko 230*24ca3d19SOleksandr Tymoshenko LCD_LOCK(sc); 231*24ca3d19SOleksandr Tymoshenko error = am335x_pwm_config_ecas(PWM_UNIT, PWM_PERIOD, 232*24ca3d19SOleksandr Tymoshenko backlight*PWM_PERIOD/100); 233*24ca3d19SOleksandr Tymoshenko if (error == 0) 234*24ca3d19SOleksandr Tymoshenko sc->sc_backlight = backlight; 235*24ca3d19SOleksandr Tymoshenko LCD_UNLOCK(sc); 236*24ca3d19SOleksandr Tymoshenko 237*24ca3d19SOleksandr Tymoshenko return (error); 238*24ca3d19SOleksandr Tymoshenko } 239*24ca3d19SOleksandr Tymoshenko 240*24ca3d19SOleksandr Tymoshenko static int 241*24ca3d19SOleksandr Tymoshenko am335x_read_panel_property(device_t dev, const char *name, uint32_t *val) 242*24ca3d19SOleksandr Tymoshenko { 243*24ca3d19SOleksandr Tymoshenko phandle_t node; 244*24ca3d19SOleksandr Tymoshenko pcell_t cell; 245*24ca3d19SOleksandr Tymoshenko 246*24ca3d19SOleksandr Tymoshenko node = ofw_bus_get_node(dev); 247*24ca3d19SOleksandr Tymoshenko if ((OF_getprop(node, name, &cell, sizeof(cell))) <= 0) { 248*24ca3d19SOleksandr Tymoshenko device_printf(dev, "missing '%s' attribute in LCD panel info\n", 249*24ca3d19SOleksandr Tymoshenko name); 250*24ca3d19SOleksandr Tymoshenko return (ENXIO); 251*24ca3d19SOleksandr Tymoshenko } 252*24ca3d19SOleksandr Tymoshenko 253*24ca3d19SOleksandr Tymoshenko *val = fdt32_to_cpu(cell); 254*24ca3d19SOleksandr Tymoshenko 255*24ca3d19SOleksandr Tymoshenko return (0); 256*24ca3d19SOleksandr Tymoshenko } 257*24ca3d19SOleksandr Tymoshenko 258*24ca3d19SOleksandr Tymoshenko static int 259*24ca3d19SOleksandr Tymoshenko am335x_read_panel_info(device_t dev, struct panel_info *panel) 260*24ca3d19SOleksandr Tymoshenko { 261*24ca3d19SOleksandr Tymoshenko int error; 262*24ca3d19SOleksandr Tymoshenko 263*24ca3d19SOleksandr Tymoshenko error = 0; 264*24ca3d19SOleksandr Tymoshenko if ((error = am335x_read_panel_property(dev, 265*24ca3d19SOleksandr Tymoshenko "panel_width", &panel->panel_width))) 266*24ca3d19SOleksandr Tymoshenko goto out; 267*24ca3d19SOleksandr Tymoshenko 268*24ca3d19SOleksandr Tymoshenko if ((error = am335x_read_panel_property(dev, 269*24ca3d19SOleksandr Tymoshenko "panel_height", &panel->panel_height))) 270*24ca3d19SOleksandr Tymoshenko goto out; 271*24ca3d19SOleksandr Tymoshenko 272*24ca3d19SOleksandr Tymoshenko if ((error = am335x_read_panel_property(dev, 273*24ca3d19SOleksandr Tymoshenko "panel_hfp", &panel->panel_hfp))) 274*24ca3d19SOleksandr Tymoshenko goto out; 275*24ca3d19SOleksandr Tymoshenko 276*24ca3d19SOleksandr Tymoshenko if ((error = am335x_read_panel_property(dev, 277*24ca3d19SOleksandr Tymoshenko "panel_hbp", &panel->panel_hbp))) 278*24ca3d19SOleksandr Tymoshenko goto out; 279*24ca3d19SOleksandr Tymoshenko 280*24ca3d19SOleksandr Tymoshenko if ((error = am335x_read_panel_property(dev, 281*24ca3d19SOleksandr Tymoshenko "panel_hsw", &panel->panel_hsw))) 282*24ca3d19SOleksandr Tymoshenko goto out; 283*24ca3d19SOleksandr Tymoshenko 284*24ca3d19SOleksandr Tymoshenko if ((error = am335x_read_panel_property(dev, 285*24ca3d19SOleksandr Tymoshenko "panel_vfp", &panel->panel_vfp))) 286*24ca3d19SOleksandr Tymoshenko goto out; 287*24ca3d19SOleksandr Tymoshenko 288*24ca3d19SOleksandr Tymoshenko if ((error = am335x_read_panel_property(dev, 289*24ca3d19SOleksandr Tymoshenko "panel_vbp", &panel->panel_vbp))) 290*24ca3d19SOleksandr Tymoshenko goto out; 291*24ca3d19SOleksandr Tymoshenko 292*24ca3d19SOleksandr Tymoshenko if ((error = am335x_read_panel_property(dev, 293*24ca3d19SOleksandr Tymoshenko "panel_vsw", &panel->panel_vsw))) 294*24ca3d19SOleksandr Tymoshenko goto out; 295*24ca3d19SOleksandr Tymoshenko 296*24ca3d19SOleksandr Tymoshenko if ((error = am335x_read_panel_property(dev, 297*24ca3d19SOleksandr Tymoshenko "panel_pxl_clk", &panel->panel_pxl_clk))) 298*24ca3d19SOleksandr Tymoshenko goto out; 299*24ca3d19SOleksandr Tymoshenko 300*24ca3d19SOleksandr Tymoshenko if ((error = am335x_read_panel_property(dev, 301*24ca3d19SOleksandr Tymoshenko "panel_invert_pxl_clk", &panel->panel_invert_pxl_clk))) 302*24ca3d19SOleksandr Tymoshenko goto out; 303*24ca3d19SOleksandr Tymoshenko 304*24ca3d19SOleksandr Tymoshenko if ((error = am335x_read_panel_property(dev, 305*24ca3d19SOleksandr Tymoshenko "ac_bias", &panel->ac_bias))) 306*24ca3d19SOleksandr Tymoshenko goto out; 307*24ca3d19SOleksandr Tymoshenko 308*24ca3d19SOleksandr Tymoshenko if ((error = am335x_read_panel_property(dev, 309*24ca3d19SOleksandr Tymoshenko "ac_bias_intrpt", &panel->ac_bias_intrpt))) 310*24ca3d19SOleksandr Tymoshenko goto out; 311*24ca3d19SOleksandr Tymoshenko 312*24ca3d19SOleksandr Tymoshenko if ((error = am335x_read_panel_property(dev, 313*24ca3d19SOleksandr Tymoshenko "dma_burst_sz", &panel->dma_burst_sz))) 314*24ca3d19SOleksandr Tymoshenko goto out; 315*24ca3d19SOleksandr Tymoshenko 316*24ca3d19SOleksandr Tymoshenko if ((error = am335x_read_panel_property(dev, 317*24ca3d19SOleksandr Tymoshenko "bpp", &panel->bpp))) 318*24ca3d19SOleksandr Tymoshenko goto out; 319*24ca3d19SOleksandr Tymoshenko 320*24ca3d19SOleksandr Tymoshenko if ((error = am335x_read_panel_property(dev, 321*24ca3d19SOleksandr Tymoshenko "fdd", &panel->fdd))) 322*24ca3d19SOleksandr Tymoshenko goto out; 323*24ca3d19SOleksandr Tymoshenko 324*24ca3d19SOleksandr Tymoshenko if ((error = am335x_read_panel_property(dev, 325*24ca3d19SOleksandr Tymoshenko "invert_line_clock", &panel->invert_line_clock))) 326*24ca3d19SOleksandr Tymoshenko goto out; 327*24ca3d19SOleksandr Tymoshenko 328*24ca3d19SOleksandr Tymoshenko if ((error = am335x_read_panel_property(dev, 329*24ca3d19SOleksandr Tymoshenko "invert_frm_clock", &panel->invert_frm_clock))) 330*24ca3d19SOleksandr Tymoshenko goto out; 331*24ca3d19SOleksandr Tymoshenko 332*24ca3d19SOleksandr Tymoshenko if ((error = am335x_read_panel_property(dev, 333*24ca3d19SOleksandr Tymoshenko "sync_edge", &panel->sync_edge))) 334*24ca3d19SOleksandr Tymoshenko goto out; 335*24ca3d19SOleksandr Tymoshenko 336*24ca3d19SOleksandr Tymoshenko error = am335x_read_panel_property(dev, 337*24ca3d19SOleksandr Tymoshenko "sync_ctrl", &panel->sync_ctrl); 338*24ca3d19SOleksandr Tymoshenko 339*24ca3d19SOleksandr Tymoshenko out: 340*24ca3d19SOleksandr Tymoshenko return (error); 341*24ca3d19SOleksandr Tymoshenko } 342*24ca3d19SOleksandr Tymoshenko 343*24ca3d19SOleksandr Tymoshenko static void 344*24ca3d19SOleksandr Tymoshenko am335x_lcd_intr(void *arg) 345*24ca3d19SOleksandr Tymoshenko { 346*24ca3d19SOleksandr Tymoshenko struct am335x_lcd_softc *sc = arg; 347*24ca3d19SOleksandr Tymoshenko uint32_t reg; 348*24ca3d19SOleksandr Tymoshenko 349*24ca3d19SOleksandr Tymoshenko reg = LCD_READ4(sc, LCD_IRQSTATUS); 350*24ca3d19SOleksandr Tymoshenko LCD_WRITE4(sc, LCD_IRQSTATUS, reg); 351*24ca3d19SOleksandr Tymoshenko 352*24ca3d19SOleksandr Tymoshenko if (reg & IRQ_SYNC_LOST) { 353*24ca3d19SOleksandr Tymoshenko reg = LCD_READ4(sc, LCD_RASTER_CTRL); 354*24ca3d19SOleksandr Tymoshenko reg &= ~RASTER_CTRL_LCDEN; 355*24ca3d19SOleksandr Tymoshenko LCD_WRITE4(sc, LCD_RASTER_CTRL, reg); 356*24ca3d19SOleksandr Tymoshenko 357*24ca3d19SOleksandr Tymoshenko reg = LCD_READ4(sc, LCD_RASTER_CTRL); 358*24ca3d19SOleksandr Tymoshenko reg |= RASTER_CTRL_LCDEN; 359*24ca3d19SOleksandr Tymoshenko LCD_WRITE4(sc, LCD_RASTER_CTRL, reg); 360*24ca3d19SOleksandr Tymoshenko return; 361*24ca3d19SOleksandr Tymoshenko } 362*24ca3d19SOleksandr Tymoshenko 363*24ca3d19SOleksandr Tymoshenko if (reg & IRQ_PL) { 364*24ca3d19SOleksandr Tymoshenko reg = LCD_READ4(sc, LCD_RASTER_CTRL); 365*24ca3d19SOleksandr Tymoshenko reg &= ~RASTER_CTRL_LCDEN; 366*24ca3d19SOleksandr Tymoshenko LCD_WRITE4(sc, LCD_RASTER_CTRL, reg); 367*24ca3d19SOleksandr Tymoshenko 368*24ca3d19SOleksandr Tymoshenko reg = LCD_READ4(sc, LCD_RASTER_CTRL); 369*24ca3d19SOleksandr Tymoshenko reg |= RASTER_CTRL_LCDEN; 370*24ca3d19SOleksandr Tymoshenko LCD_WRITE4(sc, LCD_RASTER_CTRL, reg); 371*24ca3d19SOleksandr Tymoshenko return; 372*24ca3d19SOleksandr Tymoshenko } 373*24ca3d19SOleksandr Tymoshenko 374*24ca3d19SOleksandr Tymoshenko if (reg & IRQ_EOF0) { 375*24ca3d19SOleksandr Tymoshenko LCD_WRITE4(sc, LCD_LCDDMA_FB0_BASE, sc->sc_fb_phys); 376*24ca3d19SOleksandr Tymoshenko LCD_WRITE4(sc, LCD_LCDDMA_FB0_CEILING, sc->sc_fb_phys + sc->sc_fb_size - 1); 377*24ca3d19SOleksandr Tymoshenko reg &= ~IRQ_EOF0; 378*24ca3d19SOleksandr Tymoshenko } 379*24ca3d19SOleksandr Tymoshenko 380*24ca3d19SOleksandr Tymoshenko if (reg & IRQ_EOF1) { 381*24ca3d19SOleksandr Tymoshenko LCD_WRITE4(sc, LCD_LCDDMA_FB1_BASE, sc->sc_fb_phys); 382*24ca3d19SOleksandr Tymoshenko LCD_WRITE4(sc, LCD_LCDDMA_FB1_CEILING, sc->sc_fb_phys + sc->sc_fb_size - 1); 383*24ca3d19SOleksandr Tymoshenko reg &= ~IRQ_EOF1; 384*24ca3d19SOleksandr Tymoshenko } 385*24ca3d19SOleksandr Tymoshenko 386*24ca3d19SOleksandr Tymoshenko if (reg & IRQ_FUF) { 387*24ca3d19SOleksandr Tymoshenko /* TODO: Handle FUF */ 388*24ca3d19SOleksandr Tymoshenko } 389*24ca3d19SOleksandr Tymoshenko 390*24ca3d19SOleksandr Tymoshenko if (reg & IRQ_ACB) { 391*24ca3d19SOleksandr Tymoshenko /* TODO: Handle ACB */ 392*24ca3d19SOleksandr Tymoshenko } 393*24ca3d19SOleksandr Tymoshenko } 394*24ca3d19SOleksandr Tymoshenko 395*24ca3d19SOleksandr Tymoshenko static int 396*24ca3d19SOleksandr Tymoshenko am335x_lcd_probe(device_t dev) 397*24ca3d19SOleksandr Tymoshenko { 398*24ca3d19SOleksandr Tymoshenko if (!ofw_bus_is_compatible(dev, "ti,am335x-lcd")) 399*24ca3d19SOleksandr Tymoshenko return (ENXIO); 400*24ca3d19SOleksandr Tymoshenko 401*24ca3d19SOleksandr Tymoshenko device_set_desc(dev, "AM335x LCD controller"); 402*24ca3d19SOleksandr Tymoshenko 403*24ca3d19SOleksandr Tymoshenko return (0); 404*24ca3d19SOleksandr Tymoshenko } 405*24ca3d19SOleksandr Tymoshenko 406*24ca3d19SOleksandr Tymoshenko static int 407*24ca3d19SOleksandr Tymoshenko am335x_lcd_attach(device_t dev) 408*24ca3d19SOleksandr Tymoshenko { 409*24ca3d19SOleksandr Tymoshenko struct am335x_lcd_softc *sc; 410*24ca3d19SOleksandr Tymoshenko int rid; 411*24ca3d19SOleksandr Tymoshenko int div; 412*24ca3d19SOleksandr Tymoshenko struct panel_info panel; 413*24ca3d19SOleksandr Tymoshenko uint32_t reg, timing0, timing1, timing2; 414*24ca3d19SOleksandr Tymoshenko struct sysctl_ctx_list *ctx; 415*24ca3d19SOleksandr Tymoshenko struct sysctl_oid *tree; 416*24ca3d19SOleksandr Tymoshenko uint32_t burst_log; 417*24ca3d19SOleksandr Tymoshenko int err; 418*24ca3d19SOleksandr Tymoshenko size_t dma_size; 419*24ca3d19SOleksandr Tymoshenko 420*24ca3d19SOleksandr Tymoshenko sc = device_get_softc(dev); 421*24ca3d19SOleksandr Tymoshenko sc->sc_dev = dev; 422*24ca3d19SOleksandr Tymoshenko 423*24ca3d19SOleksandr Tymoshenko if (am335x_read_panel_info(dev, &panel)) 424*24ca3d19SOleksandr Tymoshenko return (ENXIO); 425*24ca3d19SOleksandr Tymoshenko 426*24ca3d19SOleksandr Tymoshenko int ref_freq = 0; 427*24ca3d19SOleksandr Tymoshenko ti_prcm_clk_enable(LCDC_CLK); 428*24ca3d19SOleksandr Tymoshenko if (ti_prcm_clk_get_source_freq(LCDC_CLK, &ref_freq)) { 429*24ca3d19SOleksandr Tymoshenko device_printf(dev, "Can't get reference frequency\n"); 430*24ca3d19SOleksandr Tymoshenko return (ENXIO); 431*24ca3d19SOleksandr Tymoshenko } 432*24ca3d19SOleksandr Tymoshenko 433*24ca3d19SOleksandr Tymoshenko rid = 0; 434*24ca3d19SOleksandr Tymoshenko sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, 435*24ca3d19SOleksandr Tymoshenko RF_ACTIVE); 436*24ca3d19SOleksandr Tymoshenko if (!sc->sc_mem_res) { 437*24ca3d19SOleksandr Tymoshenko device_printf(dev, "cannot allocate memory window\n"); 438*24ca3d19SOleksandr Tymoshenko return (ENXIO); 439*24ca3d19SOleksandr Tymoshenko } 440*24ca3d19SOleksandr Tymoshenko 441*24ca3d19SOleksandr Tymoshenko rid = 0; 442*24ca3d19SOleksandr Tymoshenko sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 443*24ca3d19SOleksandr Tymoshenko RF_ACTIVE); 444*24ca3d19SOleksandr Tymoshenko if (!sc->sc_irq_res) { 445*24ca3d19SOleksandr Tymoshenko bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res); 446*24ca3d19SOleksandr Tymoshenko device_printf(dev, "cannot allocate interrupt\n"); 447*24ca3d19SOleksandr Tymoshenko return (ENXIO); 448*24ca3d19SOleksandr Tymoshenko } 449*24ca3d19SOleksandr Tymoshenko 450*24ca3d19SOleksandr Tymoshenko if (bus_setup_intr(dev, sc->sc_irq_res, INTR_TYPE_MISC | INTR_MPSAFE, 451*24ca3d19SOleksandr Tymoshenko NULL, am335x_lcd_intr, sc, 452*24ca3d19SOleksandr Tymoshenko &sc->sc_intr_hl) != 0) { 453*24ca3d19SOleksandr Tymoshenko bus_release_resource(dev, SYS_RES_IRQ, rid, 454*24ca3d19SOleksandr Tymoshenko sc->sc_irq_res); 455*24ca3d19SOleksandr Tymoshenko bus_release_resource(dev, SYS_RES_MEMORY, rid, 456*24ca3d19SOleksandr Tymoshenko sc->sc_mem_res); 457*24ca3d19SOleksandr Tymoshenko device_printf(dev, "Unable to setup the irq handler.\n"); 458*24ca3d19SOleksandr Tymoshenko return (ENXIO); 459*24ca3d19SOleksandr Tymoshenko } 460*24ca3d19SOleksandr Tymoshenko 461*24ca3d19SOleksandr Tymoshenko LCD_LOCK_INIT(sc); 462*24ca3d19SOleksandr Tymoshenko 463*24ca3d19SOleksandr Tymoshenko /* Panle initialization */ 464*24ca3d19SOleksandr Tymoshenko dma_size = round_page(panel.panel_width*panel.panel_height*panel.bpp/8); 465*24ca3d19SOleksandr Tymoshenko 466*24ca3d19SOleksandr Tymoshenko /* 467*24ca3d19SOleksandr Tymoshenko * Now allocate framebuffer memory 468*24ca3d19SOleksandr Tymoshenko */ 469*24ca3d19SOleksandr Tymoshenko err = bus_dma_tag_create( 470*24ca3d19SOleksandr Tymoshenko bus_get_dma_tag(dev), 471*24ca3d19SOleksandr Tymoshenko 4, 0, /* alignment, boundary */ 472*24ca3d19SOleksandr Tymoshenko BUS_SPACE_MAXADDR_32BIT, /* lowaddr */ 473*24ca3d19SOleksandr Tymoshenko BUS_SPACE_MAXADDR, /* highaddr */ 474*24ca3d19SOleksandr Tymoshenko NULL, NULL, /* filter, filterarg */ 475*24ca3d19SOleksandr Tymoshenko dma_size, 1, /* maxsize, nsegments */ 476*24ca3d19SOleksandr Tymoshenko dma_size, 0, /* maxsegsize, flags */ 477*24ca3d19SOleksandr Tymoshenko NULL, NULL, /* lockfunc, lockarg */ 478*24ca3d19SOleksandr Tymoshenko &sc->sc_dma_tag); 479*24ca3d19SOleksandr Tymoshenko if (err) 480*24ca3d19SOleksandr Tymoshenko goto fail; 481*24ca3d19SOleksandr Tymoshenko 482*24ca3d19SOleksandr Tymoshenko err = bus_dmamem_alloc(sc->sc_dma_tag, (void **)&sc->sc_fb_base, 483*24ca3d19SOleksandr Tymoshenko 0, &sc->sc_dma_map); 484*24ca3d19SOleksandr Tymoshenko 485*24ca3d19SOleksandr Tymoshenko if (err) { 486*24ca3d19SOleksandr Tymoshenko device_printf(dev, "cannot allocate framebuffer\n"); 487*24ca3d19SOleksandr Tymoshenko goto fail; 488*24ca3d19SOleksandr Tymoshenko } 489*24ca3d19SOleksandr Tymoshenko 490*24ca3d19SOleksandr Tymoshenko err = bus_dmamap_load(sc->sc_dma_tag, sc->sc_dma_map, sc->sc_fb_base, 491*24ca3d19SOleksandr Tymoshenko dma_size, am335x_fb_dmamap_cb, &sc->sc_fb_phys, BUS_DMA_NOWAIT); 492*24ca3d19SOleksandr Tymoshenko 493*24ca3d19SOleksandr Tymoshenko if (err) { 494*24ca3d19SOleksandr Tymoshenko device_printf(dev, "cannot load DMA map\n"); 495*24ca3d19SOleksandr Tymoshenko goto fail; 496*24ca3d19SOleksandr Tymoshenko } 497*24ca3d19SOleksandr Tymoshenko 498*24ca3d19SOleksandr Tymoshenko /* Make sure it's blank */ 499*24ca3d19SOleksandr Tymoshenko memset(sc->sc_fb_base, 0x00, dma_size); 500*24ca3d19SOleksandr Tymoshenko 501*24ca3d19SOleksandr Tymoshenko /* Calculate actual FB Size */ 502*24ca3d19SOleksandr Tymoshenko sc->sc_fb_size = panel.panel_width*panel.panel_height*panel.bpp/8; 503*24ca3d19SOleksandr Tymoshenko 504*24ca3d19SOleksandr Tymoshenko /* Only raster mode is supported */ 505*24ca3d19SOleksandr Tymoshenko reg = CTRL_RASTER_MODE; 506*24ca3d19SOleksandr Tymoshenko div = am335x_lcd_calc_divisor(ref_freq, panel.panel_pxl_clk); 507*24ca3d19SOleksandr Tymoshenko reg |= (div << CTRL_DIV_SHIFT); 508*24ca3d19SOleksandr Tymoshenko LCD_WRITE4(sc, LCD_CTRL, reg); 509*24ca3d19SOleksandr Tymoshenko 510*24ca3d19SOleksandr Tymoshenko /* Set timing */ 511*24ca3d19SOleksandr Tymoshenko timing0 = timing1 = timing2 = 0; 512*24ca3d19SOleksandr Tymoshenko 513*24ca3d19SOleksandr Tymoshenko /* Horizontal back porch */ 514*24ca3d19SOleksandr Tymoshenko timing0 |= (panel.panel_hbp & 0xff) << RASTER_TIMING_0_HBP_SHIFT; 515*24ca3d19SOleksandr Tymoshenko timing2 |= ((panel.panel_hbp >> 8) & 3) << RASTER_TIMING_2_HBPHI_SHIFT; 516*24ca3d19SOleksandr Tymoshenko /* Horizontal front porch */ 517*24ca3d19SOleksandr Tymoshenko timing0 |= (panel.panel_hfp & 0xff) << RASTER_TIMING_0_HFP_SHIFT; 518*24ca3d19SOleksandr Tymoshenko timing2 |= ((panel.panel_hfp >> 8) & 3) << RASTER_TIMING_2_HFPHI_SHIFT; 519*24ca3d19SOleksandr Tymoshenko /* Horizontal sync width */ 520*24ca3d19SOleksandr Tymoshenko timing0 |= (panel.panel_hsw & 0x3f) << RASTER_TIMING_0_HSW_SHIFT; 521*24ca3d19SOleksandr Tymoshenko timing2 |= ((panel.panel_hsw >> 6) & 0xf) << RASTER_TIMING_2_HSWHI_SHIFT; 522*24ca3d19SOleksandr Tymoshenko 523*24ca3d19SOleksandr Tymoshenko /* Vertical back porch, front porch, sync width */ 524*24ca3d19SOleksandr Tymoshenko timing1 |= (panel.panel_vbp & 0xff) << RASTER_TIMING_1_VBP_SHIFT; 525*24ca3d19SOleksandr Tymoshenko timing1 |= (panel.panel_vfp & 0xff) << RASTER_TIMING_1_VFP_SHIFT; 526*24ca3d19SOleksandr Tymoshenko timing1 |= (panel.panel_vsw & 0x3f) << RASTER_TIMING_1_VSW_SHIFT; 527*24ca3d19SOleksandr Tymoshenko 528*24ca3d19SOleksandr Tymoshenko /* Pixels per line */ 529*24ca3d19SOleksandr Tymoshenko timing0 |= (((panel.panel_width - 1) >> 10) & 1) 530*24ca3d19SOleksandr Tymoshenko << RASTER_TIMING_0_PPLMSB_SHIFT; 531*24ca3d19SOleksandr Tymoshenko timing0 |= (((panel.panel_width - 1) >> 4) & 0x3f) 532*24ca3d19SOleksandr Tymoshenko << RASTER_TIMING_0_PPLLSB_SHIFT; 533*24ca3d19SOleksandr Tymoshenko 534*24ca3d19SOleksandr Tymoshenko /* Lines per panel */ 535*24ca3d19SOleksandr Tymoshenko timing1 |= ((panel.panel_height - 1) & 0x3ff) 536*24ca3d19SOleksandr Tymoshenko << RASTER_TIMING_1_LPP_SHIFT; 537*24ca3d19SOleksandr Tymoshenko timing2 |= (((panel.panel_height - 1) >> 10 ) & 1) 538*24ca3d19SOleksandr Tymoshenko << RASTER_TIMING_2_LPP_B10_SHIFT; 539*24ca3d19SOleksandr Tymoshenko 540*24ca3d19SOleksandr Tymoshenko /* clock signal settings */ 541*24ca3d19SOleksandr Tymoshenko if (panel.sync_ctrl) 542*24ca3d19SOleksandr Tymoshenko timing2 |= RASTER_TIMING_2_PHSVS; 543*24ca3d19SOleksandr Tymoshenko if (panel.sync_edge) 544*24ca3d19SOleksandr Tymoshenko timing2 |= RASTER_TIMING_2_PHSVS_RISE; 545*24ca3d19SOleksandr Tymoshenko else 546*24ca3d19SOleksandr Tymoshenko timing2 |= RASTER_TIMING_2_PHSVS_FALL; 547*24ca3d19SOleksandr Tymoshenko if (panel.invert_line_clock) 548*24ca3d19SOleksandr Tymoshenko timing2 |= RASTER_TIMING_2_IHS; 549*24ca3d19SOleksandr Tymoshenko if (panel.invert_frm_clock) 550*24ca3d19SOleksandr Tymoshenko timing2 |= RASTER_TIMING_2_IVS; 551*24ca3d19SOleksandr Tymoshenko if (panel.panel_invert_pxl_clk) 552*24ca3d19SOleksandr Tymoshenko timing2 |= RASTER_TIMING_2_IPC; 553*24ca3d19SOleksandr Tymoshenko 554*24ca3d19SOleksandr Tymoshenko /* AC bias */ 555*24ca3d19SOleksandr Tymoshenko timing2 |= (panel.ac_bias << RASTER_TIMING_2_ACB_SHIFT); 556*24ca3d19SOleksandr Tymoshenko timing2 |= (panel.ac_bias_intrpt << RASTER_TIMING_2_ACBI_SHIFT); 557*24ca3d19SOleksandr Tymoshenko 558*24ca3d19SOleksandr Tymoshenko LCD_WRITE4(sc, LCD_RASTER_TIMING_0, timing0); 559*24ca3d19SOleksandr Tymoshenko LCD_WRITE4(sc, LCD_RASTER_TIMING_1, timing1); 560*24ca3d19SOleksandr Tymoshenko LCD_WRITE4(sc, LCD_RASTER_TIMING_2, timing2); 561*24ca3d19SOleksandr Tymoshenko 562*24ca3d19SOleksandr Tymoshenko /* DMA settings */ 563*24ca3d19SOleksandr Tymoshenko reg = LCDDMA_CTRL_FB0_FB1; 564*24ca3d19SOleksandr Tymoshenko /* Find power of 2 for current burst size */ 565*24ca3d19SOleksandr Tymoshenko switch (panel.dma_burst_sz) { 566*24ca3d19SOleksandr Tymoshenko case 1: 567*24ca3d19SOleksandr Tymoshenko burst_log = 0; 568*24ca3d19SOleksandr Tymoshenko break; 569*24ca3d19SOleksandr Tymoshenko case 2: 570*24ca3d19SOleksandr Tymoshenko burst_log = 1; 571*24ca3d19SOleksandr Tymoshenko break; 572*24ca3d19SOleksandr Tymoshenko case 4: 573*24ca3d19SOleksandr Tymoshenko burst_log = 2; 574*24ca3d19SOleksandr Tymoshenko break; 575*24ca3d19SOleksandr Tymoshenko case 8: 576*24ca3d19SOleksandr Tymoshenko burst_log = 3; 577*24ca3d19SOleksandr Tymoshenko break; 578*24ca3d19SOleksandr Tymoshenko case 16: 579*24ca3d19SOleksandr Tymoshenko default: 580*24ca3d19SOleksandr Tymoshenko burst_log = 4; 581*24ca3d19SOleksandr Tymoshenko break; 582*24ca3d19SOleksandr Tymoshenko } 583*24ca3d19SOleksandr Tymoshenko reg |= (burst_log << LCDDMA_CTRL_BURST_SIZE_SHIFT); 584*24ca3d19SOleksandr Tymoshenko /* XXX: FIFO TH */ 585*24ca3d19SOleksandr Tymoshenko reg |= (0 << LCDDMA_CTRL_TH_FIFO_RDY_SHIFT); 586*24ca3d19SOleksandr Tymoshenko LCD_WRITE4(sc, LCD_LCDDMA_CTRL, reg); 587*24ca3d19SOleksandr Tymoshenko 588*24ca3d19SOleksandr Tymoshenko LCD_WRITE4(sc, LCD_LCDDMA_FB0_BASE, sc->sc_fb_phys); 589*24ca3d19SOleksandr Tymoshenko LCD_WRITE4(sc, LCD_LCDDMA_FB0_CEILING, sc->sc_fb_phys + sc->sc_fb_size - 1); 590*24ca3d19SOleksandr Tymoshenko LCD_WRITE4(sc, LCD_LCDDMA_FB1_BASE, sc->sc_fb_phys); 591*24ca3d19SOleksandr Tymoshenko LCD_WRITE4(sc, LCD_LCDDMA_FB1_CEILING, sc->sc_fb_phys + sc->sc_fb_size - 1); 592*24ca3d19SOleksandr Tymoshenko 593*24ca3d19SOleksandr Tymoshenko /* Enable LCD */ 594*24ca3d19SOleksandr Tymoshenko reg = RASTER_CTRL_LCDTFT; 595*24ca3d19SOleksandr Tymoshenko reg |= (panel.fdd << RASTER_CTRL_REQDLY_SHIFT); 596*24ca3d19SOleksandr Tymoshenko reg |= (PALETTE_DATA_ONLY << RASTER_CTRL_PALMODE_SHIFT); 597*24ca3d19SOleksandr Tymoshenko if (panel.bpp >= 24) 598*24ca3d19SOleksandr Tymoshenko reg |= RASTER_CTRL_TFT24; 599*24ca3d19SOleksandr Tymoshenko if (panel.bpp == 32) 600*24ca3d19SOleksandr Tymoshenko reg |= RASTER_CTRL_TFT24_UNPACKED; 601*24ca3d19SOleksandr Tymoshenko LCD_WRITE4(sc, LCD_RASTER_CTRL, reg); 602*24ca3d19SOleksandr Tymoshenko 603*24ca3d19SOleksandr Tymoshenko LCD_WRITE4(sc, LCD_CLKC_ENABLE, 604*24ca3d19SOleksandr Tymoshenko CLKC_ENABLE_DMA | CLKC_ENABLE_LDID | CLKC_ENABLE_CORE); 605*24ca3d19SOleksandr Tymoshenko 606*24ca3d19SOleksandr Tymoshenko LCD_WRITE4(sc, LCD_CLKC_RESET, CLKC_RESET_MAIN); 607*24ca3d19SOleksandr Tymoshenko DELAY(100); 608*24ca3d19SOleksandr Tymoshenko LCD_WRITE4(sc, LCD_CLKC_RESET, 0); 609*24ca3d19SOleksandr Tymoshenko 610*24ca3d19SOleksandr Tymoshenko reg = IRQ_EOF1 | IRQ_EOF0 | IRQ_FUF | IRQ_PL | 611*24ca3d19SOleksandr Tymoshenko IRQ_ACB | IRQ_SYNC_LOST | IRQ_RASTER_DONE | 612*24ca3d19SOleksandr Tymoshenko IRQ_FRAME_DONE; 613*24ca3d19SOleksandr Tymoshenko LCD_WRITE4(sc, LCD_IRQENABLE_SET, reg); 614*24ca3d19SOleksandr Tymoshenko 615*24ca3d19SOleksandr Tymoshenko reg = LCD_READ4(sc, LCD_RASTER_CTRL); 616*24ca3d19SOleksandr Tymoshenko reg |= RASTER_CTRL_LCDEN; 617*24ca3d19SOleksandr Tymoshenko LCD_WRITE4(sc, LCD_RASTER_CTRL, reg); 618*24ca3d19SOleksandr Tymoshenko 619*24ca3d19SOleksandr Tymoshenko LCD_WRITE4(sc, LCD_SYSCONFIG, 620*24ca3d19SOleksandr Tymoshenko SYSCONFIG_STANDBY_SMART | SYSCONFIG_IDLE_SMART); 621*24ca3d19SOleksandr Tymoshenko 622*24ca3d19SOleksandr Tymoshenko /* Init backlight interface */ 623*24ca3d19SOleksandr Tymoshenko ctx = device_get_sysctl_ctx(sc->sc_dev); 624*24ca3d19SOleksandr Tymoshenko tree = device_get_sysctl_tree(sc->sc_dev); 625*24ca3d19SOleksandr Tymoshenko sc->sc_oid = SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 626*24ca3d19SOleksandr Tymoshenko "backlight", CTLTYPE_INT | CTLFLAG_RW, sc, 0, 627*24ca3d19SOleksandr Tymoshenko am335x_lcd_sysctl_backlight, "I", "LCD backlight"); 628*24ca3d19SOleksandr Tymoshenko sc->sc_backlight = 0; 629*24ca3d19SOleksandr Tymoshenko /* Check if eCAS interface is available at this point */ 630*24ca3d19SOleksandr Tymoshenko if (am335x_pwm_config_ecas(PWM_UNIT, 631*24ca3d19SOleksandr Tymoshenko PWM_PERIOD, PWM_PERIOD) == 0) 632*24ca3d19SOleksandr Tymoshenko sc->sc_backlight = 100; 633*24ca3d19SOleksandr Tymoshenko 634*24ca3d19SOleksandr Tymoshenko am335x_lcd_syscons_setup((vm_offset_t)sc->sc_fb_base, sc->sc_fb_phys, &panel); 635*24ca3d19SOleksandr Tymoshenko 636*24ca3d19SOleksandr Tymoshenko return (0); 637*24ca3d19SOleksandr Tymoshenko 638*24ca3d19SOleksandr Tymoshenko fail: 639*24ca3d19SOleksandr Tymoshenko return (err); 640*24ca3d19SOleksandr Tymoshenko } 641*24ca3d19SOleksandr Tymoshenko 642*24ca3d19SOleksandr Tymoshenko static int 643*24ca3d19SOleksandr Tymoshenko am335x_lcd_detach(device_t dev) 644*24ca3d19SOleksandr Tymoshenko { 645*24ca3d19SOleksandr Tymoshenko /* Do not let unload driver */ 646*24ca3d19SOleksandr Tymoshenko return (EBUSY); 647*24ca3d19SOleksandr Tymoshenko } 648*24ca3d19SOleksandr Tymoshenko 649*24ca3d19SOleksandr Tymoshenko static device_method_t am335x_lcd_methods[] = { 650*24ca3d19SOleksandr Tymoshenko DEVMETHOD(device_probe, am335x_lcd_probe), 651*24ca3d19SOleksandr Tymoshenko DEVMETHOD(device_attach, am335x_lcd_attach), 652*24ca3d19SOleksandr Tymoshenko DEVMETHOD(device_detach, am335x_lcd_detach), 653*24ca3d19SOleksandr Tymoshenko 654*24ca3d19SOleksandr Tymoshenko DEVMETHOD_END 655*24ca3d19SOleksandr Tymoshenko }; 656*24ca3d19SOleksandr Tymoshenko 657*24ca3d19SOleksandr Tymoshenko static driver_t am335x_lcd_driver = { 658*24ca3d19SOleksandr Tymoshenko "am335x_lcd", 659*24ca3d19SOleksandr Tymoshenko am335x_lcd_methods, 660*24ca3d19SOleksandr Tymoshenko sizeof(struct am335x_lcd_softc), 661*24ca3d19SOleksandr Tymoshenko }; 662*24ca3d19SOleksandr Tymoshenko 663*24ca3d19SOleksandr Tymoshenko static devclass_t am335x_lcd_devclass; 664*24ca3d19SOleksandr Tymoshenko 665*24ca3d19SOleksandr Tymoshenko DRIVER_MODULE(am335x_lcd, simplebus, am335x_lcd_driver, am335x_lcd_devclass, 0, 0); 666*24ca3d19SOleksandr Tymoshenko MODULE_VERSION(am335x_lcd, 1); 667*24ca3d19SOleksandr Tymoshenko MODULE_DEPEND(am335x_lcd, simplebus, 1, 1, 1); 668