1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2012 Damjan Marion <dmarion@Freebsd.org> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 #include <sys/param.h> 31 #include <sys/systm.h> 32 #include <sys/bus.h> 33 #include <sys/kernel.h> 34 #include <sys/module.h> 35 #include <sys/malloc.h> 36 #include <sys/rman.h> 37 #include <sys/timeet.h> 38 #include <sys/timetc.h> 39 #include <machine/bus.h> 40 41 #include <machine/machdep.h> /* For arm_set_delay */ 42 43 #include <dev/extres/clk/clk.h> 44 45 #include <dev/ofw/openfirm.h> 46 #include <dev/ofw/ofw_bus.h> 47 #include <dev/ofw/ofw_bus_subr.h> 48 49 #include <arm/ti/ti_sysc.h> 50 51 #include "am335x_dmtreg.h" 52 53 struct am335x_dmtimer_softc { 54 device_t dev; 55 int tmr_mem_rid; 56 struct resource * tmr_mem_res; 57 int tmr_irq_rid; 58 struct resource * tmr_irq_res; 59 void *tmr_irq_handler; 60 clk_t clk_fck; 61 uint64_t sysclk_freq; 62 uint32_t tclr; /* Cached TCLR register. */ 63 union { 64 struct timecounter tc; 65 struct eventtimer et; 66 } func; 67 int tmr_num; /* Hardware unit number. */ 68 char tmr_name[12]; /* "DMTimerN", N = tmr_num */ 69 }; 70 71 static struct am335x_dmtimer_softc *am335x_dmtimer_et_sc = NULL; 72 static struct am335x_dmtimer_softc *am335x_dmtimer_tc_sc = NULL; 73 74 static void am335x_dmtimer_delay(int, void *); 75 76 /* 77 * We use dmtimer2 for eventtimer and dmtimer3 for timecounter. 78 */ 79 #define ET_TMR_NUM 2 80 #define TC_TMR_NUM 3 81 82 /* List of compatible strings for FDT tree */ 83 static struct ofw_compat_data compat_data[] = { 84 {"ti,am335x-timer", 1}, 85 {"ti,am335x-timer-1ms", 1}, 86 {NULL, 0}, 87 }; 88 89 #define DMTIMER_READ4(sc, reg) bus_read_4((sc)->tmr_mem_res, (reg)) 90 #define DMTIMER_WRITE4(sc, reg, val) bus_write_4((sc)->tmr_mem_res, (reg), (val)) 91 92 static int 93 am335x_dmtimer_et_start(struct eventtimer *et, sbintime_t first, sbintime_t period) 94 { 95 struct am335x_dmtimer_softc *sc; 96 uint32_t initial_count, reload_count; 97 98 sc = et->et_priv; 99 100 /* 101 * Stop the timer before changing it. This routine will often be called 102 * while the timer is still running, to either lengthen or shorten the 103 * current event time. We need to ensure the timer doesn't expire while 104 * we're working with it. 105 * 106 * Also clear any pending interrupt status, because it's at least 107 * theoretically possible that we're running in a primary interrupt 108 * context now, and a timer interrupt could be pending even before we 109 * stopped the timer. The more likely case is that we're being called 110 * from the et_event_cb() routine dispatched from our own handler, but 111 * it's not clear to me that that's the only case possible. 112 */ 113 sc->tclr &= ~(DMT_TCLR_START | DMT_TCLR_AUTOLOAD); 114 DMTIMER_WRITE4(sc, DMT_TCLR, sc->tclr); 115 DMTIMER_WRITE4(sc, DMT_IRQSTATUS, DMT_IRQ_OVF); 116 117 if (period != 0) { 118 reload_count = ((uint32_t)et->et_frequency * period) >> 32; 119 sc->tclr |= DMT_TCLR_AUTOLOAD; 120 } else { 121 reload_count = 0; 122 } 123 124 if (first != 0) 125 initial_count = ((uint32_t)et->et_frequency * first) >> 32; 126 else 127 initial_count = reload_count; 128 129 /* 130 * Set auto-reload and current-count values. This timer hardware counts 131 * up from the initial/reload value and interrupts on the zero rollover. 132 */ 133 DMTIMER_WRITE4(sc, DMT_TLDR, 0xFFFFFFFF - reload_count); 134 DMTIMER_WRITE4(sc, DMT_TCRR, 0xFFFFFFFF - initial_count); 135 136 /* Enable overflow interrupt, and start the timer. */ 137 DMTIMER_WRITE4(sc, DMT_IRQENABLE_SET, DMT_IRQ_OVF); 138 sc->tclr |= DMT_TCLR_START; 139 DMTIMER_WRITE4(sc, DMT_TCLR, sc->tclr); 140 141 return (0); 142 } 143 144 static int 145 am335x_dmtimer_et_stop(struct eventtimer *et) 146 { 147 struct am335x_dmtimer_softc *sc; 148 149 sc = et->et_priv; 150 151 /* Stop timer, disable and clear interrupt. */ 152 sc->tclr &= ~(DMT_TCLR_START | DMT_TCLR_AUTOLOAD); 153 DMTIMER_WRITE4(sc, DMT_TCLR, sc->tclr); 154 DMTIMER_WRITE4(sc, DMT_IRQENABLE_CLR, DMT_IRQ_OVF); 155 DMTIMER_WRITE4(sc, DMT_IRQSTATUS, DMT_IRQ_OVF); 156 return (0); 157 } 158 159 static int 160 am335x_dmtimer_et_intr(void *arg) 161 { 162 struct am335x_dmtimer_softc *sc; 163 164 sc = arg; 165 166 /* Ack the interrupt, and invoke the callback if it's still enabled. */ 167 DMTIMER_WRITE4(sc, DMT_IRQSTATUS, DMT_IRQ_OVF); 168 if (sc->func.et.et_active) 169 sc->func.et.et_event_cb(&sc->func.et, sc->func.et.et_arg); 170 171 return (FILTER_HANDLED); 172 } 173 174 static int 175 am335x_dmtimer_et_init(struct am335x_dmtimer_softc *sc) 176 { 177 KASSERT(am335x_dmtimer_et_sc == NULL, ("already have an eventtimer")); 178 179 /* 180 * Setup eventtimer interrupt handling. Panic if anything goes wrong, 181 * because the system just isn't going to run without an eventtimer. 182 */ 183 sc->tmr_irq_res = bus_alloc_resource_any(sc->dev, SYS_RES_IRQ, 184 &sc->tmr_irq_rid, RF_ACTIVE); 185 if (sc->tmr_irq_res == NULL) 186 panic("am335x_dmtimer: could not allocate irq resources"); 187 if (bus_setup_intr(sc->dev, sc->tmr_irq_res, INTR_TYPE_CLK, 188 am335x_dmtimer_et_intr, NULL, sc, &sc->tmr_irq_handler) != 0) 189 panic("am335x_dmtimer: count not setup irq handler"); 190 191 sc->func.et.et_name = sc->tmr_name; 192 sc->func.et.et_flags = ET_FLAGS_PERIODIC | ET_FLAGS_ONESHOT; 193 sc->func.et.et_quality = 500; 194 sc->func.et.et_frequency = sc->sysclk_freq; 195 sc->func.et.et_min_period = 196 ((0x00000005LLU << 32) / sc->func.et.et_frequency); 197 sc->func.et.et_max_period = 198 (0xfffffffeLLU << 32) / sc->func.et.et_frequency; 199 sc->func.et.et_start = am335x_dmtimer_et_start; 200 sc->func.et.et_stop = am335x_dmtimer_et_stop; 201 sc->func.et.et_priv = sc; 202 203 am335x_dmtimer_et_sc = sc; 204 et_register(&sc->func.et); 205 206 return (0); 207 } 208 209 static unsigned 210 am335x_dmtimer_tc_get_timecount(struct timecounter *tc) 211 { 212 struct am335x_dmtimer_softc *sc; 213 214 sc = tc->tc_priv; 215 216 return (DMTIMER_READ4(sc, DMT_TCRR)); 217 } 218 219 static int 220 am335x_dmtimer_tc_init(struct am335x_dmtimer_softc *sc) 221 { 222 KASSERT(am335x_dmtimer_tc_sc == NULL, ("already have a timecounter")); 223 224 /* Set up timecounter, start it, register it. */ 225 DMTIMER_WRITE4(sc, DMT_TSICR, DMT_TSICR_RESET); 226 while (DMTIMER_READ4(sc, DMT_TIOCP_CFG) & DMT_TIOCP_RESET) 227 continue; 228 229 sc->tclr |= DMT_TCLR_START | DMT_TCLR_AUTOLOAD; 230 DMTIMER_WRITE4(sc, DMT_TLDR, 0); 231 DMTIMER_WRITE4(sc, DMT_TCRR, 0); 232 DMTIMER_WRITE4(sc, DMT_TCLR, sc->tclr); 233 234 sc->func.tc.tc_name = sc->tmr_name; 235 sc->func.tc.tc_get_timecount = am335x_dmtimer_tc_get_timecount; 236 sc->func.tc.tc_counter_mask = ~0u; 237 sc->func.tc.tc_frequency = sc->sysclk_freq; 238 sc->func.tc.tc_quality = 500; 239 sc->func.tc.tc_priv = sc; 240 241 am335x_dmtimer_tc_sc = sc; 242 tc_init(&sc->func.tc); 243 244 arm_set_delay(am335x_dmtimer_delay, sc); 245 246 return (0); 247 } 248 249 static int 250 am335x_dmtimer_probe(device_t dev) 251 { 252 char strbuf[32]; 253 int tmr_num; 254 uint64_t rev_address; 255 256 if (!ofw_bus_status_okay(dev)) 257 return (ENXIO); 258 259 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) 260 return (ENXIO); 261 262 /* 263 * Get the hardware unit number from address of rev register. 264 * If this isn't the hardware unit we're going to use for either the 265 * eventtimer or the timecounter, no point in instantiating the device. 266 */ 267 rev_address = ti_sysc_get_rev_address(device_get_parent(dev)); 268 switch (rev_address) { 269 case DMTIMER2_REV: 270 tmr_num = 2; 271 break; 272 case DMTIMER3_REV: 273 tmr_num = 3; 274 break; 275 default: 276 /* Not DMTIMER2 or DMTIMER3 */ 277 return (ENXIO); 278 } 279 280 snprintf(strbuf, sizeof(strbuf), "AM335x DMTimer%d", tmr_num); 281 device_set_desc_copy(dev, strbuf); 282 283 return(BUS_PROBE_DEFAULT); 284 } 285 286 static int 287 am335x_dmtimer_attach(device_t dev) 288 { 289 struct am335x_dmtimer_softc *sc; 290 int err; 291 uint64_t rev_address; 292 clk_t sys_clkin; 293 294 sc = device_get_softc(dev); 295 sc->dev = dev; 296 297 /* expect one clock */ 298 err = clk_get_by_ofw_index(dev, 0, 0, &sc->clk_fck); 299 if (err != 0) { 300 device_printf(dev, "Cant find clock index 0. err: %d\n", err); 301 return (ENXIO); 302 } 303 304 err = clk_get_by_name(dev, "sys_clkin_ck@40", &sys_clkin); 305 if (err != 0) { 306 device_printf(dev, "Cant find sys_clkin_ck@40 err: %d\n", err); 307 return (ENXIO); 308 } 309 310 /* Select M_OSC as DPLL parent */ 311 err = clk_set_parent_by_clk(sc->clk_fck, sys_clkin); 312 if (err != 0) { 313 device_printf(dev, "Cant set mux to CLK_M_OSC\n"); 314 return (ENXIO); 315 } 316 317 /* Enable clocks and power on the device. */ 318 err = ti_sysc_clock_enable(device_get_parent(dev)); 319 if (err != 0) { 320 device_printf(dev, "Cant enable sysc clkctrl, err %d\n", err); 321 return (ENXIO); 322 } 323 324 /* Get the base clock frequency. */ 325 err = clk_get_freq(sc->clk_fck, &sc->sysclk_freq); 326 if (err != 0) { 327 device_printf(dev, "Cant get sysclk frequency, err %d\n", err); 328 return (ENXIO); 329 } 330 331 /* Request the memory resources. */ 332 sc->tmr_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 333 &sc->tmr_mem_rid, RF_ACTIVE); 334 if (sc->tmr_mem_res == NULL) { 335 return (ENXIO); 336 } 337 338 rev_address = ti_sysc_get_rev_address(device_get_parent(dev)); 339 switch (rev_address) { 340 case DMTIMER2_REV: 341 sc->tmr_num = 2; 342 break; 343 case DMTIMER3_REV: 344 sc->tmr_num = 3; 345 break; 346 default: 347 device_printf(dev, "Not timer 2 or 3! %#jx\n", 348 rev_address); 349 return (ENXIO); 350 } 351 352 snprintf(sc->tmr_name, sizeof(sc->tmr_name), "DMTimer%d", sc->tmr_num); 353 354 /* 355 * Go set up either a timecounter or eventtimer. We wouldn't have 356 * attached if we weren't one or the other. 357 */ 358 if (sc->tmr_num == ET_TMR_NUM) 359 am335x_dmtimer_et_init(sc); 360 else if (sc->tmr_num == TC_TMR_NUM) 361 am335x_dmtimer_tc_init(sc); 362 else 363 panic("am335x_dmtimer: bad timer number %d", sc->tmr_num); 364 365 return (0); 366 } 367 368 static device_method_t am335x_dmtimer_methods[] = { 369 DEVMETHOD(device_probe, am335x_dmtimer_probe), 370 DEVMETHOD(device_attach, am335x_dmtimer_attach), 371 { 0, 0 } 372 }; 373 374 static driver_t am335x_dmtimer_driver = { 375 "am335x_dmtimer", 376 am335x_dmtimer_methods, 377 sizeof(struct am335x_dmtimer_softc), 378 }; 379 380 DRIVER_MODULE(am335x_dmtimer, simplebus, am335x_dmtimer_driver, 0, 0); 381 MODULE_DEPEND(am335x_dmtimer, ti_sysc, 1, 1, 1); 382 383 static void 384 am335x_dmtimer_delay(int usec, void *arg) 385 { 386 struct am335x_dmtimer_softc *sc = arg; 387 int32_t counts; 388 uint32_t first, last; 389 390 /* Get the number of times to count */ 391 counts = (usec + 1) * (sc->sysclk_freq / 1000000); 392 393 first = DMTIMER_READ4(sc, DMT_TCRR); 394 395 while (counts > 0) { 396 last = DMTIMER_READ4(sc, DMT_TCRR); 397 if (last > first) { 398 counts -= (int32_t)(last - first); 399 } else { 400 counts -= (int32_t)((0xFFFFFFFF - first) + last); 401 } 402 first = last; 403 } 404 } 405