1 /*- 2 * Copyright (c) 2012 Damjan Marion <dmarion@Freebsd.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __FBSDID("$FreeBSD$"); 29 30 #include <sys/param.h> 31 #include <sys/systm.h> 32 #include <sys/bus.h> 33 #include <sys/kernel.h> 34 #include <sys/module.h> 35 #include <sys/malloc.h> 36 #include <sys/rman.h> 37 #include <sys/timeet.h> 38 #include <sys/timetc.h> 39 #include <machine/bus.h> 40 41 #include <machine/machdep.h> /* For arm_set_delay */ 42 43 #include <dev/ofw/openfirm.h> 44 #include <dev/ofw/ofw_bus.h> 45 #include <dev/ofw/ofw_bus_subr.h> 46 47 #include <arm/ti/ti_prcm.h> 48 #include <arm/ti/ti_hwmods.h> 49 50 #include "am335x_dmtreg.h" 51 52 struct am335x_dmtimer_softc { 53 device_t dev; 54 int tmr_mem_rid; 55 struct resource * tmr_mem_res; 56 int tmr_irq_rid; 57 struct resource * tmr_irq_res; 58 void *tmr_irq_handler; 59 uint32_t sysclk_freq; 60 uint32_t tclr; /* Cached TCLR register. */ 61 union { 62 struct timecounter tc; 63 struct eventtimer et; 64 } func; 65 int tmr_num; /* Hardware unit number. */ 66 char tmr_name[12]; /* "DMTimerN", N = tmr_num */ 67 }; 68 69 static struct am335x_dmtimer_softc *am335x_dmtimer_et_sc = NULL; 70 static struct am335x_dmtimer_softc *am335x_dmtimer_tc_sc = NULL; 71 72 static void am335x_dmtimer_delay(int, void *); 73 74 /* 75 * We use dmtimer2 for eventtimer and dmtimer3 for timecounter. 76 */ 77 #define ET_TMR_NUM 2 78 #define TC_TMR_NUM 3 79 80 /* List of compatible strings for FDT tree */ 81 static struct ofw_compat_data compat_data[] = { 82 {"ti,am335x-timer", 1}, 83 {"ti,am335x-timer-1ms", 1}, 84 {NULL, 0}, 85 }; 86 87 #define DMTIMER_READ4(sc, reg) bus_read_4((sc)->tmr_mem_res, (reg)) 88 #define DMTIMER_WRITE4(sc, reg, val) bus_write_4((sc)->tmr_mem_res, (reg), (val)) 89 90 static int 91 am335x_dmtimer_et_start(struct eventtimer *et, sbintime_t first, sbintime_t period) 92 { 93 struct am335x_dmtimer_softc *sc; 94 uint32_t initial_count, reload_count; 95 96 sc = et->et_priv; 97 98 /* 99 * Stop the timer before changing it. This routine will often be called 100 * while the timer is still running, to either lengthen or shorten the 101 * current event time. We need to ensure the timer doesn't expire while 102 * we're working with it. 103 * 104 * Also clear any pending interrupt status, because it's at least 105 * theoretically possible that we're running in a primary interrupt 106 * context now, and a timer interrupt could be pending even before we 107 * stopped the timer. The more likely case is that we're being called 108 * from the et_event_cb() routine dispatched from our own handler, but 109 * it's not clear to me that that's the only case possible. 110 */ 111 sc->tclr &= ~(DMT_TCLR_START | DMT_TCLR_AUTOLOAD); 112 DMTIMER_WRITE4(sc, DMT_TCLR, sc->tclr); 113 DMTIMER_WRITE4(sc, DMT_IRQSTATUS, DMT_IRQ_OVF); 114 115 if (period != 0) { 116 reload_count = ((uint32_t)et->et_frequency * period) >> 32; 117 sc->tclr |= DMT_TCLR_AUTOLOAD; 118 } else { 119 reload_count = 0; 120 } 121 122 if (first != 0) 123 initial_count = ((uint32_t)et->et_frequency * first) >> 32; 124 else 125 initial_count = reload_count; 126 127 /* 128 * Set auto-reload and current-count values. This timer hardware counts 129 * up from the initial/reload value and interrupts on the zero rollover. 130 */ 131 DMTIMER_WRITE4(sc, DMT_TLDR, 0xFFFFFFFF - reload_count); 132 DMTIMER_WRITE4(sc, DMT_TCRR, 0xFFFFFFFF - initial_count); 133 134 /* Enable overflow interrupt, and start the timer. */ 135 DMTIMER_WRITE4(sc, DMT_IRQENABLE_SET, DMT_IRQ_OVF); 136 sc->tclr |= DMT_TCLR_START; 137 DMTIMER_WRITE4(sc, DMT_TCLR, sc->tclr); 138 139 return (0); 140 } 141 142 static int 143 am335x_dmtimer_et_stop(struct eventtimer *et) 144 { 145 struct am335x_dmtimer_softc *sc; 146 147 sc = et->et_priv; 148 149 /* Stop timer, disable and clear interrupt. */ 150 sc->tclr &= ~(DMT_TCLR_START | DMT_TCLR_AUTOLOAD); 151 DMTIMER_WRITE4(sc, DMT_TCLR, sc->tclr); 152 DMTIMER_WRITE4(sc, DMT_IRQENABLE_CLR, DMT_IRQ_OVF); 153 DMTIMER_WRITE4(sc, DMT_IRQSTATUS, DMT_IRQ_OVF); 154 return (0); 155 } 156 157 static int 158 am335x_dmtimer_et_intr(void *arg) 159 { 160 struct am335x_dmtimer_softc *sc; 161 162 sc = arg; 163 164 /* Ack the interrupt, and invoke the callback if it's still enabled. */ 165 DMTIMER_WRITE4(sc, DMT_IRQSTATUS, DMT_IRQ_OVF); 166 if (sc->func.et.et_active) 167 sc->func.et.et_event_cb(&sc->func.et, sc->func.et.et_arg); 168 169 return (FILTER_HANDLED); 170 } 171 172 static int 173 am335x_dmtimer_et_init(struct am335x_dmtimer_softc *sc) 174 { 175 KASSERT(am335x_dmtimer_et_sc == NULL, ("already have an eventtimer")); 176 177 /* 178 * Setup eventtimer interrupt handling. Panic if anything goes wrong, 179 * because the system just isn't going to run without an eventtimer. 180 */ 181 sc->tmr_irq_res = bus_alloc_resource_any(sc->dev, SYS_RES_IRQ, 182 &sc->tmr_irq_rid, RF_ACTIVE); 183 if (sc->tmr_irq_res == NULL) 184 panic("am335x_dmtimer: could not allocate irq resources"); 185 if (bus_setup_intr(sc->dev, sc->tmr_irq_res, INTR_TYPE_CLK, 186 am335x_dmtimer_et_intr, NULL, sc, &sc->tmr_irq_handler) != 0) 187 panic("am335x_dmtimer: count not setup irq handler"); 188 189 sc->func.et.et_name = sc->tmr_name; 190 sc->func.et.et_flags = ET_FLAGS_PERIODIC | ET_FLAGS_ONESHOT; 191 sc->func.et.et_quality = 500; 192 sc->func.et.et_frequency = sc->sysclk_freq; 193 sc->func.et.et_min_period = 194 ((0x00000005LLU << 32) / sc->func.et.et_frequency); 195 sc->func.et.et_max_period = 196 (0xfffffffeLLU << 32) / sc->func.et.et_frequency; 197 sc->func.et.et_start = am335x_dmtimer_et_start; 198 sc->func.et.et_stop = am335x_dmtimer_et_stop; 199 sc->func.et.et_priv = sc; 200 201 am335x_dmtimer_et_sc = sc; 202 et_register(&sc->func.et); 203 204 return (0); 205 } 206 207 static unsigned 208 am335x_dmtimer_tc_get_timecount(struct timecounter *tc) 209 { 210 struct am335x_dmtimer_softc *sc; 211 212 sc = tc->tc_priv; 213 214 return (DMTIMER_READ4(sc, DMT_TCRR)); 215 } 216 217 static int 218 am335x_dmtimer_tc_init(struct am335x_dmtimer_softc *sc) 219 { 220 KASSERT(am335x_dmtimer_tc_sc == NULL, ("already have a timecounter")); 221 222 /* Set up timecounter, start it, register it. */ 223 DMTIMER_WRITE4(sc, DMT_TSICR, DMT_TSICR_RESET); 224 while (DMTIMER_READ4(sc, DMT_TIOCP_CFG) & DMT_TIOCP_RESET) 225 continue; 226 227 sc->tclr |= DMT_TCLR_START | DMT_TCLR_AUTOLOAD; 228 DMTIMER_WRITE4(sc, DMT_TLDR, 0); 229 DMTIMER_WRITE4(sc, DMT_TCRR, 0); 230 DMTIMER_WRITE4(sc, DMT_TCLR, sc->tclr); 231 232 sc->func.tc.tc_name = sc->tmr_name; 233 sc->func.tc.tc_get_timecount = am335x_dmtimer_tc_get_timecount; 234 sc->func.tc.tc_counter_mask = ~0u; 235 sc->func.tc.tc_frequency = sc->sysclk_freq; 236 sc->func.tc.tc_quality = 500; 237 sc->func.tc.tc_priv = sc; 238 239 am335x_dmtimer_tc_sc = sc; 240 tc_init(&sc->func.tc); 241 242 arm_set_delay(am335x_dmtimer_delay, sc); 243 244 return (0); 245 } 246 247 static int 248 am335x_dmtimer_probe(device_t dev) 249 { 250 char strbuf[32]; 251 int tmr_num; 252 253 if (!ofw_bus_status_okay(dev)) 254 return (ENXIO); 255 256 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) 257 return (ENXIO); 258 259 /* 260 * Get the hardware unit number (the N from ti,hwmods="timerN"). 261 * If this isn't the hardware unit we're going to use for either the 262 * eventtimer or the timecounter, no point in instantiating the device. 263 */ 264 tmr_num = ti_hwmods_get_unit(dev, "timer"); 265 if (tmr_num != ET_TMR_NUM && tmr_num != TC_TMR_NUM) 266 return (ENXIO); 267 268 snprintf(strbuf, sizeof(strbuf), "AM335x DMTimer%d", tmr_num); 269 device_set_desc_copy(dev, strbuf); 270 271 return(BUS_PROBE_DEFAULT); 272 } 273 274 static int 275 am335x_dmtimer_attach(device_t dev) 276 { 277 struct am335x_dmtimer_softc *sc; 278 clk_ident_t timer_id; 279 int err; 280 281 sc = device_get_softc(dev); 282 sc->dev = dev; 283 284 /* Get the base clock frequency. */ 285 if ((err = ti_prcm_clk_get_source_freq(SYS_CLK, &sc->sysclk_freq)) != 0) 286 return (err); 287 288 /* Enable clocks and power on the device. */ 289 if ((timer_id = ti_hwmods_get_clock(dev)) == INVALID_CLK_IDENT) 290 return (ENXIO); 291 if ((err = ti_prcm_clk_set_source(timer_id, SYSCLK_CLK)) != 0) 292 return (err); 293 if ((err = ti_prcm_clk_enable(timer_id)) != 0) 294 return (err); 295 296 /* Request the memory resources. */ 297 sc->tmr_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 298 &sc->tmr_mem_rid, RF_ACTIVE); 299 if (sc->tmr_mem_res == NULL) { 300 return (ENXIO); 301 } 302 303 sc->tmr_num = ti_hwmods_get_unit(dev, "timer"); 304 snprintf(sc->tmr_name, sizeof(sc->tmr_name), "DMTimer%d", sc->tmr_num); 305 306 /* 307 * Go set up either a timecounter or eventtimer. We wouldn't have 308 * attached if we weren't one or the other. 309 */ 310 if (sc->tmr_num == ET_TMR_NUM) 311 am335x_dmtimer_et_init(sc); 312 else if (sc->tmr_num == TC_TMR_NUM) 313 am335x_dmtimer_tc_init(sc); 314 else 315 panic("am335x_dmtimer: bad timer number %d", sc->tmr_num); 316 317 return (0); 318 } 319 320 static device_method_t am335x_dmtimer_methods[] = { 321 DEVMETHOD(device_probe, am335x_dmtimer_probe), 322 DEVMETHOD(device_attach, am335x_dmtimer_attach), 323 { 0, 0 } 324 }; 325 326 static driver_t am335x_dmtimer_driver = { 327 "am335x_dmtimer", 328 am335x_dmtimer_methods, 329 sizeof(struct am335x_dmtimer_softc), 330 }; 331 332 static devclass_t am335x_dmtimer_devclass; 333 334 DRIVER_MODULE(am335x_dmtimer, simplebus, am335x_dmtimer_driver, am335x_dmtimer_devclass, 0, 0); 335 MODULE_DEPEND(am335x_dmtimer, am335x_prcm, 1, 1, 1); 336 337 static void 338 am335x_dmtimer_delay(int usec, void *arg) 339 { 340 struct am335x_dmtimer_softc *sc = arg; 341 int32_t counts; 342 uint32_t first, last; 343 344 /* Get the number of times to count */ 345 counts = (usec + 1) * (sc->sysclk_freq / 1000000); 346 347 first = DMTIMER_READ4(sc, DMT_TCRR); 348 349 while (counts > 0) { 350 last = DMTIMER_READ4(sc, DMT_TCRR); 351 if (last > first) { 352 counts -= (int32_t)(last - first); 353 } else { 354 counts -= (int32_t)((0xFFFFFFFF - first) + last); 355 } 356 first = last; 357 } 358 } 359