1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2019 Michal Meloun <mmel@FreeBSD.org> 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 #include <sys/param.h> 30 #include <sys/systm.h> 31 #include <sys/bus.h> 32 #include <sys/kernel.h> 33 #include <sys/lock.h> 34 #include <sys/mutex.h> 35 #include <sys/smp.h> 36 37 #include <vm/vm.h> 38 #include <vm/pmap.h> 39 40 #include <machine/cpu.h> 41 #include <machine/fdt.h> 42 #include <machine/smp.h> 43 #include <machine/platformvar.h> 44 45 #include <dev/ofw/openfirm.h> 46 #include <dev/ofw/ofw_cpu.h> 47 #include <dev/ofw/ofw_bus_subr.h> 48 #include <dev/psci/psci.h> 49 50 #include <arm/rockchip/rk32xx_mp.h> 51 52 #define IMEM_PHYSBASE 0xFF700000 53 #define IMEM_SIZE 0x00018000 54 55 #define PMU_PHYSBASE 0xFF730000 56 #define PMU_SIZE 0x00010000 57 #define PMU_PWRDN_CON 0x08 58 59 static int running_cpus; 60 static uint32_t psci_mask, pmu_mask; 61 void 62 rk32xx_mp_setmaxid(platform_t plat) 63 { 64 int ncpu; 65 66 /* If we've already set the global vars don't bother to do it again. */ 67 if (mp_ncpus != 0) 68 return; 69 70 /* Read current CP15 Cache Size ID Register */ 71 ncpu = cp15_l2ctlr_get(); 72 ncpu = CPUV7_L2CTLR_NPROC(ncpu); 73 74 mp_ncpus = ncpu; 75 mp_maxid = ncpu - 1; 76 } 77 78 static void 79 rk32xx_mp_start_pmu(uint32_t mask) 80 { 81 bus_space_handle_t imem; 82 bus_space_handle_t pmu; 83 uint32_t val; 84 int i, rv; 85 86 rv = bus_space_map(fdtbus_bs_tag, IMEM_PHYSBASE, IMEM_SIZE, 0, &imem); 87 if (rv != 0) 88 panic("Couldn't map the IMEM\n"); 89 rv = bus_space_map(fdtbus_bs_tag, PMU_PHYSBASE, PMU_SIZE, 0, &pmu); 90 if (rv != 0) 91 panic("Couldn't map the PMU\n"); 92 93 /* Power off all secondary cores first */ 94 val = bus_space_read_4(fdtbus_bs_tag, pmu, PMU_PWRDN_CON); 95 for (i = 1; i < mp_ncpus; i++) 96 val |= 1 << i; 97 bus_space_write_4(fdtbus_bs_tag, pmu, PMU_PWRDN_CON, val); 98 DELAY(5000); 99 100 /* Power up all secondary cores */ 101 val = bus_space_read_4(fdtbus_bs_tag, pmu, PMU_PWRDN_CON); 102 for (i = 1; i < mp_ncpus; i++) 103 val &= ~(1 << i); 104 bus_space_write_4(fdtbus_bs_tag, pmu, PMU_PWRDN_CON, val); 105 DELAY(5000); 106 107 /* Copy mpentry address then magic to sram */ 108 val = pmap_kextract((vm_offset_t)mpentry); 109 bus_space_write_4(fdtbus_bs_tag, imem, 8, val); 110 dsb(); 111 bus_space_write_4(fdtbus_bs_tag, imem, 4, 0xDEADBEAF); 112 dsb(); 113 114 sev(); 115 116 bus_space_unmap(fdtbus_bs_tag, imem, IMEM_SIZE); 117 bus_space_unmap(fdtbus_bs_tag, pmu, PMU_SIZE); 118 } 119 120 static bool 121 rk32xx_start_ap(u_int id, phandle_t node, u_int addr_cells, pcell_t *reg) 122 { 123 int rv; 124 char method[16]; 125 uint32_t mask; 126 127 if (!ofw_bus_node_status_okay(node)) 128 return(false); 129 130 /* Skip boot CPU. */ 131 if (id == 0) 132 return (true); 133 134 if (running_cpus >= mp_ncpus) 135 return (false); 136 running_cpus++; 137 138 mask = 1 << (*reg & 0x0f); 139 140 #ifdef INVARIANTS 141 if ((mask & pmu_mask) || (mask & psci_mask)) 142 printf("CPU: Duplicated register value: 0x%X for CPU(%d)\n", 143 *reg, id); 144 #endif 145 rv = OF_getprop(node, "enable-method", method, sizeof(method)); 146 if (rv > 0 && strcmp(method, "psci") == 0) { 147 psci_mask |= mask; 148 rv = psci_cpu_on(*reg, pmap_kextract((vm_offset_t)mpentry), id); 149 if (rv != PSCI_RETVAL_SUCCESS) { 150 printf("Failed to start CPU(%d)\n", id); 151 return (false); 152 } 153 return (true); 154 } 155 156 pmu_mask |= mask; 157 return (true); 158 } 159 160 void 161 rk32xx_mp_start_ap(platform_t plat) 162 { 163 164 ofw_cpu_early_foreach(rk32xx_start_ap, true); 165 if (pmu_mask != 0 && psci_mask != 0) { 166 printf("Inconsistent CPUs startup methods detected.\n"); 167 printf("Only PSCI enabled cores will be started.\n"); 168 return; 169 } 170 if (pmu_mask != 0) 171 rk32xx_mp_start_pmu(pmu_mask); 172 } 173