xref: /freebsd/sys/arm/qualcomm/qcom_scm_legacy.c (revision 960e65d23aaa55dd00255e95f14c2f6256a4fce3)
1*960e65d2SAdrian Chadd /*-
2*960e65d2SAdrian Chadd  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3*960e65d2SAdrian Chadd  *
4*960e65d2SAdrian Chadd  * Copyright (c) 2021 Adrian Chadd <adrian@FreeBSD.org>
5*960e65d2SAdrian Chadd  *
6*960e65d2SAdrian Chadd  * Redistribution and use in source and binary forms, with or without
7*960e65d2SAdrian Chadd  * modification, are permitted provided that the following conditions
8*960e65d2SAdrian Chadd  * are met:
9*960e65d2SAdrian Chadd  * 1. Redistributions of source code must retain the above copyright
10*960e65d2SAdrian Chadd  *    notice, this list of conditions and the following disclaimer.
11*960e65d2SAdrian Chadd  * 2. Redistributions in binary form must reproduce the above copyright
12*960e65d2SAdrian Chadd  *    notice, this list of conditions and the following disclaimer in the
13*960e65d2SAdrian Chadd  *    documentation and/or other materials provided with the distribution.
14*960e65d2SAdrian Chadd  *
15*960e65d2SAdrian Chadd  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16*960e65d2SAdrian Chadd  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17*960e65d2SAdrian Chadd  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18*960e65d2SAdrian Chadd  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19*960e65d2SAdrian Chadd  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20*960e65d2SAdrian Chadd  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21*960e65d2SAdrian Chadd  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22*960e65d2SAdrian Chadd  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23*960e65d2SAdrian Chadd  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24*960e65d2SAdrian Chadd  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25*960e65d2SAdrian Chadd  * SUCH DAMAGE.
26*960e65d2SAdrian Chadd  */
27*960e65d2SAdrian Chadd 
28*960e65d2SAdrian Chadd #include "opt_platform.h"
29*960e65d2SAdrian Chadd 
30*960e65d2SAdrian Chadd #include <sys/cdefs.h>
31*960e65d2SAdrian Chadd __FBSDID("$FreeBSD$");
32*960e65d2SAdrian Chadd 
33*960e65d2SAdrian Chadd #include <sys/param.h>
34*960e65d2SAdrian Chadd #include <sys/systm.h>
35*960e65d2SAdrian Chadd #include <sys/bus.h>
36*960e65d2SAdrian Chadd #include <sys/reboot.h>
37*960e65d2SAdrian Chadd #include <sys/devmap.h>
38*960e65d2SAdrian Chadd #include <sys/smp.h>
39*960e65d2SAdrian Chadd 
40*960e65d2SAdrian Chadd #include <vm/vm.h>
41*960e65d2SAdrian Chadd #include <vm/pmap.h>
42*960e65d2SAdrian Chadd 
43*960e65d2SAdrian Chadd #include <machine/cpu.h>
44*960e65d2SAdrian Chadd #include <machine/bus.h>
45*960e65d2SAdrian Chadd #include <machine/intr.h>
46*960e65d2SAdrian Chadd #include <machine/machdep.h>
47*960e65d2SAdrian Chadd #include <machine/smp.h>
48*960e65d2SAdrian Chadd 
49*960e65d2SAdrian Chadd #include <arm/qualcomm/qcom_scm_defs.h>
50*960e65d2SAdrian Chadd #include <arm/qualcomm/qcom_scm_legacy_defs.h>
51*960e65d2SAdrian Chadd #include <arm/qualcomm/qcom_scm_legacy.h>
52*960e65d2SAdrian Chadd 
53*960e65d2SAdrian Chadd #include <dev/psci/smccc.h>
54*960e65d2SAdrian Chadd 
55*960e65d2SAdrian Chadd /*
56*960e65d2SAdrian Chadd  * Set the cold boot address for (later) a mask of CPUs.
57*960e65d2SAdrian Chadd  *
58*960e65d2SAdrian Chadd  * Don't set it for CPU0, that CPU is the boot CPU and is already alive.
59*960e65d2SAdrian Chadd  *
60*960e65d2SAdrian Chadd  * For now it sets it on CPU1..3.
61*960e65d2SAdrian Chadd  *
62*960e65d2SAdrian Chadd  * This works on the IPQ4019 as tested; the retval is 0x0.
63*960e65d2SAdrian Chadd  */
64*960e65d2SAdrian Chadd uint32_t
65*960e65d2SAdrian Chadd qcom_scm_legacy_mp_set_cold_boot_address(vm_offset_t mp_entry_func)
66*960e65d2SAdrian Chadd {
67*960e65d2SAdrian Chadd 	struct arm_smccc_res res;
68*960e65d2SAdrian Chadd 	int ret;
69*960e65d2SAdrian Chadd 	int context_id;
70*960e65d2SAdrian Chadd 
71*960e65d2SAdrian Chadd 	uint32_t scm_arg0 = QCOM_SCM_LEGACY_ATOMIC_ID(QCOM_SCM_SVC_BOOT,
72*960e65d2SAdrian Chadd 	    QCOM_SCM_BOOT_SET_ADDR, 2);
73*960e65d2SAdrian Chadd 
74*960e65d2SAdrian Chadd 	uint32_t scm_arg1 = QCOM_SCM_FLAG_COLDBOOT_CPU1
75*960e65d2SAdrian Chadd 	    | QCOM_SCM_FLAG_COLDBOOT_CPU2
76*960e65d2SAdrian Chadd 	    | QCOM_SCM_FLAG_COLDBOOT_CPU3;
77*960e65d2SAdrian Chadd 	uint32_t scm_arg2 = pmap_kextract((vm_offset_t)mp_entry_func);
78*960e65d2SAdrian Chadd 
79*960e65d2SAdrian Chadd 	ret = arm_smccc_smc(scm_arg0, (uint32_t) &context_id, scm_arg1,
80*960e65d2SAdrian Chadd 	    scm_arg2, 0, 0, 0, 0, &res);
81*960e65d2SAdrian Chadd 
82*960e65d2SAdrian Chadd 	if (ret == 0 && res.a0 == 0)
83*960e65d2SAdrian Chadd 		return (0);
84*960e65d2SAdrian Chadd 	printf("%s: called; error; ret=0x%08x; retval[0]=0x%08x\n",
85*960e65d2SAdrian Chadd 	    __func__, ret, res.a0);
86*960e65d2SAdrian Chadd 
87*960e65d2SAdrian Chadd 	return (0);
88*960e65d2SAdrian Chadd }
89