xref: /freebsd/sys/arm/qualcomm/qcom_scm_defs.h (revision 95ee2897e98f5d444f26ed2334cc7c439f9c16c6)
1960e65d2SAdrian Chadd /*-
2*4d846d26SWarner Losh  * SPDX-License-Identifier: BSD-2-Clause
3960e65d2SAdrian Chadd  *
4960e65d2SAdrian Chadd  * Copyright (c) 2021 Adrian Chadd <adrian@FreeBSD.org>
5960e65d2SAdrian Chadd  *
6960e65d2SAdrian Chadd  * Redistribution and use in source and binary forms, with or without
7960e65d2SAdrian Chadd  * modification, are permitted provided that the following conditions
8960e65d2SAdrian Chadd  * are met:
9960e65d2SAdrian Chadd  * 1. Redistributions of source code must retain the above copyright
10960e65d2SAdrian Chadd  *    notice, this list of conditions and the following disclaimer.
11960e65d2SAdrian Chadd  * 2. Redistributions in binary form must reproduce the above copyright
12960e65d2SAdrian Chadd  *    notice, this list of conditions and the following disclaimer in the
13960e65d2SAdrian Chadd  *    documentation and/or other materials provided with the distribution.
14960e65d2SAdrian Chadd  *
15960e65d2SAdrian Chadd  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16960e65d2SAdrian Chadd  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17960e65d2SAdrian Chadd  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18960e65d2SAdrian Chadd  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19960e65d2SAdrian Chadd  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20960e65d2SAdrian Chadd  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21960e65d2SAdrian Chadd  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22960e65d2SAdrian Chadd  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23960e65d2SAdrian Chadd  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24960e65d2SAdrian Chadd  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25960e65d2SAdrian Chadd  * SUCH DAMAGE.
26960e65d2SAdrian Chadd  */
27960e65d2SAdrian Chadd 
28960e65d2SAdrian Chadd #ifndef	__QCOM_SCM_DEFS_H__
29960e65d2SAdrian Chadd #define	__QCOM_SCM_DEFS_H__
30960e65d2SAdrian Chadd 
31960e65d2SAdrian Chadd /*
32960e65d2SAdrian Chadd  * Maximum SCM arguments and return values.
33960e65d2SAdrian Chadd  */
34960e65d2SAdrian Chadd #define	MAX_QCOM_SCM_ARGS			10
35960e65d2SAdrian Chadd #define	MAX_QCOM_SCM_RETS			3
36960e65d2SAdrian Chadd 
37960e65d2SAdrian Chadd /*
38960e65d2SAdrian Chadd  * SCM argument type definitions.
39960e65d2SAdrian Chadd  */
40960e65d2SAdrian Chadd #define	QCOM_SCM_ARGTYPE_VAL			0x00
41960e65d2SAdrian Chadd #define	QCOM_SCM_ARGTYPE_RO			0x01
42960e65d2SAdrian Chadd #define	QCOM_SCM_ARGTYPE_RW			0x02
43960e65d2SAdrian Chadd #define	QCOM_SCM_ARGTYPE_BUFVAL			0x03
44960e65d2SAdrian Chadd 
45960e65d2SAdrian Chadd /*
46960e65d2SAdrian Chadd  * SCM calls + arguments.
47960e65d2SAdrian Chadd  */
48960e65d2SAdrian Chadd #define	QCOM_SCM_SVC_BOOT			0x01
49960e65d2SAdrian Chadd #define		QCOM_SCM_BOOT_SET_ADDR		0x01
50960e65d2SAdrian Chadd #define		QCOM_SCM_BOOT_TERMINATE_PC	0x02
51960e65d2SAdrian Chadd #define		QCOM_SCM_BOOT_SET_DLOAD_MODE	0x10
52960e65d2SAdrian Chadd #define		QCOM_SCM_BOOT_SET_REMOTE_STATE	0x0a
53960e65d2SAdrian Chadd #define		QCOM_SCM_FLUSH_FLAG_MASK	0x3
54960e65d2SAdrian Chadd 
55960e65d2SAdrian Chadd /* Flags for QCOM_SCM_BOOT_SET_ADDR argv[0] */
56960e65d2SAdrian Chadd /* Note: no COLDBOOT for CPU0, it's already booted */
57960e65d2SAdrian Chadd #define		QCOM_SCM_FLAG_COLDBOOT_CPU1	0x01
58960e65d2SAdrian Chadd #define		QCOM_SCM_FLAG_WARMBOOT_CPU1	0x02
59960e65d2SAdrian Chadd #define		QCOM_SCM_FLAG_WARMBOOT_CPU0	0x04
60960e65d2SAdrian Chadd #define		QCOM_SCM_FLAG_COLDBOOT_CPU2	0x08
61960e65d2SAdrian Chadd #define		QCOM_SCM_FLAG_WARMBOOT_CPU2	0x10
62960e65d2SAdrian Chadd #define		QCOM_SCM_FLAG_COLDBOOT_CPU3	0x20
63960e65d2SAdrian Chadd #define		QCOM_SCM_FLAG_WARMBOOT_CPU3	0x40
64960e65d2SAdrian Chadd 
65960e65d2SAdrian Chadd #define	QCOM_SCM_SVC_PIL			0x02
66960e65d2SAdrian Chadd #define		QCOM_SCM_PIL_PAS_INIT_IMAGE	0x01
67960e65d2SAdrian Chadd #define		QCOM_SCM_PIL_PAS_MEM_SETUP	0x02
68960e65d2SAdrian Chadd #define		QCOM_SCM_PIL_PAS_AUTH_AND_RESET	0x05
69960e65d2SAdrian Chadd #define		QCOM_SCM_PIL_PAS_SHUTDOWN	0x06
70960e65d2SAdrian Chadd #define		QCOM_SCM_PIL_PAS_IS_SUPPORTED	0x07
71960e65d2SAdrian Chadd #define		QCOM_SCM_PIL_PAS_MSS_RESET	0x0a
72960e65d2SAdrian Chadd 
73960e65d2SAdrian Chadd #define	QCOM_SCM_SVC_IO				0x05
74960e65d2SAdrian Chadd #define		QCOM_SCM_IO_READ		0x01
75960e65d2SAdrian Chadd #define		QCOM_SCM_IO_WRITE		0x02
76960e65d2SAdrian Chadd 
77960e65d2SAdrian Chadd /*
78960e65d2SAdrian Chadd  * Fetch SCM call availability information.
79960e65d2SAdrian Chadd  */
80960e65d2SAdrian Chadd #define	QCOM_SCM_SVC_INFO			0x06
81960e65d2SAdrian Chadd #define		QCOM_SCM_INFO_IS_CALL_AVAIL	0x01
82960e65d2SAdrian Chadd 
83960e65d2SAdrian Chadd #define	QCOM_SCM_SVC_MP				0x0c
84960e65d2SAdrian Chadd #define		QCOM_SCM_MP_RESTORE_SEC_CFG	0x02
85960e65d2SAdrian Chadd #define		QCOM_SCM_MP_IOMMU_SECURE_PTBL_SIZE	0x03
86960e65d2SAdrian Chadd #define		QCOM_SCM_MP_IOMMU_SECURE_PTBL_INIT	0x04
87960e65d2SAdrian Chadd #define		QCOM_SCM_MP_VIDEO_VAR		0x08
88960e65d2SAdrian Chadd #define		QCOM_SCM_MP_ASSIGN		0x16
89960e65d2SAdrian Chadd 
90960e65d2SAdrian Chadd #define	QCOM_SCM_SVC_OCMEM			0x0f
91960e65d2SAdrian Chadd #define		QCOM_SCM_OCMEM_LOCK_CMD		0x01
92960e65d2SAdrian Chadd #define		QCOM_SCM_OCMEM_UNLOCK_CMD	0x02
93960e65d2SAdrian Chadd 
94960e65d2SAdrian Chadd #define	QCOM_SCM_SVC_ES				0x10
95960e65d2SAdrian Chadd #define		QCOM_SCM_ES_INVALIDATE_ICE_KEY	0x03
96960e65d2SAdrian Chadd #define		QCOM_SCM_ES_CONFIG_SET_ICE_KEY	0x04
97960e65d2SAdrian Chadd 
98960e65d2SAdrian Chadd #define	QCOM_SCM_SVC_HDCP			0x11
99960e65d2SAdrian Chadd #define		QCOM_SCM_HDCP_INVOKE		0x01
100960e65d2SAdrian Chadd 
101960e65d2SAdrian Chadd #define	QCOM_SCM_SVC_LMH			0x13
102960e65d2SAdrian Chadd #define		QCOM_SCM_LMH_LIMIT_PROFILE_CHANGE	0x01
103960e65d2SAdrian Chadd #define		QCOM_SCM_LMH_LIMIT_DCVSH	0x10
104960e65d2SAdrian Chadd 
105960e65d2SAdrian Chadd #define	QCOM_SCM_SVC_SMMU_PROGRAM		0x15
106960e65d2SAdrian Chadd #define		QCOM_SCM_SMMU_CONFIG_ERRATA1	0x03
107960e65d2SAdrian Chadd #define		QCOM_SCM_SMMU_CONFIG_ERRATA1_CLIENT_ALL	0x02
108960e65d2SAdrian Chadd 
109960e65d2SAdrian Chadd /*
110960e65d2SAdrian Chadd  * Return values from the SCM calls.
111960e65d2SAdrian Chadd  */
112960e65d2SAdrian Chadd #define	QCOM_SCM_RETVAL_V2_EBUSY		-12
113960e65d2SAdrian Chadd #define	QCOM_SCM_RETVAL_ENOMEM			-5
114960e65d2SAdrian Chadd #define	QCOM_SCM_RETVAL_EOPNOTSUPP		-4
115960e65d2SAdrian Chadd #define	QCOM_SCM_RETVAL_EINVAL_ADDR		-3
116960e65d2SAdrian Chadd #define	QCOM_SCM_RETVAL_EINVAL_ARG		-2
117960e65d2SAdrian Chadd #define	QCOM_SCM_RETVAL_ERROR			-1
118960e65d2SAdrian Chadd #define	QCOM_SCM_RETVAL_INTERRUPTED		1
119960e65d2SAdrian Chadd 
120960e65d2SAdrian Chadd #endif	/* __QCOM_SCM_DEFS_H__ */
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