1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2021 Adrian Chadd <adrian@FreeBSD.org> 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include "opt_platform.h" 29 30 #include <sys/cdefs.h> 31 #include <sys/param.h> 32 #include <sys/systm.h> 33 #include <sys/bus.h> 34 #include <sys/reboot.h> 35 #include <sys/devmap.h> 36 #include <sys/smp.h> 37 38 #include <vm/vm.h> 39 40 #include <machine/cpu.h> 41 #include <machine/bus.h> 42 #include <machine/intr.h> 43 #include <machine/machdep.h> 44 #include <machine/platformvar.h> 45 #include <machine/smp.h> 46 47 #include <dev/fdt/fdt_common.h> 48 #include <dev/ofw/openfirm.h> 49 #include <dev/ofw/ofw_cpu.h> 50 51 #include <arm/qualcomm/qcom_cpu_kpssv2_reg.h> 52 #include <arm/qualcomm/qcom_cpu_kpssv2.h> 53 54 #include "platform_if.h" 55 56 /* 57 * Since DELAY() hangs this early, we need some way to 58 * delay things to settle. 59 */ 60 static inline void 61 loop_delay(int usec) 62 { 63 int lcount = usec * 100000; 64 65 for (volatile int i = 0; i < lcount; i++) 66 ; 67 } 68 69 /* 70 * This is the KPSSv2 (eg IPQ4018) regulator path for CPU 71 * and shared L2 cache power-on. 72 */ 73 bool 74 qcom_cpu_kpssv2_regulator_start(u_int id, phandle_t node) 75 { 76 phandle_t acc_phandle, l2_phandle, saw_phandle; 77 bus_space_tag_t acc_tag, saw_tag; 78 bus_space_handle_t acc_handle, saw_handle; 79 bus_size_t acc_sz, saw_sz; 80 ssize_t sret; 81 int ret; 82 uint32_t reg_val; 83 84 /* 85 * We don't need to power up CPU 0! This will power it 86 * down first and ... then everything hangs. 87 */ 88 if (id == 0) 89 return true; 90 91 /* 92 * Walk the qcom,acc and next-level-cache entries to find their 93 * child phandles and thus regulators. 94 * 95 * The qcom,acc is a phandle to a node. 96 * 97 * The next-level-cache actually is a phandle through to a qcom,saw 98 * entry. 99 */ 100 sret = OF_getencprop(node, "qcom,acc", (void *) &acc_phandle, 101 sizeof(acc_phandle)); 102 if (sret != sizeof(acc_phandle)) 103 panic("***couldn't get phandle for qcom,acc"); 104 acc_phandle = OF_node_from_xref(acc_phandle); 105 106 sret = OF_getencprop(node, "next-level-cache", (void *) &l2_phandle, 107 sizeof(l2_phandle)); 108 if (sret != sizeof(l2_phandle)) 109 panic("***couldn't get phandle for next-level-cache"); 110 l2_phandle = OF_node_from_xref(l2_phandle); 111 112 sret = OF_getencprop(l2_phandle, "qcom,saw", (void *) &saw_phandle, 113 sizeof(saw_phandle)); 114 if (sret != sizeof(saw_phandle)) 115 panic("***couldn't get phandle for qcom,saw"); 116 l2_phandle = OF_node_from_xref(l2_phandle); 117 118 /* 119 * Now that we have the phandles referencing the correct locations, 120 * do some KVA mappings so we can go access the registers. 121 */ 122 ret = OF_decode_addr(acc_phandle, 0, &acc_tag, &acc_handle, &acc_sz); 123 if (ret != 0) 124 panic("*** couldn't map qcom,acc space (%d)", ret); 125 ret = OF_decode_addr(saw_phandle, 0, &saw_tag, &saw_handle, &saw_sz); 126 if (ret != 0) 127 panic("*** couldn't map next-level-cache -> " 128 "qcom,saw space (%d)", ret); 129 130 /* 131 * Power sequencing to ensure the cores are off, then power them on 132 * and bring them out of reset. 133 */ 134 135 /* 136 * BHS: off 137 * LDO: bypassed, powered off 138 */ 139 reg_val = (64 << QCOM_APC_PWR_GATE_CTL_BHS_CNT_SHIFT) 140 | (0x3f << QCOM_APC_PWR_GATE_CTL_LDO_PWR_DWN_SHIFT) 141 | QCOM_APC_PWR_GATE_CTL_BHS_EN; 142 bus_space_write_4(acc_tag, acc_handle, QCOM_APC_PWR_GATE_CTL, reg_val); 143 mb(); 144 /* Settle time */ 145 loop_delay(1); 146 147 /* 148 * Start up BHS segments. 149 */ 150 reg_val |= 0x3f << QCOM_APC_PWR_GATE_CTL_BHS_SEG_SHIFT; 151 bus_space_write_4(acc_tag, acc_handle, QCOM_APC_PWR_GATE_CTL, reg_val); 152 mb(); 153 /* Settle time */ 154 loop_delay(1); 155 156 /* 157 * Switch on the LDO bypass; BHS will now supply power. 158 */ 159 reg_val |= 0x3f << QCOM_APC_PWR_GATE_CTL_LDO_BYP_SHIFT; 160 bus_space_write_4(acc_tag, acc_handle, QCOM_APC_PWR_GATE_CTL, reg_val); 161 162 /* 163 * Shared L2 regulator control. 164 */ 165 bus_space_write_4(saw_tag, saw_handle, QCOM_APCS_SAW2_2_VCTL, 0x10003); 166 mb(); 167 /* Settle time */ 168 loop_delay(50); 169 170 /* 171 * Put the core in reset. 172 */ 173 reg_val = QCOM_APCS_CPU_PWR_CTL_COREPOR_RST 174 | QCOM_APCS_CPU_PWR_CTL_CLAMP; 175 bus_space_write_4(acc_tag, acc_handle, QCOM_APCS_CPU_PWR_CTL, reg_val); 176 mb(); 177 loop_delay(2); 178 179 /* 180 * Remove power-down clamp. 181 */ 182 reg_val &= ~QCOM_APCS_CPU_PWR_CTL_CLAMP; 183 bus_space_write_4(acc_tag, acc_handle, QCOM_APCS_CPU_PWR_CTL, reg_val); 184 mb(); 185 loop_delay(2); 186 187 /* 188 * Clear core power reset. 189 */ 190 reg_val &= ~QCOM_APCS_CPU_PWR_CTL_COREPOR_RST; 191 bus_space_write_4(acc_tag, acc_handle, QCOM_APCS_CPU_PWR_CTL, reg_val); 192 mb(); 193 194 /* 195 * The power is ready, the core is out of reset, signal the core 196 * to power up. 197 */ 198 reg_val |= QCOM_APCS_CPU_PWR_CTL_CORE_PWRD_UP; 199 bus_space_write_4(acc_tag, acc_handle, QCOM_APCS_CPU_PWR_CTL, reg_val); 200 mb(); 201 202 /* 203 * Finished with these KVA mappings, so release them. 204 */ 205 bus_space_unmap(acc_tag, acc_handle, acc_sz); 206 bus_space_unmap(saw_tag, saw_handle, saw_sz); 207 208 return true; 209 } 210