1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2021 Adrian Chadd <adrian@FreeBSD.org> 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include "opt_platform.h" 29 30 #include <sys/cdefs.h> 31 __FBSDID("$FreeBSD$"); 32 33 #include <sys/param.h> 34 #include <sys/systm.h> 35 #include <sys/bus.h> 36 #include <sys/reboot.h> 37 #include <sys/devmap.h> 38 #include <sys/physmem.h> 39 #include <sys/lock.h> 40 41 #include <vm/vm.h> 42 43 #include <machine/bus.h> 44 #include <machine/fdt.h> 45 #include <machine/intr.h> 46 #include <machine/machdep.h> 47 #include <machine/platformvar.h> 48 49 #include <dev/fdt/fdt_common.h> 50 #include <dev/ofw/openfirm.h> 51 52 #include <arm/qualcomm/ipq4018_machdep.h> 53 #include <arm/qualcomm/ipq4018_reg.h> 54 55 #include "platform_if.h" 56 57 static int 58 ipq4018_attach(platform_t plat) 59 { 60 return (0); 61 } 62 63 static void 64 ipq4018_late_init(platform_t plat) 65 { 66 /* 67 * XXX FIXME This is needed because we're not parsing 68 * the fdt reserved memory regions in a consistent way 69 * between arm/arm64. Once the reserved region parsing 70 * is fixed up this will become unneccessary. 71 * 72 * These cover the SRAM/TZ regions that are not fully 73 * accessible from the OS. They're in the ipq4018.dtsi 74 * tree. 75 * 76 * Without these, the system fails to boot because we 77 * aren't parsing the regions correctly. 78 * 79 * These will be unnecessary once the parser and setup 80 * code is fixed. 81 */ 82 physmem_exclude_region(IPQ4018_MEM_SMEM_START, 83 IPQ4018_MEM_SMEM_SIZE, 84 EXFLAG_NODUMP | EXFLAG_NOALLOC); 85 physmem_exclude_region(IPQ4018_MEM_TZ_START, 86 IPQ4018_MEM_TZ_SIZE, 87 EXFLAG_NODUMP | EXFLAG_NOALLOC); 88 } 89 90 static int 91 ipq4018_devmap_init(platform_t plat) 92 { 93 /* 94 * This covers the boot UART. Without it we can't boot successfully: 95 * there's a mutex uninit panic in subr_vmem.c that occurs when doing 96 * a call to pmap_mapdev() when the bus space code is doing its thing. 97 */ 98 devmap_add_entry(IPQ4018_MEM_UART1_START, IPQ4018_MEM_UART1_SIZE); 99 100 /* 101 * This covers a bunch of the reset block, which includes the PS-HOLD 102 * register for dropping power. 103 */ 104 devmap_add_entry(IPQ4018_MEM_PSHOLD_START, IPQ4018_MEM_PSHOLD_SIZE); 105 106 return (0); 107 } 108 109 /* 110 * This toggles the PS-HOLD register which on most IPQ devices will toggle 111 * the power control block and reset the SoC. 112 * 113 * However, there are apparently some units out there where this is not 114 * appropriate and instead the watchdog needs to be used. 115 * 116 * For now since there's only going to be one or two initial supported boards 117 * this will be fine. But if this doesn't reboot cleanly, now you know. 118 */ 119 static void 120 ipq4018_cpu_reset_pshold(void) 121 { 122 bus_space_handle_t pshold; 123 124 printf("%s: called\n", __func__); 125 126 bus_space_map(fdtbus_bs_tag, IPQ4018_MEM_PSHOLD_START, 127 IPQ4018_MEM_PSHOLD_SIZE, 0, &pshold); 128 bus_space_write_4(fdtbus_bs_tag, pshold, 0, 0); 129 bus_space_barrier(fdtbus_bs_tag, pshold, 0, 0x4, 130 BUS_SPACE_BARRIER_WRITE); 131 } 132 133 static void 134 ipq4018_cpu_reset(platform_t plat) 135 { 136 spinlock_enter(); 137 dsb(); 138 139 ipq4018_cpu_reset_pshold(); 140 141 /* Spin */ 142 printf("%s: spinning\n", __func__); 143 while(1) 144 ; 145 } 146 147 /* 148 * Early putc routine for EARLY_PRINTF support. To use, add to kernel config: 149 * option SOCDEV_PA=0x07800000 150 * option SOCDEV_VA=0x07800000 151 * option EARLY_PRINTF 152 * Resist the temptation to change the #if 0 to #ifdef EARLY_PRINTF here. It 153 * makes sense now, but if multiple SOCs do that it will make early_putc another 154 * duplicate symbol to be eliminated on the path to a generic kernel. 155 */ 156 #if 0 157 void 158 qca_msm_early_putc(int c) 159 { 160 static int is_init = 0; 161 162 int limit; 163 /* 164 * This must match what's put into SOCDEV_VA. You have to change them 165 * both together. 166 * 167 * XXX TODO I should really go and just make UART_BASE here depend upon 168 * SOCDEV_VA so they move together. 169 */ 170 #define UART_BASE IPQ4018_MEM_UART1_START 171 volatile uint32_t * UART_DM_TF0 = (uint32_t *)(UART_BASE + 0x70); 172 volatile uint32_t * UART_DM_SR = (uint32_t *)(UART_BASE + 0x08); 173 #define UART_DM_SR_TXEMT (1 << 3) 174 #define UART_DM_SR_TXRDY (1 << 2) 175 volatile uint32_t * UART_DM_ISR = (uint32_t *)(UART_BASE + 0x14); 176 volatile uint32_t * UART_DM_CR = (uint32_t *)(UART_BASE + 0x10); 177 #define UART_DM_TX_READY (1 << 7) 178 #define UART_DM_CLEAR_TX_READY 0x300 179 volatile uint32_t * UART_DM_NO_CHARS_FOR_TX = (uint32_t *)(UART_BASE + 0x40); 180 volatile uint32_t * UART_DM_TFWR = (uint32_t *)(UART_BASE + 0x1c); 181 #define UART_DM_TFW_VALUE 0 182 volatile uint32_t * UART_DM_IPR = (uint32_t *)(UART_BASE + 0x18); 183 #define UART_DM_STALE_TIMEOUT_LSB 0xf 184 185 if (is_init == 0) { 186 is_init = 1; 187 *UART_DM_TFWR = UART_DM_TFW_VALUE; 188 wmb(); 189 *UART_DM_IPR = UART_DM_STALE_TIMEOUT_LSB; 190 wmb(); 191 } 192 193 /* Wait until TXFIFO is empty via ISR */ 194 limit = 100000; 195 if ((*UART_DM_SR & UART_DM_SR_TXEMT) == 0) { 196 while (((*UART_DM_ISR & UART_DM_TX_READY) == 0) && --limit) { 197 /* Note - can't use DELAY here yet, too early */ 198 rmb(); 199 } 200 *UART_DM_CR = UART_DM_CLEAR_TX_READY; 201 wmb(); 202 } 203 204 /* FIFO is ready. Say we're going to write one byte */ 205 *UART_DM_NO_CHARS_FOR_TX = 1; 206 wmb(); 207 208 limit = 100000; 209 while (((*UART_DM_SR & UART_DM_SR_TXRDY) == 0) && --limit) { 210 /* Note - can't use DELAY here yet, too early */ 211 rmb(); 212 } 213 214 /* Put character in first fifo slot */ 215 *UART_DM_TF0 = c; 216 wmb(); 217 } 218 early_putc_t *early_putc = qca_msm_early_putc; 219 #endif 220 221 static platform_method_t ipq4018_methods[] = { 222 PLATFORMMETHOD(platform_attach, ipq4018_attach), 223 PLATFORMMETHOD(platform_devmap_init, ipq4018_devmap_init), 224 PLATFORMMETHOD(platform_late_init, ipq4018_late_init), 225 PLATFORMMETHOD(platform_cpu_reset, ipq4018_cpu_reset), 226 227 #ifdef SMP 228 PLATFORMMETHOD(platform_mp_start_ap, ipq4018_mp_start_ap), 229 PLATFORMMETHOD(platform_mp_setmaxid, ipq4018_mp_setmaxid), 230 #endif 231 232 PLATFORMMETHOD_END, 233 }; 234 235 FDT_PLATFORM_DEF2(ipq4018, ipq4018_ac58u, "ASUS RT-AC58U", 0, 236 "asus,rt-ac58u", 80); 237