1 /*- 2 * Copyright (c) 2016 Michal Meloun <mmel@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __FBSDID("$FreeBSD$"); 29 30 /* 31 * SoC misc configuration and indentification driver. 32 */ 33 #include <sys/param.h> 34 #include <sys/systm.h> 35 #include <sys/bus.h> 36 #include <sys/clock.h> 37 #include <sys/kernel.h> 38 #include <sys/limits.h> 39 #include <sys/lock.h> 40 #include <sys/mutex.h> 41 #include <sys/module.h> 42 #include <sys/resource.h> 43 44 #include <machine/bus.h> 45 #include <machine/resource.h> 46 #include <sys/rman.h> 47 48 #include <dev/fdt/fdt_common.h> 49 #include <dev/ofw/ofw_bus.h> 50 #include <dev/ofw/ofw_bus_subr.h> 51 52 #include <arm/nvidia/tegra_efuse.h> 53 54 #define PMC_STRAPPING_OPT_A 0 /* 0x464 */ 55 56 #define PMC_STRAPPING_OPT_A_RAM_CODE_SHIFT 4 57 #define PMC_STRAPPING_OPT_A_RAM_CODE_MASK_LONG \ 58 (0xf << PMC_STRAPPING_OPT_A_RAM_CODE_SHIFT) 59 #define PMC_STRAPPING_OPT_A_RAM_CODE_MASK_SHORT \ 60 (0x3 << PMC_STRAPPING_OPT_A_RAM_CODE_SHIFT) 61 62 63 #define ABP_RD4(_sc, _r) bus_read_4((_sc)->abp_misc_res, (_r)) 64 #define STR_RD4(_sc, _r) bus_read_4((_sc)->strap_opt_res, (_r)) 65 66 static struct ofw_compat_data compat_data[] = { 67 {"nvidia,tegra124-apbmisc", 1}, 68 {NULL, 0} 69 }; 70 71 struct tegra_abpmisc_softc { 72 device_t dev; 73 74 struct resource *abp_misc_res; 75 struct resource *strap_opt_res; 76 }; 77 78 static struct tegra_abpmisc_softc *dev_sc; 79 80 static void 81 tegra_abpmisc_read_revision(struct tegra_abpmisc_softc *sc) 82 { 83 uint32_t id, chip_id, minor_rev; 84 int rev; 85 86 id = ABP_RD4(sc, 4); 87 chip_id = (id >> 8) & 0xff; 88 minor_rev = (id >> 16) & 0xf; 89 90 switch (minor_rev) { 91 case 1: 92 rev = TEGRA_REVISION_A01; 93 break; 94 case 2: 95 rev = TEGRA_REVISION_A02; 96 break; 97 case 3: 98 rev = TEGRA_REVISION_A03; 99 break; 100 case 4: 101 rev = TEGRA_REVISION_A04; 102 break; 103 default: 104 rev = TEGRA_REVISION_UNKNOWN; 105 } 106 107 tegra_sku_info.chip_id = chip_id; 108 tegra_sku_info.revision = rev; 109 } 110 111 static int 112 tegra_abpmisc_probe(device_t dev) 113 { 114 if (!ofw_bus_status_okay(dev)) 115 return (ENXIO); 116 117 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) 118 return (ENXIO); 119 120 return (BUS_PROBE_DEFAULT); 121 } 122 123 static int 124 tegra_abpmisc_attach(device_t dev) 125 { 126 int rid; 127 struct tegra_abpmisc_softc *sc; 128 129 sc = device_get_softc(dev); 130 sc->dev = dev; 131 132 rid = 0; 133 sc->abp_misc_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, 134 RF_ACTIVE | RF_SHAREABLE); 135 if (sc->abp_misc_res == NULL) { 136 device_printf(dev, "Cannot map ABP misc registers.\n"); 137 goto fail; 138 } 139 140 rid = 1; 141 sc->strap_opt_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, 142 RF_ACTIVE); 143 if (sc->strap_opt_res == NULL) { 144 device_printf(dev, "Cannot map strapping options registers.\n"); 145 goto fail; 146 } 147 148 tegra_abpmisc_read_revision(sc); 149 150 /* XXX - Hack - address collision with pinmux. */ 151 if (sc->abp_misc_res != NULL) { 152 bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->abp_misc_res); 153 sc->abp_misc_res = NULL; 154 } 155 156 dev_sc = sc; 157 return (bus_generic_attach(dev)); 158 159 fail: 160 if (sc->abp_misc_res != NULL) 161 bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->abp_misc_res); 162 if (sc->strap_opt_res != NULL) 163 bus_release_resource(dev, SYS_RES_MEMORY, 1, sc->strap_opt_res); 164 165 return (ENXIO); 166 } 167 168 static int 169 tegra_abpmisc_detach(device_t dev) 170 { 171 struct tegra_abpmisc_softc *sc; 172 173 sc = device_get_softc(dev); 174 if (sc->abp_misc_res != NULL) 175 bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->abp_misc_res); 176 if (sc->strap_opt_res != NULL) 177 bus_release_resource(dev, SYS_RES_MEMORY, 1, sc->strap_opt_res); 178 return (bus_generic_detach(dev)); 179 } 180 181 static device_method_t tegra_abpmisc_methods[] = { 182 /* Device interface */ 183 DEVMETHOD(device_probe, tegra_abpmisc_probe), 184 DEVMETHOD(device_attach, tegra_abpmisc_attach), 185 DEVMETHOD(device_detach, tegra_abpmisc_detach), 186 187 DEVMETHOD_END 188 }; 189 190 DEFINE_CLASS_0(tegra_abpmisc, tegra_abpmisc_driver, tegra_abpmisc_methods, 191 sizeof(struct tegra_abpmisc_softc)); 192 static devclass_t tegra_abpmisc_devclass; 193 EARLY_DRIVER_MODULE(tegra_abpmisc, simplebus, tegra_abpmisc_driver, 194 tegra_abpmisc_devclass, 0, 0, BUS_PASS_TIMER); 195