1 /*- 2 * Copyright (c) 2016 Michal Meloun <mmel@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 17 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 19 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 20 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 21 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 22 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 23 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 24 */ 25 26 #include <sys/cdefs.h> 27 #include <sys/param.h> 28 #include <sys/systm.h> 29 #include <sys/bus.h> 30 #include <sys/kernel.h> 31 #include <sys/lock.h> 32 #include <sys/mutex.h> 33 #include <sys/smp.h> 34 35 #include <vm/vm.h> 36 #include <vm/pmap.h> 37 38 #include <machine/cpu.h> 39 #include <machine/intr.h> 40 #include <machine/fdt.h> 41 #include <machine/smp.h> 42 #include <machine/platformvar.h> 43 #include <machine/pmap.h> 44 45 #include <arm/nvidia/tegra124/tegra124_mp.h> 46 47 #define PMC_PHYSBASE 0x7000e400 48 #define PMC_SIZE 0x400 49 #define PMC_CONTROL_REG 0x0 50 #define PMC_PWRGATE_TOGGLE 0x30 51 #define PCM_PWRGATE_TOGGLE_START (1 << 8) 52 #define PMC_PWRGATE_STATUS 0x38 53 54 #define TEGRA_EXCEPTION_VECTORS_BASE 0x6000F000 /* exception vectors */ 55 #define TEGRA_EXCEPTION_VECTORS_SIZE 1024 56 #define TEGRA_EXCEPTION_VECTOR_ENTRY 0x100 57 58 void 59 tegra124_mp_setmaxid(platform_t plat) 60 { 61 int ncpu; 62 63 /* If we've already set the global vars don't bother to do it again. */ 64 if (mp_ncpus != 0) 65 return; 66 67 /* Read current CP15 Cache Size ID Register */ 68 ncpu = cp15_l2ctlr_get(); 69 ncpu = CPUV7_L2CTLR_NPROC(ncpu); 70 71 mp_ncpus = ncpu; 72 mp_maxid = ncpu - 1; 73 } 74 75 void 76 tegra124_mp_start_ap(platform_t plat) 77 { 78 bus_space_handle_t pmc; 79 bus_space_handle_t exvec; 80 int i; 81 uint32_t val; 82 uint32_t mask; 83 84 if (bus_space_map(fdtbus_bs_tag, PMC_PHYSBASE, PMC_SIZE, 0, &pmc) != 0) 85 panic("Couldn't map the PMC\n"); 86 if (bus_space_map(fdtbus_bs_tag, TEGRA_EXCEPTION_VECTORS_BASE, 87 TEGRA_EXCEPTION_VECTORS_SIZE, 0, &exvec) != 0) 88 panic("Couldn't map the exception vectors\n"); 89 90 bus_space_write_4(fdtbus_bs_tag, exvec , TEGRA_EXCEPTION_VECTOR_ENTRY, 91 pmap_kextract((vm_offset_t)mpentry)); 92 bus_space_read_4(fdtbus_bs_tag, exvec , TEGRA_EXCEPTION_VECTOR_ENTRY); 93 94 /* Wait until POWERGATE is ready (max 20 APB cycles). */ 95 do { 96 val = bus_space_read_4(fdtbus_bs_tag, pmc, 97 PMC_PWRGATE_TOGGLE); 98 } while ((val & PCM_PWRGATE_TOGGLE_START) != 0); 99 100 for (i = 1; i < mp_ncpus; i++) { 101 val = bus_space_read_4(fdtbus_bs_tag, pmc, PMC_PWRGATE_STATUS); 102 mask = 1 << (i + 8); /* cpu mask */ 103 if ((val & mask) == 0) { 104 /* Wait until POWERGATE is ready (max 20 APB cycles). */ 105 do { 106 val = bus_space_read_4(fdtbus_bs_tag, pmc, 107 PMC_PWRGATE_TOGGLE); 108 } while ((val & PCM_PWRGATE_TOGGLE_START) != 0); 109 bus_space_write_4(fdtbus_bs_tag, pmc, 110 PMC_PWRGATE_TOGGLE, 111 PCM_PWRGATE_TOGGLE_START | (8 + i)); 112 113 /* Wait until CPU is powered */ 114 do { 115 val = bus_space_read_4(fdtbus_bs_tag, pmc, 116 PMC_PWRGATE_STATUS); 117 } while ((val & mask) == 0); 118 } 119 } 120 dsb(); 121 sev(); 122 bus_space_unmap(fdtbus_bs_tag, pmc, PMC_SIZE); 123 bus_space_unmap(fdtbus_bs_tag, exvec, TEGRA_EXCEPTION_VECTORS_SIZE); 124 } 125