xref: /freebsd/sys/arm/nvidia/tegra124/tegra124_machdep.c (revision f126890ac5386406dadf7c4cfa9566cbb56537c5)
1 /*-
2  * Copyright (c) 2016 Michal Meloun <mmel@FreeBSD.org>
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  *
14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24  * SUCH DAMAGE.
25  */
26 
27 #include "opt_platform.h"
28 
29 #include <sys/param.h>
30 #include <sys/bus.h>
31 #include <sys/devmap.h>
32 #include <sys/lock.h>
33 #include <sys/reboot.h>
34 #include <sys/systm.h>
35 
36 #include <vm/vm.h>
37 
38 #include <machine/bus.h>
39 #include <machine/fdt.h>
40 #include <machine/intr.h>
41 #include <machine/machdep.h>
42 #include <machine/platformvar.h>
43 
44 #include <dev/ofw/openfirm.h>
45 
46 #include <arm/nvidia/tegra124/tegra124_mp.h>
47 
48 #include "platform_if.h"
49 
50 #define	PMC_PHYSBASE		0x7000e400
51 #define	PMC_SIZE		0x400
52 #define	PMC_CONTROL_REG		0x0
53 #define	PMC_SCRATCH0		0x50
54 #define	 PMC_SCRATCH0_MODE_RECOVERY	(1 << 31)
55 #define	 PMC_SCRATCH0_MODE_BOOTLOADER	(1 << 30)
56 #define	 PMC_SCRATCH0_MODE_RCM		(1 << 1)
57 #define	 PMC_SCRATCH0_MODE_MASK		(PMC_SCRATCH0_MODE_RECOVERY | \
58 					PMC_SCRATCH0_MODE_BOOTLOADER | \
59 					PMC_SCRATCH0_MODE_RCM)
60 
61 static platform_attach_t tegra124_attach;
62 static platform_devmap_init_t tegra124_devmap_init;
63 static platform_late_init_t tegra124_late_init;
64 static platform_cpu_reset_t tegra124_cpu_reset;
65 
66 static int
67 tegra124_attach(platform_t plat)
68 {
69 
70 	return (0);
71 }
72 
73 static void
74 tegra124_late_init(platform_t plat)
75 {
76 
77 }
78 
79 /*
80  * Set up static device mappings.
81  *
82  */
83 static int
84 tegra124_devmap_init(platform_t plat)
85 {
86 
87 	devmap_add_entry(0x70000000, 0x01000000);
88 	return (0);
89 }
90 
91 static void
92 tegra124_cpu_reset(platform_t plat)
93 {
94 	bus_space_handle_t pmc;
95 	uint32_t reg;
96 
97 	printf("Resetting...\n");
98 	bus_space_map(fdtbus_bs_tag, PMC_PHYSBASE, PMC_SIZE, 0, &pmc);
99 
100 	reg = bus_space_read_4(fdtbus_bs_tag, pmc, PMC_SCRATCH0);
101 	reg &= PMC_SCRATCH0_MODE_MASK;
102 	bus_space_write_4(fdtbus_bs_tag, pmc, PMC_SCRATCH0,
103 	   reg | PMC_SCRATCH0_MODE_BOOTLOADER); 	/* boot to bootloader */
104 	bus_space_read_4(fdtbus_bs_tag, pmc, PMC_SCRATCH0);
105 
106 	reg = bus_space_read_4(fdtbus_bs_tag, pmc, PMC_CONTROL_REG);
107 	spinlock_enter();
108 	dsb();
109 	bus_space_write_4(fdtbus_bs_tag, pmc, PMC_CONTROL_REG, reg | 0x10);
110 	bus_space_read_4(fdtbus_bs_tag, pmc, PMC_CONTROL_REG);
111 	while(1)
112 		;
113 
114 }
115 
116 /*
117  * Early putc routine for EARLY_PRINTF support.  To use, add to kernel config:
118  *   option SOCDEV_PA=0x70000000
119  *   option SOCDEV_VA=0x70000000
120  *   option EARLY_PRINTF
121  */
122 #if 0
123 #ifdef EARLY_PRINTF
124 static void
125 tegra124_early_putc(int c)
126 {
127 
128 	volatile uint32_t * UART_STAT_REG = (uint32_t *)(0x70006314);
129 	volatile uint32_t * UART_TX_REG   = (uint32_t *)(0x70006300);
130 	const uint32_t      UART_TXRDY    = (1 << 6);
131 	while ((*UART_STAT_REG & UART_TXRDY) == 0)
132 		continue;
133 	*UART_TX_REG = c;
134 }
135 early_putc_t *early_putc = tegra124_early_putc;
136 #endif
137 #endif
138 
139 static platform_method_t tegra124_methods[] = {
140 	PLATFORMMETHOD(platform_attach,		tegra124_attach),
141 	PLATFORMMETHOD(platform_devmap_init,	tegra124_devmap_init),
142 	PLATFORMMETHOD(platform_late_init,	tegra124_late_init),
143 	PLATFORMMETHOD(platform_cpu_reset,	tegra124_cpu_reset),
144 
145 #ifdef SMP
146 	PLATFORMMETHOD(platform_mp_start_ap,	tegra124_mp_start_ap),
147 	PLATFORMMETHOD(platform_mp_setmaxid,	tegra124_mp_setmaxid),
148 #endif
149 	PLATFORMMETHOD_END,
150 };
151 
152 FDT_PLATFORM_DEF(tegra124, "Nvidia Jetson-TK1", 0, "nvidia,jetson-tk1", 120);
153