1 /*- 2 * Copyright (c) 2016 Michal Meloun <mmel@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 #define _ARM32_BUS_DMA_PRIVATE 28 #include "opt_platform.h" 29 30 #include <sys/cdefs.h> 31 __FBSDID("$FreeBSD$"); 32 33 #include <sys/param.h> 34 #include <sys/systm.h> 35 #include <sys/bus.h> 36 #include <sys/reboot.h> 37 #include <sys/devmap.h> 38 39 #include <vm/vm.h> 40 41 #include <machine/bus.h> 42 #include <machine/fdt.h> 43 #include <machine/intr.h> 44 #include <machine/machdep.h> 45 #include <machine/platformvar.h> 46 47 #include <dev/fdt/fdt_common.h> 48 #include <dev/ofw/openfirm.h> 49 50 #include <arm/nvidia/tegra124/tegra124_mp.h> 51 52 #include "platform_if.h" 53 54 #define PMC_PHYSBASE 0x7000e400 55 #define PMC_SIZE 0x400 56 #define PMC_CONTROL_REG 0x0 57 #define PMC_SCRATCH0 0x50 58 #define PMC_SCRATCH0_MODE_RECOVERY (1 << 31) 59 #define PMC_SCRATCH0_MODE_BOOTLOADER (1 << 30) 60 #define PMC_SCRATCH0_MODE_RCM (1 << 1) 61 #define PMC_SCRATCH0_MODE_MASK (PMC_SCRATCH0_MODE_RECOVERY | \ 62 PMC_SCRATCH0_MODE_BOOTLOADER | \ 63 PMC_SCRATCH0_MODE_RCM) 64 65 struct fdt_fixup_entry fdt_fixup_table[] = { 66 { NULL, NULL } 67 }; 68 69 struct arm32_dma_range * 70 bus_dma_get_range(void) 71 { 72 73 return (NULL); 74 } 75 76 int 77 bus_dma_get_range_nb(void) 78 { 79 80 return (0); 81 } 82 83 static vm_offset_t 84 tegra124_lastaddr(platform_t plat) 85 { 86 87 return (devmap_lastaddr()); 88 } 89 90 static int 91 tegra124_attach(platform_t plat) 92 { 93 94 return (0); 95 } 96 97 static void 98 tegra124_late_init(platform_t plat) 99 { 100 101 } 102 103 /* 104 * Set up static device mappings. 105 * 106 */ 107 static int 108 tegra124_devmap_init(platform_t plat) 109 { 110 111 devmap_add_entry(0x70000000, 0x01000000); 112 return (0); 113 } 114 115 void 116 cpu_reset(void) 117 { 118 bus_space_handle_t pmc; 119 uint32_t reg; 120 121 printf("Resetting...\n"); 122 bus_space_map(fdtbus_bs_tag, PMC_PHYSBASE, PMC_SIZE, 0, &pmc); 123 124 reg = bus_space_read_4(fdtbus_bs_tag, pmc, PMC_SCRATCH0); 125 reg &= PMC_SCRATCH0_MODE_MASK; 126 bus_space_write_4(fdtbus_bs_tag, pmc, PMC_SCRATCH0, 127 reg | PMC_SCRATCH0_MODE_BOOTLOADER); /* boot to bootloader */ 128 bus_space_read_4(fdtbus_bs_tag, pmc, PMC_SCRATCH0); 129 130 reg = bus_space_read_4(fdtbus_bs_tag, pmc, PMC_CONTROL_REG); 131 spinlock_enter(); 132 dsb(); 133 bus_space_write_4(fdtbus_bs_tag, pmc, PMC_CONTROL_REG, reg | 0x10); 134 bus_space_read_4(fdtbus_bs_tag, pmc, PMC_CONTROL_REG); 135 while(1) 136 ; 137 138 } 139 140 /* 141 * Early putc routine for EARLY_PRINTF support. To use, add to kernel config: 142 * option SOCDEV_PA=0x02000000 143 * option SOCDEV_VA=0x02000000 144 * option EARLY_PRINTF 145 */ 146 #if 0 147 static void 148 tegra124_early_putc(int c) 149 { 150 volatile uint32_t * UART_STAT_REG = (uint32_t *)0x02020098; 151 volatile uint32_t * UART_TX_REG = (uint32_t *)0x02020040; 152 const uint32_t UART_TXRDY = (1 << 3); 153 154 while ((*UART_STAT_REG & UART_TXRDY) == 0) 155 continue; 156 *UART_TX_REG = c; 157 } 158 early_putc_t *early_putc = tegra124_early_putc; 159 #endif 160 161 static platform_method_t tegra124_methods[] = { 162 PLATFORMMETHOD(platform_attach, tegra124_attach), 163 PLATFORMMETHOD(platform_lastaddr, tegra124_lastaddr), 164 PLATFORMMETHOD(platform_devmap_init, tegra124_devmap_init), 165 PLATFORMMETHOD(platform_late_init, tegra124_late_init), 166 #ifdef SMP 167 PLATFORMMETHOD(platform_mp_start_ap, tegra124_mp_start_ap), 168 PLATFORMMETHOD(platform_mp_setmaxid, tegra124_mp_setmaxid), 169 #endif 170 PLATFORMMETHOD_END, 171 }; 172 173 FDT_PLATFORM_DEF(tegra124, "Nvidia Jetson-TK1", 0, "nvidia,jetson-tk1", 0); 174