xref: /freebsd/sys/arm/nvidia/drm2/tegra_dc_if.m (revision f81cdf24ba5436367377f7c8e8f51f6df2a75ca7)
1#-
2# Copyright (c) 2015 Michal Meloun
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions
7# are met:
8# 1. Redistributions of source code must retain the above copyright
9#    notice, this list of conditions and the following disclaimer.
10# 2. Redistributions in binary form must reproduce the above copyright
11#    notice, this list of conditions and the following disclaimer in the
12#    documentation and/or other materials provided with the distribution.
13#
14# THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17# ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24# SUCH DAMAGE.
25#
26#
27
28#include <machine/bus.h>
29
30INTERFACE tegra_dc;
31
32
33METHOD void write_4{
34	device_t	dev;
35	bus_size_t	offset;
36	uint32_t	val;
37};
38METHOD uint32_t read_4{
39	device_t	dev;
40	bus_size_t	offset;
41};
42
43METHOD void display_enable{
44	device_t	dev;
45	bool		enable;
46};
47
48METHOD void hdmi_enable{
49	device_t	dev;
50	bool		enable;
51};
52
53METHOD void setup_timing{
54	device_t	dev;
55	int 		h_pulse_start;
56};
57