1*a0a23564SMichal Meloun#- 2*a0a23564SMichal Meloun# Copyright (c) 2015 Michal Meloun 3*a0a23564SMichal Meloun# All rights reserved. 4*a0a23564SMichal Meloun# 5*a0a23564SMichal Meloun# Redistribution and use in source and binary forms, with or without 6*a0a23564SMichal Meloun# modification, are permitted provided that the following conditions 7*a0a23564SMichal Meloun# are met: 8*a0a23564SMichal Meloun# 1. Redistributions of source code must retain the above copyright 9*a0a23564SMichal Meloun# notice, this list of conditions and the following disclaimer. 10*a0a23564SMichal Meloun# 2. Redistributions in binary form must reproduce the above copyright 11*a0a23564SMichal Meloun# notice, this list of conditions and the following disclaimer in the 12*a0a23564SMichal Meloun# documentation and/or other materials provided with the distribution. 13*a0a23564SMichal Meloun# 14*a0a23564SMichal Meloun# THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15*a0a23564SMichal Meloun# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16*a0a23564SMichal Meloun# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17*a0a23564SMichal Meloun# ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18*a0a23564SMichal Meloun# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19*a0a23564SMichal Meloun# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20*a0a23564SMichal Meloun# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21*a0a23564SMichal Meloun# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22*a0a23564SMichal Meloun# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23*a0a23564SMichal Meloun# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24*a0a23564SMichal Meloun# SUCH DAMAGE. 25*a0a23564SMichal Meloun# 26*a0a23564SMichal Meloun# 27*a0a23564SMichal Meloun 28*a0a23564SMichal Meloun#include <machine/bus.h> 29*a0a23564SMichal Meloun 30*a0a23564SMichal MelounINTERFACE tegra_dc; 31*a0a23564SMichal Meloun 32*a0a23564SMichal Meloun 33*a0a23564SMichal MelounMETHOD void write_4{ 34*a0a23564SMichal Meloun device_t dev; 35*a0a23564SMichal Meloun bus_size_t offset; 36*a0a23564SMichal Meloun uint32_t val; 37*a0a23564SMichal Meloun}; 38*a0a23564SMichal MelounMETHOD uint32_t read_4{ 39*a0a23564SMichal Meloun device_t dev; 40*a0a23564SMichal Meloun bus_size_t offset; 41*a0a23564SMichal Meloun}; 42*a0a23564SMichal Meloun 43*a0a23564SMichal MelounMETHOD void display_enable{ 44*a0a23564SMichal Meloun device_t dev; 45*a0a23564SMichal Meloun bool enable; 46*a0a23564SMichal Meloun}; 47*a0a23564SMichal Meloun 48*a0a23564SMichal MelounMETHOD void hdmi_enable{ 49*a0a23564SMichal Meloun device_t dev; 50*a0a23564SMichal Meloun bool enable; 51*a0a23564SMichal Meloun}; 52*a0a23564SMichal Meloun 53*a0a23564SMichal MelounMETHOD void setup_timing{ 54*a0a23564SMichal Meloun device_t dev; 55*a0a23564SMichal Meloun int h_pulse_start; 56*a0a23564SMichal Meloun}; 57