xref: /freebsd/sys/arm/mv/mvvar.h (revision 2e3f49888ec8851bafb22011533217487764fdb0)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
3  *
4  * Copyright (c) 2002, 2003 Wasabi Systems, Inc.
5  * All rights reserved.
6  *
7  * Written by Jason R. Thorpe for Wasabi Systems, Inc.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. All advertising materials mentioning features or use of this software
18  *    must display the following acknowledgement:
19  *	This product includes software developed for the NetBSD Project by
20  *	Wasabi Systems, Inc.
21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22  *    or promote products derived from this software without specific prior
23  *    written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35  * POSSIBILITY OF SUCH DAMAGE.
36  *
37  * from: FreeBSD: //depot/projects/arm/src/sys/arm/xscale/pxa2x0/pxa2x0var.h, rev 1
38  */
39 
40 #ifndef _MVVAR_H_
41 #define _MVVAR_H_
42 
43 #include <sys/rman.h>
44 #include <machine/bus.h>
45 #include <vm/vm.h>
46 #include <vm/pmap.h>
47 
48 #include <dev/ofw/openfirm.h>
49 
50 #define	MV_TYPE_PCI		0
51 #define	MV_TYPE_PCIE		1
52 
53 #define MV_MODE_ENDPOINT	0
54 #define MV_MODE_ROOT		1
55 
56 enum soc_family{
57 	MV_SOC_ARMADA_38X 	= 0x00,
58 	MV_SOC_ARMADA_XP	= 0x01,
59 	MV_SOC_ARMV5		= 0x02,
60 	MV_SOC_UNSUPPORTED	= 0xff,
61 };
62 
63 struct gpio_config {
64 	int		gc_gpio;	/* GPIO number */
65 	uint32_t	gc_flags;	/* GPIO flags */
66 	int		gc_output;	/* GPIO output value */
67 };
68 
69 struct decode_win {
70 	int		target;		/* Mbus unit ID */
71 	int		attr;		/* Attributes of the target interface */
72 	vm_paddr_t	base;		/* Physical base addr */
73 	uint32_t	size;
74 	vm_paddr_t	remap;
75 };
76 
77 extern const struct gpio_config mv_gpio_config[];
78 extern const struct decode_win *cpu_wins;
79 extern const struct decode_win *idma_wins;
80 extern const struct decode_win *xor_wins;
81 extern int idma_wins_no;
82 extern int xor_wins_no;
83 
84 int soc_decode_win(void);
85 void soc_id(uint32_t *dev, uint32_t *rev);
86 void soc_dump_decode_win(void);
87 uint32_t soc_power_ctrl_get(uint32_t mask);
88 void soc_power_ctrl_set(uint32_t mask);
89 
90 int decode_win_cpu_set(int target, int attr, vm_paddr_t base, uint32_t size,
91     vm_paddr_t remap);
92 int decode_win_overlap(int, int, const struct decode_win *);
93 int win_cpu_can_remap(int);
94 void decode_win_pcie_setup(u_long);
95 
96 void ddr_disable(int i);
97 int ddr_is_active(int i);
98 uint32_t ddr_base(int i);
99 uint32_t ddr_size(int i);
100 uint32_t ddr_attr(int i);
101 uint32_t ddr_target(int i);
102 
103 uint32_t cpu_extra_feat(void);
104 uint32_t get_tclk(void);
105 uint32_t get_cpu_freq(void);
106 uint32_t get_l2clk(void);
107 uint32_t read_cpu_ctrl(uint32_t);
108 void write_cpu_ctrl(uint32_t, uint32_t);
109 
110 uint32_t read_cpu_mp_clocks(uint32_t reg);
111 void write_cpu_mp_clocks(uint32_t reg, uint32_t val);
112 uint32_t read_cpu_misc(uint32_t reg);
113 void write_cpu_misc(uint32_t reg, uint32_t val);
114 
115 int mv_pcib_bar_win_set(device_t dev, uint32_t base, uint32_t size,
116     uint32_t remap, int winno, int busno);
117 int mv_pcib_cpu_win_remap(device_t dev, uint32_t remap, uint32_t size);
118 
119 void mv_mask_endpoint_irq(uintptr_t nb, int unit);
120 void mv_unmask_endpoint_irq(uintptr_t nb, int unit);
121 
122 int	mv_drbl_get_next_irq(int dir, int unit);
123 void	mv_drbl_mask_all(int unit);
124 void	mv_drbl_mask_irq(uint32_t irq, int dir, int unit);
125 void	mv_drbl_unmask_irq(uint32_t irq, int dir, int unit);
126 void	mv_drbl_set_mask(uint32_t val, int dir, int unit);
127 uint32_t mv_drbl_get_mask(int dir, int unit);
128 void	mv_drbl_set_cause(uint32_t val, int dir, int unit);
129 uint32_t mv_drbl_get_cause(int dir, int unit);
130 void	mv_drbl_set_msg(uint32_t val, int mnr, int dir, int unit);
131 uint32_t mv_drbl_get_msg(int mnr, int dir, int unit);
132 
133 int	mv_msi_data(int irq, uint64_t *addr, uint32_t *data);
134 
135 struct devmap_entry;
136 
137 int mv_pci_devmap(phandle_t, struct devmap_entry *, vm_offset_t,
138     vm_offset_t);
139 int fdt_localbus_devmap(phandle_t, struct devmap_entry *, int, int *);
140 enum soc_family mv_check_soc_family(void);
141 
142 int mv_fdt_is_type(phandle_t, const char *);
143 int mv_fdt_pm(phandle_t);
144 
145 uint32_t get_tclk_armadaxp(void);
146 uint32_t get_tclk_armada38x(void);
147 uint32_t get_cpu_freq_armadaxp(void);
148 uint32_t get_cpu_freq_armada38x(void);
149 #endif /* _MVVAR_H_ */
150