1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2018 Rubicon Communications, LLC (Netgate) 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 * $FreeBSD$ 28 */ 29 30 #include <sys/cdefs.h> 31 __FBSDID("$FreeBSD$"); 32 33 #include <sys/param.h> 34 #include <sys/systm.h> 35 #include <sys/bus.h> 36 37 #include <sys/kernel.h> 38 #include <sys/module.h> 39 #include <sys/rman.h> 40 #include <sys/lock.h> 41 #include <sys/mutex.h> 42 43 #include <machine/bus.h> 44 #include <machine/resource.h> 45 #include <machine/intr.h> 46 47 #include <dev/fdt/simplebus.h> 48 49 #include <dev/ofw/ofw_bus.h> 50 #include <dev/ofw/ofw_bus_subr.h> 51 52 #include <dev/fdt/fdt_pinctrl.h> 53 54 #include "opt_soc.h" 55 56 #define PINS_PER_REG 8 57 #define BITS_PER_PIN 4 58 #define PINS_MASK 0xf 59 #define MAX_PIN_FUNC 5 60 61 struct mv_pins { 62 const char *name; 63 const char *functions[MAX_PIN_FUNC]; 64 }; 65 66 struct mv_padconf { 67 const struct mv_pins *pins; 68 size_t npins; 69 }; 70 71 #ifdef SOC_MARVELL_8K 72 const static struct mv_pins ap806_pins[] = { 73 {"mpp0", {"gpio", "sdio", NULL, "spi0"}}, 74 {"mpp1", {"gpio", "sdio", NULL, "spi0"}}, 75 {"mpp2", {"gpio", "sdio", NULL, "spi0"}}, 76 {"mpp3", {"gpio", "sdio", NULL, "spi0"}}, 77 {"mpp4", {"gpio", "sdio", NULL, "i2c0"}}, 78 {"mpp5", {"gpio", "sdio", NULL, "i2c0"}}, 79 {"mpp6", {"gpio", "sdio", NULL, NULL}}, 80 {"mpp7", {"gpio", "sdio", NULL, "uart1"}}, 81 {"mpp8", {"gpio", "sdio", NULL, "uart1"}}, 82 {"mpp9", {"gpio", "sdio", NULL, "spi0"}}, 83 {"mpp10", {"gpio", "sdio", NULL, NULL}}, 84 {"mpp11", {"gpio", NULL, NULL, "uart0"}}, 85 {"mpp12", {"gpio", "sdio", "sdio", NULL}}, 86 {"mpp13", {"gpio", NULL, NULL}}, 87 {"mpp14", {"gpio", NULL, NULL}}, 88 {"mpp15", {"gpio", NULL, NULL}}, 89 {"mpp16", {"gpio", NULL, NULL}}, 90 {"mpp17", {"gpio", NULL, NULL}}, 91 {"mpp18", {"gpio", NULL, NULL}}, 92 {"mpp19", {"gpio", NULL, NULL, "uart0", "sdio"}}, 93 }; 94 95 const struct mv_padconf ap806_padconf = { 96 .npins = nitems(ap806_pins), 97 .pins = ap806_pins, 98 }; 99 #endif 100 101 struct mv_pinctrl_softc { 102 device_t dev; 103 struct resource *res; 104 105 struct mv_padconf *padconf; 106 }; 107 108 static struct resource_spec mv_pinctrl_res_spec[] = { 109 { SYS_RES_MEMORY, 0, RF_ACTIVE | RF_SHAREABLE }, 110 { -1, 0 } 111 }; 112 113 static struct ofw_compat_data compat_data[] = { 114 #ifdef SOC_MARVELL_8K 115 {"marvell,ap806-pinctrl", (uintptr_t)&ap806_padconf}, 116 #endif 117 {NULL, 0} 118 }; 119 120 #define RD4(sc, reg) bus_read_4((sc)->res, (reg)) 121 #define WR4(sc, reg, val) bus_write_4((sc)->res, (reg), (val)) 122 123 static void 124 mv_pinctrl_configure_pin(struct mv_pinctrl_softc *sc, uint32_t pin, 125 uint32_t function) 126 { 127 uint32_t offset, shift, reg; 128 129 offset = (pin / PINS_PER_REG) * BITS_PER_PIN; 130 shift = (pin % PINS_PER_REG) * BITS_PER_PIN; 131 reg = RD4(sc, offset); 132 reg &= ~(PINS_MASK << shift); 133 reg |= function << shift; 134 WR4(sc, offset, reg); 135 } 136 137 static int 138 mv_pinctrl_configure_pins(device_t dev, phandle_t cfgxref) 139 { 140 struct mv_pinctrl_softc *sc; 141 phandle_t node; 142 char *function; 143 const char **pins; 144 int i, pin_num, pin_func, npins; 145 146 sc = device_get_softc(dev); 147 node = OF_node_from_xref(cfgxref); 148 149 if (OF_getprop_alloc(node, "marvell,function", 150 (void **)&function) == -1) 151 return (ENOMEM); 152 153 npins = ofw_bus_string_list_to_array(node, "marvell,pins", &pins); 154 if (npins == -1) 155 return (ENOMEM); 156 157 for (i = 0; i < npins; i++) { 158 for (pin_num = 0; pin_num < sc->padconf->npins; pin_num++) { 159 if (strcmp(pins[i], sc->padconf->pins[pin_num].name) == 0) 160 break; 161 } 162 if (pin_num == sc->padconf->npins) 163 continue; 164 165 for (pin_func = 0; pin_func < MAX_PIN_FUNC; pin_func++) 166 if (sc->padconf->pins[pin_num].functions[pin_func] && 167 strcmp(function, sc->padconf->pins[pin_num].functions[pin_func]) == 0) 168 break; 169 170 if (pin_func == MAX_PIN_FUNC) 171 continue; 172 173 mv_pinctrl_configure_pin(sc, pin_num, pin_func); 174 } 175 176 OF_prop_free(pins); 177 178 return (0); 179 } 180 181 static int 182 mv_pinctrl_probe(device_t dev) 183 { 184 185 if (!ofw_bus_status_okay(dev)) 186 return (ENXIO); 187 188 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) 189 return (ENXIO); 190 191 device_set_desc(dev, "Marvell Pinctrl controller"); 192 return (BUS_PROBE_DEFAULT); 193 } 194 195 static int 196 mv_pinctrl_attach(device_t dev) 197 { 198 struct mv_pinctrl_softc *sc; 199 phandle_t node; 200 201 sc = device_get_softc(dev); 202 sc->dev = dev; 203 sc->padconf = (struct mv_padconf *)ofw_bus_search_compatible(dev, compat_data)->ocd_data; 204 205 if (bus_alloc_resources(dev, mv_pinctrl_res_spec, &sc->res) != 0) { 206 device_printf(dev, "cannot allocate resources for device\n"); 207 return (ENXIO); 208 } 209 210 node = ofw_bus_get_node(dev); 211 212 fdt_pinctrl_register(dev, "marvell,pins"); 213 fdt_pinctrl_configure_tree(dev); 214 215 return (0); 216 } 217 218 static int 219 mv_pinctrl_detach(device_t dev) 220 { 221 222 return (EBUSY); 223 } 224 225 static device_method_t mv_pinctrl_methods[] = { 226 /* Device interface */ 227 DEVMETHOD(device_probe, mv_pinctrl_probe), 228 DEVMETHOD(device_attach, mv_pinctrl_attach), 229 DEVMETHOD(device_detach, mv_pinctrl_detach), 230 231 /* fdt_pinctrl interface */ 232 DEVMETHOD(fdt_pinctrl_configure,mv_pinctrl_configure_pins), 233 234 DEVMETHOD_END 235 }; 236 237 static devclass_t mv_pinctrl_devclass; 238 239 static driver_t mv_pinctrl_driver = { 240 "mv_pinctrl", 241 mv_pinctrl_methods, 242 sizeof(struct mv_pinctrl_softc), 243 }; 244 245 EARLY_DRIVER_MODULE(mv_pinctrl, simplebus, mv_pinctrl_driver, 246 mv_pinctrl_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LATE); 247