xref: /freebsd/sys/arm/mv/mv_pci_ctrl.c (revision 5c831a5bd61576cacb48b39f8eeb47b92707a355)
1 /*-
2  * Copyright (c) 2016 Stormshield
3  * Copyright (c) 2016 Semihalf
4  * All rights reserved.
5  *
6  * Developed by Semihalf.
7  *
8  * Portions of this software were developed by Semihalf
9  * under sponsorship from the FreeBSD Foundation.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  * 3. Neither the name of MARVELL nor the names of contributors
20  *    may be used to endorse or promote products derived from this software
21  *    without specific prior written permission.
22  *
23  * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
24  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26  * ARE DISCLAIMED.  IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
27  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
29  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33  * SUCH DAMAGE.
34  */
35 
36 /*
37  * Marvell integrated PCI/PCI-Express Bus Controller Driver.
38  */
39 
40 #include <sys/cdefs.h>
41 __FBSDID("$FreeBSD$");
42 
43 #include <sys/param.h>
44 #include <sys/systm.h>
45 #include <sys/kernel.h>
46 #include <sys/lock.h>
47 #include <sys/malloc.h>
48 #include <sys/module.h>
49 #include <sys/bus.h>
50 #include <sys/rman.h>
51 
52 #include <dev/ofw/ofw_bus.h>
53 #include <dev/ofw/ofw_bus_subr.h>
54 
55 static int mv_pcib_ctrl_probe(device_t);
56 static int mv_pcib_ctrl_attach(device_t);
57 static device_t mv_pcib_ctrl_add_child(device_t, u_int, const char *, int);
58 static const struct ofw_bus_devinfo * mv_pcib_ctrl_get_devinfo(device_t, device_t);
59 static struct resource * mv_pcib_ctrl_alloc_resource(device_t, device_t, int,
60     int *, rman_res_t, rman_res_t, rman_res_t, u_int);
61 void mv_pcib_ctrl_init(device_t, phandle_t);
62 static int mv_pcib_ofw_bus_attach(device_t);
63 
64 struct mv_pcib_ctrl_range {
65 	uint64_t bus;
66 	uint64_t host;
67 	uint64_t size;
68 };
69 
70 struct mv_pcib_ctrl_softc {
71 	pcell_t				addr_cells;
72 	pcell_t				size_cells;
73 	int				nranges;
74 	struct mv_pcib_ctrl_range	*ranges;
75 };
76 
77 struct mv_pcib_ctrl_devinfo {
78 	struct ofw_bus_devinfo	di_dinfo;
79 	struct resource_list	di_rl;
80 };
81 
82 static int mv_pcib_ctrl_fill_ranges(phandle_t, struct mv_pcib_ctrl_softc *);
83 
84 /*
85  * Bus interface definitions
86  */
87 static device_method_t mv_pcib_ctrl_methods[] = {
88 	/* Device interface */
89 	DEVMETHOD(device_probe,			mv_pcib_ctrl_probe),
90 	DEVMETHOD(device_attach,		mv_pcib_ctrl_attach),
91 
92 	/* Bus interface */
93 	DEVMETHOD(bus_add_child,		mv_pcib_ctrl_add_child),
94 	DEVMETHOD(bus_alloc_resource,		mv_pcib_ctrl_alloc_resource),
95 	DEVMETHOD(bus_release_resource,		bus_generic_release_resource),
96 	DEVMETHOD(bus_activate_resource,	bus_generic_activate_resource),
97 	DEVMETHOD(bus_setup_intr,		bus_generic_setup_intr),
98 
99 	/* ofw_bus interface */
100 	DEVMETHOD(ofw_bus_get_devinfo,		mv_pcib_ctrl_get_devinfo),
101 	DEVMETHOD(ofw_bus_get_compat,		ofw_bus_gen_get_compat),
102 	DEVMETHOD(ofw_bus_get_model,		ofw_bus_gen_get_model),
103 	DEVMETHOD(ofw_bus_get_name,		ofw_bus_gen_get_name),
104 	DEVMETHOD(ofw_bus_get_node,		ofw_bus_gen_get_node),
105 	DEVMETHOD(ofw_bus_get_type,		ofw_bus_gen_get_type),
106 
107 	DEVMETHOD_END
108 };
109 
110 static driver_t mv_pcib_ctrl_driver = {
111 	"pcib_ctrl",
112 	mv_pcib_ctrl_methods,
113 	sizeof(struct mv_pcib_ctrl_softc),
114 };
115 
116 devclass_t pcib_ctrl_devclass;
117 
118 DRIVER_MODULE(pcib_ctrl, simplebus, mv_pcib_ctrl_driver, pcib_ctrl_devclass, 0, 0);
119 
120 MALLOC_DEFINE(M_PCIB_CTRL, "PCIe Bus Controller",
121     "Marvell Integrated PCIe Bus Controller");
122 
123 static int
124 mv_pcib_ctrl_probe(device_t dev)
125 {
126 
127 	if (!ofw_bus_is_compatible(dev, "mrvl,pcie-ctrl") &&
128 	    !ofw_bus_is_compatible(dev, "marvell,armada-370-pcie"))
129 		return (ENXIO);
130 
131 	device_set_desc(dev, "Marvell Integrated PCIe Bus Controller");
132 	return (BUS_PROBE_DEFAULT);
133 }
134 
135 static int
136 mv_pcib_ctrl_attach(device_t dev)
137 {
138 	int err;
139 
140 	err = mv_pcib_ofw_bus_attach(dev);
141 	if (err != 0)
142 		return (err);
143 
144 	return (bus_generic_attach(dev));
145 }
146 
147 static int
148 mv_pcib_ofw_bus_attach(device_t dev)
149 {
150 	struct mv_pcib_ctrl_devinfo *di;
151 	struct mv_pcib_ctrl_softc *sc;
152 	device_t child;
153 	phandle_t parent, node;
154 
155 	parent = ofw_bus_get_node(dev);
156 	sc = device_get_softc(dev);
157 	if (parent > 0) {
158 		sc->addr_cells = 1;
159 		if (OF_getencprop(parent, "#address-cells", &(sc->addr_cells),
160 		    sizeof(sc->addr_cells)) <= 0)
161 			return(ENXIO);
162 
163 		sc->size_cells = 1;
164 		if (OF_getencprop(parent, "#size-cells", &(sc->size_cells),
165 		    sizeof(sc->size_cells)) <= 0)
166 			return(ENXIO);
167 
168 		for (node = OF_child(parent); node > 0; node = OF_peer(node)) {
169 			di = malloc(sizeof(*di), M_PCIB_CTRL, M_WAITOK | M_ZERO);
170 			if (ofw_bus_gen_setup_devinfo(&di->di_dinfo, node)) {
171 				if (bootverbose) {
172 					device_printf(dev,
173 					    "Could not set up devinfo for PCI\n");
174 				}
175 				free(di, M_PCIB_CTRL);
176 				continue;
177 			}
178 
179 			child = device_add_child(dev, NULL, -1);
180 			if (child == NULL) {
181 				if (bootverbose) {
182 					device_printf(dev,
183 					    "Could not add child: %s\n",
184 					    di->di_dinfo.obd_name);
185 				}
186 				ofw_bus_gen_destroy_devinfo(&di->di_dinfo);
187 				free(di, M_PCIB_CTRL);
188 				continue;
189 			}
190 
191 			resource_list_init(&di->di_rl);
192 			ofw_bus_reg_to_rl(child, node, sc->addr_cells,
193 			    sc->size_cells, &di->di_rl);
194 
195 			device_set_ivars(child, di);
196 		}
197 	}
198 
199 	if (mv_pcib_ctrl_fill_ranges(parent, sc) < 0) {
200 		device_printf(dev, "could not get ranges\n");
201 		return (ENXIO);
202 	}
203 
204 	return (0);
205 }
206 
207 static device_t
208 mv_pcib_ctrl_add_child(device_t dev, u_int order, const char *name, int unit)
209 {
210 	device_t cdev;
211 	struct mv_pcib_ctrl_devinfo *di;
212 
213 	cdev = device_add_child_ordered(dev, order, name, unit);
214 	if (cdev == NULL)
215 		return (NULL);
216 
217 	di = malloc(sizeof(*di), M_DEVBUF, M_WAITOK | M_ZERO);
218 	di->di_dinfo.obd_node = -1;
219 	resource_list_init(&di->di_rl);
220 	device_set_ivars(cdev, di);
221 
222 	return (cdev);
223 }
224 
225 static struct resource *
226 mv_pcib_ctrl_alloc_resource(device_t bus, device_t child, int type, int *rid,
227     rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
228 {
229 	struct mv_pcib_ctrl_devinfo *di;
230 	struct resource_list_entry *rle;
231 	struct mv_pcib_ctrl_softc *sc;
232 	int i;
233 
234 	if (RMAN_IS_DEFAULT_RANGE(start, end)) {
235 
236 		if ((di = device_get_ivars(child)) == NULL)
237 			return (NULL);
238 		if (type != SYS_RES_MEMORY)
239 			return (NULL);
240 
241 		/* Find defaults for this rid */
242 		rle = resource_list_find(&di->di_rl, type, *rid);
243 
244 		if (rle == NULL)
245 			return (NULL);
246 
247 		start = rle->start;
248 		end = rle->end;
249 		count = rle->count;
250 	}
251 
252 	sc = device_get_softc(bus);
253 	if (type == SYS_RES_MEMORY) {
254 		/* Remap through ranges property */
255 		for (i = 0; i < sc->nranges; i++) {
256 			if (start >= sc->ranges[i].bus && end <
257 			    sc->ranges[i].bus + sc->ranges[i].size) {
258 				start -= sc->ranges[i].bus;
259 				start += sc->ranges[i].host;
260 				end -= sc->ranges[i].bus;
261 				end += sc->ranges[i].host;
262 				break;
263 			}
264 		}
265 
266 		if (i == sc->nranges && sc->nranges != 0) {
267 			device_printf(bus, "Could not map resource "
268 			    "%#llx-%#llx\n", start, end);
269 			return (NULL);
270 		}
271 	}
272 
273 	return (bus_generic_alloc_resource(bus, child, type, rid, start, end,
274 	    count, flags));
275 }
276 
277 static int
278 mv_pcib_ctrl_fill_ranges(phandle_t node, struct mv_pcib_ctrl_softc *sc)
279 {
280 	int host_address_cells;
281 	cell_t *base_ranges;
282 	ssize_t nbase_ranges;
283 	int err;
284 	int i, j, k;
285 
286 	err = OF_searchencprop(OF_parent(node), "#address-cells",
287 	    &host_address_cells, sizeof(host_address_cells));
288 	if (err <= 0)
289 		return (-1);
290 
291 	nbase_ranges = OF_getproplen(node, "ranges");
292 	if (nbase_ranges < 0)
293 		return (-1);
294 	sc->nranges = nbase_ranges / sizeof(cell_t) /
295 	    (sc->addr_cells + host_address_cells + sc->size_cells);
296 	if (sc->nranges == 0)
297 		return (0);
298 
299 	sc->ranges = malloc(sc->nranges * sizeof(sc->ranges[0]),
300 	    M_DEVBUF, M_WAITOK);
301 	base_ranges = malloc(nbase_ranges, M_DEVBUF, M_WAITOK);
302 	OF_getencprop(node, "ranges", base_ranges, nbase_ranges);
303 
304 	for (i = 0, j = 0; i < sc->nranges; i++) {
305 		sc->ranges[i].bus = 0;
306 		for (k = 0; k < sc->addr_cells; k++) {
307 			sc->ranges[i].bus <<= 32;
308 			sc->ranges[i].bus |= base_ranges[j++];
309 		}
310 		sc->ranges[i].host = 0;
311 		for (k = 0; k < host_address_cells; k++) {
312 			sc->ranges[i].host <<= 32;
313 			sc->ranges[i].host |= base_ranges[j++];
314 		}
315 		sc->ranges[i].size = 0;
316 		for (k = 0; k < sc->size_cells; k++) {
317 			sc->ranges[i].size <<= 32;
318 			sc->ranges[i].size |= base_ranges[j++];
319 		}
320 	}
321 
322 	free(base_ranges, M_DEVBUF);
323 	return (sc->nranges);
324 }
325 
326 static const struct ofw_bus_devinfo *
327 mv_pcib_ctrl_get_devinfo(device_t bus __unused, device_t child)
328 {
329 	struct mv_pcib_ctrl_devinfo *di;
330 
331 	di = device_get_ivars(child);
332 	return (&di->di_dinfo);
333 }
334