1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2018 Rubicon Communications, LLC (Netgate) 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 * $FreeBSD$ 28 */ 29 30 #include <sys/cdefs.h> 31 __FBSDID("$FreeBSD$"); 32 33 #include <sys/param.h> 34 #include <sys/systm.h> 35 #include <sys/bus.h> 36 37 #include <sys/kernel.h> 38 #include <sys/module.h> 39 #include <sys/rman.h> 40 #include <sys/lock.h> 41 #include <sys/mutex.h> 42 43 #include <machine/bus.h> 44 #include <machine/resource.h> 45 #include <machine/intr.h> 46 47 #include <dev/fdt/simplebus.h> 48 49 #include <dev/ofw/ofw_bus.h> 50 #include <dev/ofw/ofw_bus_subr.h> 51 52 #include "pic_if.h" 53 54 #define MV_AP806_GICP_MAX_NIRQS 207 55 56 struct mv_ap806_gicp_softc { 57 device_t dev; 58 device_t parent; 59 struct resource *res; 60 61 ssize_t spi_ranges_cnt; 62 uint32_t *spi_ranges; 63 struct intr_map_data_fdt *parent_map_data; 64 }; 65 66 static struct ofw_compat_data compat_data[] = { 67 {"marvell,ap806-gicp", 1}, 68 {NULL, 0} 69 }; 70 71 #define RD4(sc, reg) bus_read_4((sc)->res, (reg)) 72 #define WR4(sc, reg, val) bus_write_4((sc)->res, (reg), (val)) 73 74 static int 75 mv_ap806_gicp_probe(device_t dev) 76 { 77 78 if (!ofw_bus_status_okay(dev)) 79 return (ENXIO); 80 81 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) 82 return (ENXIO); 83 84 device_set_desc(dev, "Marvell GICP"); 85 return (BUS_PROBE_DEFAULT); 86 } 87 88 static int 89 mv_ap806_gicp_attach(device_t dev) 90 { 91 struct mv_ap806_gicp_softc *sc; 92 phandle_t node, xref, intr_parent; 93 94 sc = device_get_softc(dev); 95 sc->dev = dev; 96 node = ofw_bus_get_node(dev); 97 98 /* Look for our parent */ 99 if ((intr_parent = ofw_bus_find_iparent(node)) == 0) { 100 device_printf(dev, 101 "Cannot find our parent interrupt controller\n"); 102 return (ENXIO); 103 } 104 if ((sc->parent = OF_device_from_xref(intr_parent)) == NULL) { 105 device_printf(dev, 106 "cannot find parent interrupt controller device\n"); 107 return (ENXIO); 108 } 109 110 sc->spi_ranges_cnt = OF_getencprop_alloc(node, "marvell,spi-ranges", 111 (void **)&sc->spi_ranges); 112 113 xref = OF_xref_from_node(node); 114 if (intr_pic_register(dev, xref) == NULL) { 115 device_printf(dev, "Cannot register GICP\n"); 116 return (ENXIO); 117 } 118 /* Allocate GIC compatible mapping entry (3 cells) */ 119 sc->parent_map_data = (struct intr_map_data_fdt *)intr_alloc_map_data( 120 INTR_MAP_DATA_FDT, sizeof(struct intr_map_data_fdt) + 121 + 3 * sizeof(phandle_t), M_WAITOK | M_ZERO); 122 OF_device_register_xref(xref, dev); 123 124 return (0); 125 } 126 127 static int 128 mv_ap806_gicp_detach(device_t dev) 129 { 130 131 return (EBUSY); 132 } 133 134 static struct intr_map_data * 135 mv_ap806_gicp_convert_map_data(struct mv_ap806_gicp_softc *sc, 136 struct intr_map_data *data) 137 { 138 struct intr_map_data_fdt *daf; 139 uint32_t i, irq_num, irq_type; 140 141 daf = (struct intr_map_data_fdt *)data; 142 if (daf->ncells != 2) 143 return (NULL); 144 145 irq_num = daf->cells[0]; 146 irq_type = daf->cells[1]; 147 if (irq_num >= MV_AP806_GICP_MAX_NIRQS) 148 return (NULL); 149 150 /* Construct GIC compatible mapping. */ 151 sc->parent_map_data->ncells = 3; 152 sc->parent_map_data->cells[0] = 0; /* SPI */ 153 sc->parent_map_data->cells[2] = irq_type; 154 155 /* Map the interrupt number to SPI number */ 156 for (i = 0; i < sc->spi_ranges_cnt / 2; i += 2) { 157 if (irq_num < sc->spi_ranges[i + 1]) { 158 irq_num += sc->spi_ranges[i]; 159 break; 160 } 161 162 irq_num -= sc->spi_ranges[i]; 163 } 164 165 sc->parent_map_data->cells[1] = irq_num - 32; 166 167 return ((struct intr_map_data *)sc->parent_map_data); 168 } 169 170 171 172 173 static int 174 mv_ap806_gicp_activate_intr(device_t dev, struct intr_irqsrc *isrc, 175 struct resource *res, struct intr_map_data *data) 176 { 177 struct mv_ap806_gicp_softc *sc; 178 179 sc = device_get_softc(dev); 180 data = mv_ap806_gicp_convert_map_data(sc, data); 181 if (data == NULL) 182 return (EINVAL); 183 184 return (PIC_ACTIVATE_INTR(sc->parent, isrc, res, data)); 185 } 186 187 static void 188 mv_ap806_gicp_enable_intr(device_t dev, struct intr_irqsrc *isrc) 189 { 190 struct mv_ap806_gicp_softc *sc; 191 192 sc = device_get_softc(dev); 193 194 PIC_ENABLE_INTR(sc->parent, isrc); 195 } 196 197 static void 198 mv_ap806_gicp_disable_intr(device_t dev, struct intr_irqsrc *isrc) 199 { 200 struct mv_ap806_gicp_softc *sc; 201 202 sc = device_get_softc(dev); 203 204 PIC_DISABLE_INTR(sc->parent, isrc); 205 } 206 207 static int 208 mv_ap806_gicp_map_intr(device_t dev, struct intr_map_data *data, 209 struct intr_irqsrc **isrcp) 210 { 211 struct mv_ap806_gicp_softc *sc; 212 int ret; 213 214 sc = device_get_softc(dev); 215 216 if (data->type != INTR_MAP_DATA_FDT) 217 return (ENOTSUP); 218 219 data = mv_ap806_gicp_convert_map_data(sc, data); 220 if (data == NULL) 221 return (EINVAL); 222 223 ret = PIC_MAP_INTR(sc->parent, data, isrcp); 224 (*isrcp)->isrc_dev = sc->dev; 225 return(ret); 226 } 227 228 static int 229 mv_ap806_gicp_deactivate_intr(device_t dev, struct intr_irqsrc *isrc, 230 struct resource *res, struct intr_map_data *data) 231 { 232 struct mv_ap806_gicp_softc *sc; 233 234 sc = device_get_softc(dev); 235 236 data = mv_ap806_gicp_convert_map_data(sc, data); 237 if (data == NULL) 238 return (EINVAL); 239 240 return (PIC_DEACTIVATE_INTR(sc->parent, isrc, res, data)); 241 } 242 243 static int 244 mv_ap806_gicp_setup_intr(device_t dev, struct intr_irqsrc *isrc, 245 struct resource *res, struct intr_map_data *data) 246 { 247 struct mv_ap806_gicp_softc *sc; 248 249 sc = device_get_softc(dev); 250 data = mv_ap806_gicp_convert_map_data(sc, data); 251 if (data == NULL) 252 return (EINVAL); 253 254 return (PIC_SETUP_INTR(sc->parent, isrc, res, data)); 255 } 256 257 static int 258 mv_ap806_gicp_teardown_intr(device_t dev, struct intr_irqsrc *isrc, 259 struct resource *res, struct intr_map_data *data) 260 { 261 struct mv_ap806_gicp_softc *sc; 262 263 sc = device_get_softc(dev); 264 data = mv_ap806_gicp_convert_map_data(sc, data); 265 if (data == NULL) 266 return (EINVAL); 267 268 return (PIC_TEARDOWN_INTR(sc->parent, isrc, res, data)); 269 } 270 271 static void 272 mv_ap806_gicp_pre_ithread(device_t dev, struct intr_irqsrc *isrc) 273 { 274 struct mv_ap806_gicp_softc *sc; 275 276 sc = device_get_softc(dev); 277 278 PIC_PRE_ITHREAD(sc->parent, isrc); 279 } 280 281 static void 282 mv_ap806_gicp_post_ithread(device_t dev, struct intr_irqsrc *isrc) 283 { 284 struct mv_ap806_gicp_softc *sc; 285 286 sc = device_get_softc(dev); 287 288 PIC_POST_ITHREAD(sc->parent, isrc); 289 } 290 291 static void 292 mv_ap806_gicp_post_filter(device_t dev, struct intr_irqsrc *isrc) 293 { 294 struct mv_ap806_gicp_softc *sc; 295 296 sc = device_get_softc(dev); 297 298 PIC_POST_FILTER(sc->parent, isrc); 299 } 300 301 static device_method_t mv_ap806_gicp_methods[] = { 302 /* Device interface */ 303 DEVMETHOD(device_probe, mv_ap806_gicp_probe), 304 DEVMETHOD(device_attach, mv_ap806_gicp_attach), 305 DEVMETHOD(device_detach, mv_ap806_gicp_detach), 306 307 /* Interrupt controller interface */ 308 DEVMETHOD(pic_activate_intr, mv_ap806_gicp_activate_intr), 309 DEVMETHOD(pic_disable_intr, mv_ap806_gicp_disable_intr), 310 DEVMETHOD(pic_enable_intr, mv_ap806_gicp_enable_intr), 311 DEVMETHOD(pic_map_intr, mv_ap806_gicp_map_intr), 312 DEVMETHOD(pic_deactivate_intr, mv_ap806_gicp_deactivate_intr), 313 DEVMETHOD(pic_setup_intr, mv_ap806_gicp_setup_intr), 314 DEVMETHOD(pic_teardown_intr, mv_ap806_gicp_teardown_intr), 315 DEVMETHOD(pic_post_filter, mv_ap806_gicp_post_filter), 316 DEVMETHOD(pic_post_ithread, mv_ap806_gicp_post_ithread), 317 DEVMETHOD(pic_pre_ithread, mv_ap806_gicp_pre_ithread), 318 319 DEVMETHOD_END 320 }; 321 322 static devclass_t mv_ap806_gicp_devclass; 323 324 static driver_t mv_ap806_gicp_driver = { 325 "mv_ap806_gicp", 326 mv_ap806_gicp_methods, 327 sizeof(struct mv_ap806_gicp_softc), 328 }; 329 330 EARLY_DRIVER_MODULE(mv_ap806_gicp, simplebus, mv_ap806_gicp_driver, 331 mv_ap806_gicp_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE); 332