1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2018 Rubicon Communications, LLC (Netgate) 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 * $FreeBSD$ 28 */ 29 30 #include <sys/cdefs.h> 31 __FBSDID("$FreeBSD$"); 32 33 #include <sys/param.h> 34 #include <sys/systm.h> 35 #include <sys/bus.h> 36 37 #include <sys/kernel.h> 38 #include <sys/module.h> 39 #include <sys/rman.h> 40 #include <sys/lock.h> 41 #include <sys/mutex.h> 42 43 #include <machine/bus.h> 44 #include <machine/resource.h> 45 #include <machine/intr.h> 46 47 #include <dev/fdt/simplebus.h> 48 49 #include <dev/ofw/ofw_bus.h> 50 #include <dev/ofw/ofw_bus_subr.h> 51 52 #include "pic_if.h" 53 54 #define MV_AP806_GICP_MAX_NIRQS 207 55 56 struct mv_ap806_gicp_softc { 57 device_t dev; 58 device_t parent; 59 struct resource *res; 60 61 ssize_t spi_ranges_cnt; 62 uint32_t *spi_ranges; 63 }; 64 65 static struct ofw_compat_data compat_data[] = { 66 {"marvell,ap806-gicp", 1}, 67 {NULL, 0} 68 }; 69 70 #define RD4(sc, reg) bus_read_4((sc)->res, (reg)) 71 #define WR4(sc, reg, val) bus_write_4((sc)->res, (reg), (val)) 72 73 static int 74 mv_ap806_gicp_probe(device_t dev) 75 { 76 77 if (!ofw_bus_status_okay(dev)) 78 return (ENXIO); 79 80 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) 81 return (ENXIO); 82 83 device_set_desc(dev, "Marvell GICP"); 84 return (BUS_PROBE_DEFAULT); 85 } 86 87 static int 88 mv_ap806_gicp_attach(device_t dev) 89 { 90 struct mv_ap806_gicp_softc *sc; 91 phandle_t node, xref, intr_parent; 92 93 sc = device_get_softc(dev); 94 sc->dev = dev; 95 node = ofw_bus_get_node(dev); 96 97 /* Look for our parent */ 98 if ((intr_parent = ofw_bus_find_iparent(node)) == 0) { 99 device_printf(dev, "Cannot find our parent interrupt controller\n"); 100 return (ENXIO); 101 } 102 if ((sc->parent = OF_device_from_xref(intr_parent)) == NULL) { 103 device_printf(dev, "cannot find parent interrupt controller device\n"); 104 return (ENXIO); 105 } 106 107 sc->spi_ranges_cnt = OF_getencprop_alloc(node, "marvell,spi-ranges", 108 (void **)&sc->spi_ranges); 109 110 xref = OF_xref_from_node(node); 111 if (intr_pic_register(dev, xref) == NULL) { 112 device_printf(dev, "Cannot register GICP\n"); 113 return (ENXIO); 114 } 115 116 OF_device_register_xref(xref, dev); 117 118 return (0); 119 } 120 121 static int 122 mv_ap806_gicp_detach(device_t dev) 123 { 124 125 return (EBUSY); 126 } 127 128 static int 129 mv_ap806_gicp_activate_intr(device_t dev, struct intr_irqsrc *isrc, 130 struct resource *res, struct intr_map_data *data) 131 { 132 struct mv_ap806_gicp_softc *sc; 133 134 sc = device_get_softc(dev); 135 136 return (PIC_ACTIVATE_INTR(sc->parent, isrc, res, data)); 137 } 138 139 static void 140 mv_ap806_gicp_enable_intr(device_t dev, struct intr_irqsrc *isrc) 141 { 142 struct mv_ap806_gicp_softc *sc; 143 144 sc = device_get_softc(dev); 145 146 PIC_ENABLE_INTR(sc->parent, isrc); 147 } 148 149 static void 150 mv_ap806_gicp_disable_intr(device_t dev, struct intr_irqsrc *isrc) 151 { 152 struct mv_ap806_gicp_softc *sc; 153 154 sc = device_get_softc(dev); 155 156 PIC_DISABLE_INTR(sc->parent, isrc); 157 } 158 159 static int 160 mv_ap806_gicp_map_intr(device_t dev, struct intr_map_data *data, 161 struct intr_irqsrc **isrcp) 162 { 163 struct mv_ap806_gicp_softc *sc; 164 struct intr_map_data_fdt *daf; 165 uint32_t group, irq_num, irq_type; 166 int i; 167 168 sc = device_get_softc(dev); 169 170 if (data->type != INTR_MAP_DATA_FDT) 171 return (ENOTSUP); 172 173 daf = (struct intr_map_data_fdt *)data; 174 if (daf->ncells != 3 || daf->cells[0] >= MV_AP806_GICP_MAX_NIRQS) 175 return (EINVAL); 176 177 group = daf->cells[0]; 178 irq_num = daf->cells[1]; 179 irq_type = daf->cells[2]; 180 181 /* Map the interrupt number to spi number */ 182 for (i = 0; i < sc->spi_ranges_cnt / 2; i += 2) { 183 if (irq_num < sc->spi_ranges[i + 1]) { 184 irq_num += sc->spi_ranges[i]; 185 break; 186 } 187 188 irq_num -= sc->spi_ranges[i]; 189 } 190 191 daf->cells[1] = irq_num - 32; 192 193 return (PIC_MAP_INTR(sc->parent, data, isrcp)); 194 } 195 196 static int 197 mv_ap806_gicp_deactivate_intr(device_t dev, struct intr_irqsrc *isrc, 198 struct resource *res, struct intr_map_data *data) 199 { 200 struct mv_ap806_gicp_softc *sc; 201 202 sc = device_get_softc(dev); 203 204 return (PIC_DEACTIVATE_INTR(sc->parent, isrc, res, data)); 205 } 206 207 static int 208 mv_ap806_gicp_setup_intr(device_t dev, struct intr_irqsrc *isrc, 209 struct resource *res, struct intr_map_data *data) 210 { 211 struct mv_ap806_gicp_softc *sc; 212 213 sc = device_get_softc(dev); 214 215 return (PIC_SETUP_INTR(sc->parent, isrc, res, data)); 216 } 217 218 static int 219 mv_ap806_gicp_teardown_intr(device_t dev, struct intr_irqsrc *isrc, 220 struct resource *res, struct intr_map_data *data) 221 { 222 struct mv_ap806_gicp_softc *sc; 223 224 sc = device_get_softc(dev); 225 226 return (PIC_TEARDOWN_INTR(sc->parent, isrc, res, data)); 227 } 228 229 static void 230 mv_ap806_gicp_pre_ithread(device_t dev, struct intr_irqsrc *isrc) 231 { 232 struct mv_ap806_gicp_softc *sc; 233 234 sc = device_get_softc(dev); 235 236 PIC_PRE_ITHREAD(sc->parent, isrc); 237 } 238 239 static void 240 mv_ap806_gicp_post_ithread(device_t dev, struct intr_irqsrc *isrc) 241 { 242 struct mv_ap806_gicp_softc *sc; 243 244 sc = device_get_softc(dev); 245 246 PIC_POST_ITHREAD(sc->parent, isrc); 247 } 248 249 static void 250 mv_ap806_gicp_post_filter(device_t dev, struct intr_irqsrc *isrc) 251 { 252 struct mv_ap806_gicp_softc *sc; 253 254 sc = device_get_softc(dev); 255 256 PIC_POST_FILTER(sc->parent, isrc); 257 } 258 259 static device_method_t mv_ap806_gicp_methods[] = { 260 /* Device interface */ 261 DEVMETHOD(device_probe, mv_ap806_gicp_probe), 262 DEVMETHOD(device_attach, mv_ap806_gicp_attach), 263 DEVMETHOD(device_detach, mv_ap806_gicp_detach), 264 265 /* Interrupt controller interface */ 266 DEVMETHOD(pic_activate_intr, mv_ap806_gicp_activate_intr), 267 DEVMETHOD(pic_disable_intr, mv_ap806_gicp_disable_intr), 268 DEVMETHOD(pic_enable_intr, mv_ap806_gicp_enable_intr), 269 DEVMETHOD(pic_map_intr, mv_ap806_gicp_map_intr), 270 DEVMETHOD(pic_deactivate_intr, mv_ap806_gicp_deactivate_intr), 271 DEVMETHOD(pic_setup_intr, mv_ap806_gicp_setup_intr), 272 DEVMETHOD(pic_teardown_intr, mv_ap806_gicp_teardown_intr), 273 DEVMETHOD(pic_post_filter, mv_ap806_gicp_post_filter), 274 DEVMETHOD(pic_post_ithread, mv_ap806_gicp_post_ithread), 275 DEVMETHOD(pic_pre_ithread, mv_ap806_gicp_pre_ithread), 276 277 DEVMETHOD_END 278 }; 279 280 static devclass_t mv_ap806_gicp_devclass; 281 282 static driver_t mv_ap806_gicp_driver = { 283 "mv_ap806_gicp", 284 mv_ap806_gicp_methods, 285 sizeof(struct mv_ap806_gicp_softc), 286 }; 287 288 EARLY_DRIVER_MODULE(mv_ap806_gicp, simplebus, mv_ap806_gicp_driver, 289 mv_ap806_gicp_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE); 290