xref: /freebsd/sys/arm/mv/clk/periph_clk_mux_gate.c (revision 13ec1e3155c7e9bf037b12af186351b7fa9b9450)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3  *
4  * Copyright (c) 2021 Semihalf.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  */
27 
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
30 
31 #include <sys/param.h>
32 #include <sys/bus.h>
33 #include <sys/kernel.h>
34 #include <sys/module.h>
35 #include <sys/mutex.h>
36 #include <sys/rman.h>
37 #include <machine/bus.h>
38 
39 #include <dev/fdt/simplebus.h>
40 
41 #include <dev/extres/clk/clk.h>
42 #include <dev/extres/clk/clk_div.h>
43 #include <dev/extres/clk/clk_fixed.h>
44 #include <dev/extres/clk/clk_gate.h>
45 #include <dev/extres/clk/clk_mux.h>
46 
47 #include <dev/ofw/ofw_bus.h>
48 #include <dev/ofw/ofw_bus_subr.h>
49 
50 #include "clkdev_if.h"
51 #include "periph.h"
52 
53 #define PARENT_CNT		2
54 #define TBG_A_S_OFW_INDEX	0
55 
56 /*
57  * Register chain: fixed (freq/2) -> mux (choose fixed or parent frequency) ->
58  * gate (enable or disable clock).
59  */
60 
61 int
62 a37x0_periph_register_mux_gate(struct clkdom *clkdom,
63     struct a37x0_periph_clknode_def *device_def)
64 {
65 	const char *parent_names[PARENT_CNT];
66 	struct clk_fixed_def fixed;
67 	struct clk_gate_def *gate;
68 	struct clk_mux_def *mux;
69 	const char *dev_name;
70 	int error, dev_id;
71 
72 	dev_name = device_def->common_def.device_name;
73 	dev_id = device_def->common_def.device_id;
74 	mux = &device_def->clk_def.mux_gate.mux;
75 	gate = &device_def->clk_def.mux_gate.gate;
76 	fixed = device_def->clk_def.fixed.fixed;
77 
78 	fixed.clkdef.id = A37x0_INTERNAL_CLK_ID(dev_id, FIXED1_POS);
79 	fixed.clkdef.parent_names = &device_def->common_def.pname;
80 	fixed.clkdef.parent_cnt = 1;
81 	fixed.clkdef.flags = 0x0;
82 	fixed.mult = 1;
83 	fixed.div = 2;
84 	fixed.freq = 0;
85 
86 	error = clknode_fixed_register(clkdom, &fixed);
87 	if (error)
88 		goto fail;
89 
90 	parent_names[0] = device_def->common_def.pname;
91 	parent_names[1] = fixed.clkdef.name;
92 
93 	a37x0_periph_set_props(&mux->clkdef, parent_names, PARENT_CNT);
94 	error = a37x0_periph_create_mux(clkdom, mux,
95 	    A37x0_INTERNAL_CLK_ID(dev_id, MUX_POS));
96 	if (error)
97 		goto fail;
98 
99 	a37x0_periph_set_props(&gate->clkdef, &mux->clkdef.name, 1);
100 	error = a37x0_periph_create_gate(clkdom, gate,
101 	    dev_id);
102 	if (error)
103 		goto fail;
104 
105 fail:
106 
107 	return (error);
108 }
109 
110 /*
111  * Register chain: fixed1 (freq/2) -> mux (fixed1 or TBG-A-S frequency) ->
112  * gate -> fixed2 (freq/2).
113  */
114 
115 int
116 a37x0_periph_register_mux_gate_fixed(struct clkdom * clkdom,
117     struct a37x0_periph_clknode_def *device_def)
118 {
119 	struct clk_fixed_def *fixed1, *fixed2;
120 	const char *parent_names[PARENT_CNT];
121 	struct clk_gate_def *gate;
122 	struct clk_mux_def *mux;
123 	const char *dev_name;
124 	int error, dev_id;
125 
126 	dev_name = device_def->common_def.device_name;
127 	dev_id = device_def->common_def.device_id;
128 	mux = &device_def->clk_def.mux_gate_fixed.mux;
129 	gate = &device_def->clk_def.mux_gate_fixed.gate;
130 	fixed1 = &device_def->clk_def.mux_gate_fixed.fixed1;
131 	fixed2 = &device_def->clk_def.mux_gate_fixed.fixed2;
132 
133 	fixed1->clkdef.parent_names = &device_def->common_def.pname;
134 	fixed1->clkdef.id = A37x0_INTERNAL_CLK_ID(dev_id, FIXED1_POS);
135 	fixed1->clkdef.flags = 0x0;
136 	fixed1->mult = 1;
137 	fixed1->div = 2;
138 	fixed1->freq = 0;
139 
140 	error = clknode_fixed_register(clkdom, fixed1);
141 	if (error)
142 		goto fail;
143 
144 	parent_names[0] = device_def->common_def.tbgs[TBG_A_S_OFW_INDEX];
145 	parent_names[1] = fixed1->clkdef.name;
146 
147 	a37x0_periph_set_props(&mux->clkdef, parent_names, PARENT_CNT);
148 	error = a37x0_periph_create_mux(clkdom, mux,
149 	    A37x0_INTERNAL_CLK_ID(dev_id, MUX_POS));
150 	if (error)
151 		goto fail;
152 
153 	a37x0_periph_set_props(&gate->clkdef, &mux->clkdef.name, 1);
154 	error = a37x0_periph_create_gate(clkdom, gate,
155 	    A37x0_INTERNAL_CLK_ID(dev_id, GATE_POS));
156 	if (error)
157 		goto fail;
158 
159 	fixed2->clkdef.parent_names = &gate->clkdef.name;
160 	fixed2->clkdef.parent_cnt = 1;
161 	fixed2->clkdef.id = dev_id;
162 
163 	error = clknode_fixed_register(clkdom, fixed2);
164 	if (error)
165 		goto fail;
166 
167 fail:
168 
169 	return (error);
170 }
171