1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2021 Semihalf. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/param.h> 29 #include <sys/bus.h> 30 #include <sys/kernel.h> 31 #include <sys/module.h> 32 #include <sys/mutex.h> 33 #include <sys/rman.h> 34 #include <machine/bus.h> 35 36 #include <dev/fdt/simplebus.h> 37 38 #include <dev/clk/clk.h> 39 #include <dev/clk/clk_div.h> 40 #include <dev/clk/clk_fixed.h> 41 #include <dev/clk/clk_gate.h> 42 #include <dev/clk/clk_mux.h> 43 44 #include <dev/ofw/ofw_bus.h> 45 #include <dev/ofw/ofw_bus_subr.h> 46 47 #include "clkdev_if.h" 48 #include "periph.h" 49 50 /* 51 * Regsiter gate clock (disable or enable clock). 52 */ 53 54 int 55 a37x0_periph_gate_register_gate(struct clkdom *clkdom, 56 struct a37x0_periph_clknode_def *device_def) 57 { 58 struct clk_gate_def *gate; 59 const char *parent_name; 60 int error, dev_id; 61 62 dev_id = device_def->common_def.device_id; 63 gate = &device_def->clk_def.gate.gate; 64 65 if (device_def->common_def.pname == NULL) 66 parent_name = device_def->common_def.xtal; 67 else 68 parent_name = device_def->common_def.pname; 69 70 a37x0_periph_set_props(&gate->clkdef, &parent_name, 1); 71 error = a37x0_periph_create_gate(clkdom, gate, 72 dev_id); 73 if (error) goto fail; 74 75 fail: 76 return (error); 77 78 return (0); 79 } 80