1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2022 Semihalf. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27 #include <sys/param.h> 28 #include <sys/systm.h> 29 #include <sys/bus.h> 30 31 #include <machine/bus.h> 32 33 #include <dev/clk/clk.h> 34 35 #include <arm/mv/clk/armada38x_gen.h> 36 37 #include "clkdev_if.h" 38 39 #define SAR_A38X_TCLK_FREQ_SHIFT 15 40 #define SAR_A38X_TCLK_FREQ_MASK 0x00008000 41 42 #define TCLK_250MHZ 250 * 1000 * 1000 43 #define TCLK_200MHZ 200 * 1000 * 1000 44 45 #define WR4(_clk, offset, val) \ 46 CLKDEV_WRITE_4(clknode_get_device(_clk), offset, val) 47 #define RD4(_clk, offset, val) \ 48 CLKDEV_READ_4(clknode_get_device(_clk), offset, val) 49 #define DEVICE_LOCK(_clk) \ 50 CLKDEV_DEVICE_LOCK(clknode_get_device(_clk)) 51 #define DEVICE_UNLOCK(_clk) \ 52 CLKDEV_DEVICE_UNLOCK(clknode_get_device(_clk)) 53 54 static int 55 armada38x_gen_recalc(struct clknode *clk, uint64_t *freq) 56 { 57 uint32_t reg; 58 59 DEVICE_LOCK(clk); 60 RD4(clk, 0, ®); 61 DEVICE_UNLOCK(clk); 62 63 reg = (reg & SAR_A38X_TCLK_FREQ_MASK) >> SAR_A38X_TCLK_FREQ_SHIFT; 64 *freq = reg ? TCLK_200MHZ : TCLK_250MHZ; 65 66 return (0); 67 } 68 69 static int 70 armada38x_gen_init(struct clknode *clk, device_t dev) 71 { 72 return (0); 73 } 74 75 static clknode_method_t armada38x_gen_clknode_methods[] = { 76 /* Device interface */ 77 CLKNODEMETHOD(clknode_init, armada38x_gen_init), 78 CLKNODEMETHOD(clknode_recalc_freq, armada38x_gen_recalc), 79 CLKNODEMETHOD_END 80 }; 81 82 DEFINE_CLASS_1(armada38x_gen_clknode, armada38x_gen_clknode_class, 83 armada38x_gen_clknode_methods, 0, clknode_class); 84 85 int 86 armada38x_gen_register(struct clkdom *clkdom, const struct armada38x_gen_clknode_def *clkdef) 87 { 88 struct clknode *clk; 89 90 clk = clknode_create(clkdom, &armada38x_gen_clknode_class, &clkdef->def); 91 if (clk == NULL) 92 return (1); 93 94 clknode_register(clkdom, clk); 95 96 return(0); 97 } 98