xref: /freebsd/sys/arm/mv/clk/armada38x_gen.c (revision 07c5be33f145906c8d80a86cbfa94e5847c513f9)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3  *
4  * Copyright (c) 2022 Semihalf.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25  */
26 
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
29 
30 #include <sys/param.h>
31 #include <sys/systm.h>
32 #include <sys/bus.h>
33 
34 #include <machine/bus.h>
35 
36 #include <dev/extres/clk/clk.h>
37 
38 #include <arm/mv/clk/armada38x_gen.h>
39 
40 #include "clkdev_if.h"
41 
42 #define SAR_A38X_TCLK_FREQ_SHIFT	15
43 #define SAR_A38X_TCLK_FREQ_MASK		0x00008000
44 
45 #define TCLK_250MHZ					250 * 1000 * 1000
46 #define TCLK_200MHZ					200 * 1000 * 1000
47 
48 #define	WR4(_clk, offset, val)					\
49 	CLKDEV_WRITE_4(clknode_get_device(_clk), offset, val)
50 #define	RD4(_clk, offset, val)					\
51 	CLKDEV_READ_4(clknode_get_device(_clk), offset, val)
52 #define	DEVICE_LOCK(_clk)					\
53 	CLKDEV_DEVICE_LOCK(clknode_get_device(_clk))
54 #define	DEVICE_UNLOCK(_clk)					\
55 	CLKDEV_DEVICE_UNLOCK(clknode_get_device(_clk))
56 
57 static int
58 armada38x_gen_recalc(struct clknode *clk, uint64_t *freq)
59 {
60 	uint32_t reg;
61 
62 	DEVICE_LOCK(clk);
63 	RD4(clk, 0, &reg);
64 	DEVICE_UNLOCK(clk);
65 
66 	reg = (reg & SAR_A38X_TCLK_FREQ_MASK) >> SAR_A38X_TCLK_FREQ_SHIFT;
67 	*freq = reg ? TCLK_200MHZ : TCLK_250MHZ;
68 
69 	return (0);
70 }
71 
72 static int
73 armada38x_gen_init(struct clknode *clk, device_t dev)
74 {
75 	return (0);
76 }
77 
78 static clknode_method_t armada38x_gen_clknode_methods[] = {
79 	/* Device interface */
80 	CLKNODEMETHOD(clknode_init,		armada38x_gen_init),
81 	CLKNODEMETHOD(clknode_recalc_freq,	armada38x_gen_recalc),
82 	CLKNODEMETHOD_END
83 };
84 
85 DEFINE_CLASS_1(armada38x_gen_clknode, armada38x_gen_clknode_class,
86     armada38x_gen_clknode_methods, 0, clknode_class);
87 
88 int
89 armada38x_gen_register(struct clkdom *clkdom, const struct armada38x_gen_clknode_def *clkdef)
90 {
91 	struct clknode *clk;
92 
93 	clk = clknode_create(clkdom, &armada38x_gen_clknode_class, &clkdef->def);
94 	if (clk == NULL)
95 		return (1);
96 
97 	clknode_register(clkdom, clk);
98 
99 	return(0);
100 }
101