xref: /freebsd/sys/arm/mv/clk/a37x0_tbg.c (revision e1c4c8dd8d2d10b6104f06856a77bd5b4813a801)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
3  *
4  * Copyright (c) 2021 Semihalf.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  */
27 
28 #include <sys/param.h>
29 #include <sys/bus.h>
30 #include <sys/kernel.h>
31 #include <sys/module.h>
32 #include <sys/rman.h>
33 #include <machine/bus.h>
34 
35 #include <dev/clk/clk.h>
36 #include <dev/ofw/ofw_bus_subr.h>
37 
38 #include "clkdev_if.h"
39 
40 #include "a37x0_tbg_pll.h"
41 
42 #define NUM_TBG			4
43 
44 #define TBG_CTRL0		0x4
45 #define TBG_CTRL1		0x8
46 #define TBG_CTRL7		0x20
47 #define TBG_CTRL8		0x30
48 
49 #define TBG_MASK		0x1FF
50 
51 #define TBG_A_REFDIV		0
52 #define TBG_B_REFDIV		16
53 
54 #define TBG_A_FBDIV		2
55 #define TBG_B_FBDIV		18
56 
57 #define TBG_A_VCODIV_SEL	0
58 #define TBG_B_VCODIV_SEL	16
59 
60 #define TBG_A_VCODIV_DIFF	1
61 #define TBG_B_VCODIV_DIFF	17
62 
63 struct a37x0_tbg_softc {
64 	device_t 		dev;
65 	struct clkdom		*clkdom;
66 	struct resource		*res;
67 };
68 
69 static struct resource_spec a37x0_tbg_clk_spec[] = {
70 	{ SYS_RES_MEMORY,	0,	RF_ACTIVE },
71 	{ -1, 0 }
72 };
73 
74 struct a37x0_tbg_def {
75 	char 			*name;
76 	uint32_t		refdiv_shift;
77 	uint32_t		fbdiv_shift;
78 	uint32_t		vcodiv_offset;
79 	uint32_t		vcodiv_shift;
80 	uint32_t		tbg_bypass_en;
81 };
82 
83 static const struct a37x0_tbg_def tbg[NUM_TBG] = {
84 	{"TBG-A-P", TBG_A_REFDIV, TBG_A_FBDIV, TBG_CTRL8, TBG_A_VCODIV_DIFF, 9},
85 	{"TBG-B-P", TBG_B_REFDIV, TBG_B_FBDIV, TBG_CTRL8,
86 	    TBG_B_VCODIV_DIFF, 25},
87 	{"TBG-A-S", TBG_A_REFDIV, TBG_A_FBDIV, TBG_CTRL1, TBG_A_VCODIV_SEL, 9},
88 	{"TBG-B-S", TBG_B_REFDIV, TBG_B_FBDIV, TBG_CTRL1, TBG_B_VCODIV_SEL, 25}
89 };
90 
91 static int a37x0_tbg_read_4(device_t, bus_addr_t, uint32_t *);
92 static int a37x0_tbg_attach(device_t);
93 static int a37x0_tbg_detach(device_t);
94 static int a37x0_tbg_probe(device_t);
95 
96 static device_method_t a37x0_tbg_methods [] = {
97 	DEVMETHOD(device_attach,	a37x0_tbg_attach),
98 	DEVMETHOD(device_detach,	a37x0_tbg_detach),
99 	DEVMETHOD(device_probe,		a37x0_tbg_probe),
100 
101 	DEVMETHOD(clkdev_read_4,	a37x0_tbg_read_4),
102 
103 	DEVMETHOD_END
104 };
105 
106 static driver_t a37x0_tbg_driver = {
107 	"a37x0_tbg",
108 	a37x0_tbg_methods,
109 	sizeof(struct a37x0_tbg_softc)
110 };
111 
112 EARLY_DRIVER_MODULE(a37x0_tbg, simplebus, a37x0_tbg_driver, 0, 0,
113     BUS_PASS_TIMER + BUS_PASS_ORDER_MIDDLE);
114 
115 static int
116 a37x0_tbg_read_4(device_t dev, bus_addr_t offset, uint32_t *val)
117 {
118 	struct a37x0_tbg_softc *sc;
119 
120 	sc = device_get_softc(dev);
121 
122 	*val = bus_read_4(sc->res, offset);
123 
124 	return (0);
125 }
126 
127 static int
128 a37x0_tbg_attach(device_t dev)
129 {
130 	struct a37x0_tbg_pll_clk_def def;
131 	struct a37x0_tbg_softc *sc;
132 	const char *clkname;
133 	int error, i;
134 	phandle_t node;
135 	clk_t clock;
136 
137 	sc = device_get_softc(dev);
138 	node = ofw_bus_get_node(dev);
139 	sc->dev = dev;
140 
141 	if (bus_alloc_resources(dev, a37x0_tbg_clk_spec, &sc->res) != 0) {
142 		device_printf(dev, "Cannot allocate resources\n");
143 		return (ENXIO);
144 	}
145 
146 	sc->clkdom = clkdom_create(dev);
147 	if (sc->clkdom == NULL) {
148 		device_printf(dev, "Cannot create clock domain.\n");
149 		return (ENXIO);
150 	}
151 
152 	error = clk_get_by_ofw_index(dev, node, 0, &clock);
153 	if (error != 0) {
154 		device_printf(dev, "Cannot find clock parent\n");
155 		bus_release_resources(dev, a37x0_tbg_clk_spec, &sc->res);
156 		return (error);
157 	}
158 
159 	clkname = clk_get_name(clock);
160 
161 	for (i = 0; i < NUM_TBG; i++) {
162 		def.clkdef.parent_names = &clkname;
163 		def.clkdef.parent_cnt = 1;
164 		def.clkdef.id = i;
165 		def.clkdef.name = tbg[i].name;
166 
167 		def.vcodiv.offset = tbg[i].vcodiv_offset;
168 		def.vcodiv.shift = tbg[i].vcodiv_shift;
169 		def.refdiv.offset = TBG_CTRL7;
170 		def.refdiv.shift = tbg[i].refdiv_shift;
171 		def.fbdiv.offset = TBG_CTRL0;
172 		def.fbdiv.shift = tbg[i].fbdiv_shift;
173 		def.vcodiv.mask = def.refdiv.mask = def.fbdiv.mask = TBG_MASK;
174 		def.tbg_bypass.offset = TBG_CTRL1;
175 		def.tbg_bypass.shift = tbg[i].tbg_bypass_en;
176 		def.tbg_bypass.mask = 0x1;
177 
178 		error = a37x0_tbg_pll_clk_register(sc->clkdom, &def);
179 
180 		if (error) {
181 			device_printf(dev, "Cannot register clock node\n");
182 			bus_release_resources(dev, a37x0_tbg_clk_spec,
183 			    &sc->res);
184 			return (ENXIO);
185 		}
186 	}
187 
188 	error = clkdom_finit(sc->clkdom);
189 	if (error) {
190 		device_printf(dev,
191 		    "Cannot finalize clock domain intialization\n");
192 		bus_release_resources(dev, a37x0_tbg_clk_spec, &sc->res);
193 		return (ENXIO);
194 	}
195 
196 	if (bootverbose)
197 		clkdom_dump(sc->clkdom);
198 
199 	return (0);
200 }
201 
202 static int
203 a37x0_tbg_probe(device_t dev)
204 {
205 
206 	if (!ofw_bus_status_okay(dev))
207 		return (ENXIO);
208 
209 	if (!ofw_bus_is_compatible(dev, "marvell,armada-3700-tbg-clock"))
210 		return (ENXIO);
211 
212 	device_set_desc(dev, "Marvell Armada 3700 time base generators");
213 	return (BUS_PROBE_DEFAULT);
214 }
215 
216 static int
217 a37x0_tbg_detach(device_t dev)
218 {
219 
220 	return (EBUSY);
221 }
222