xref: /freebsd/sys/arm/mv/armadaxp/mptramp.S (revision 685dc743dc3b5645e34836464128e1c0558b404b)
1f296249fSIan Lepore/*-
2f296249fSIan Lepore * Copyright 2011 Semihalf
3f296249fSIan Lepore * All rights reserved.
4f296249fSIan Lepore *
5f296249fSIan Lepore * Redistribution and use in source and binary forms, with or without
6f296249fSIan Lepore * modification, are permitted provided that the following conditions
7f296249fSIan Lepore * are met:
8f296249fSIan Lepore * 1. Redistributions of source code must retain the above copyright
9f296249fSIan Lepore *    notice, this list of conditions and the following disclaimer.
10f296249fSIan Lepore * 2. Redistributions in binary form must reproduce the above copyright
11f296249fSIan Lepore *    notice, this list of conditions and the following disclaimer in the
12f296249fSIan Lepore *    documentation and/or other materials provided with the distribution.
13f296249fSIan Lepore *
14f296249fSIan Lepore * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15f296249fSIan Lepore * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16f296249fSIan Lepore * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17f296249fSIan Lepore * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18f296249fSIan Lepore * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19f296249fSIan Lepore * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20f296249fSIan Lepore * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21f296249fSIan Lepore * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22f296249fSIan Lepore * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23f296249fSIan Lepore * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24f296249fSIan Lepore * SUCH DAMAGE.
25f296249fSIan Lepore */
26f296249fSIan Lepore
27f296249fSIan Lepore#include <machine/asm.h>
28f296249fSIan Lepore#include <machine/armreg.h>
29*47fdf913SZbigniew Bodek.global _C_LABEL(mptramp_pmu_boot)
30*47fdf913SZbigniew Bodek
31f296249fSIan LeporeASENTRY_NP(mptramp)
32f296249fSIan Lepore	mov	r0, #0
33f296249fSIan Lepore	mcr	p15, 0, r0, c7, c7, 0
34f296249fSIan Lepore
35f296249fSIan Lepore	mrs	r3, cpsr
36f296249fSIan Lepore	bic	r3, r3, #(PSR_MODE)
37f296249fSIan Lepore	orr	r3, r3, #(PSR_SVC32_MODE)
38f296249fSIan Lepore        msr	cpsr_fsxc, r3
39f296249fSIan Lepore
40f296249fSIan Lepore	mrc	p15, 0, r0, c0, c0, 5
41f296249fSIan Lepore	and	r0, #0x0f		/* Get CPU ID */
42f296249fSIan Lepore
43f296249fSIan Lepore	/* Read boot address for CPU */
44f296249fSIan Lepore	mov	r1, #0x100
45f296249fSIan Lepore	mul	r2, r0, r1
46*47fdf913SZbigniew Bodek	ldr	r1, mptramp_pmu_boot
47f296249fSIan Lepore	add	r0, r2, r1
48f296249fSIan Lepore	ldr	r1, [r0], #0x00
49f296249fSIan Lepore
50f296249fSIan Lepore	mov pc, r1
51f296249fSIan Lepore
52*47fdf913SZbigniew Bodek_C_LABEL(mptramp_pmu_boot):
53*47fdf913SZbigniew Bodek	.word 0x0
54*47fdf913SZbigniew Bodek
55f296249fSIan LeporeEND(mptramp)
56f296249fSIan Lepore
57d0307444SZbigniew Bodek	.global _C_LABEL(mptramp_end)
58d0307444SZbigniew Bodek_C_LABEL(mptramp_end):
59