xref: /freebsd/sys/arm/include/cpu.h (revision eeaf6acbfd3593cf4d6ed571be1a8f7dea68907f)
16fc729afSOlivier Houchard /* $NetBSD: cpu.h,v 1.2 2001/02/23 21:23:52 reinoud Exp $ */
26fc729afSOlivier Houchard /* $FreeBSD$ */
36fc729afSOlivier Houchard 
46fc729afSOlivier Houchard #ifndef MACHINE_CPU_H
56fc729afSOlivier Houchard #define MACHINE_CPU_H
66fc729afSOlivier Houchard 
78a474d01SIan Lepore #include <machine/acle-compat.h>
86fc729afSOlivier Houchard #include <machine/armreg.h>
964894120SIan Lepore #include <machine/frame.h>
106fc729afSOlivier Houchard 
116fc729afSOlivier Houchard void	cpu_halt(void);
126fc729afSOlivier Houchard void	swi_vm(void *);
136fc729afSOlivier Houchard 
14a29cc9a3SAndriy Gapon #ifdef _KERNEL
159326d90fSIan Lepore #if __ARM_ARCH >= 6
169326d90fSIan Lepore #include <machine/cpu-v6.h>
17*eeaf6acbSBjoern A. Zeeb #ifdef DEV_PMU
18*eeaf6acbSBjoern A. Zeeb #include <sys/pcpu.h>
19*eeaf6acbSBjoern A. Zeeb #define	PMU_OVSR_C		0x80000000	/* Cycle Counter */
20*eeaf6acbSBjoern A. Zeeb extern uint32_t	ccnt_hi[MAXCPU];
21*eeaf6acbSBjoern A. Zeeb extern int pmu_attched;
22*eeaf6acbSBjoern A. Zeeb #endif /* DEV_PMU */
23*eeaf6acbSBjoern A. Zeeb #endif /* __ARM_ARCH >= 6 */
24*eeaf6acbSBjoern A. Zeeb 
256fc729afSOlivier Houchard static __inline uint64_t
266fc729afSOlivier Houchard get_cyclecount(void)
276fc729afSOlivier Houchard {
288a474d01SIan Lepore #if __ARM_ARCH >= 6
29*eeaf6acbSBjoern A. Zeeb #if (__ARM_ARCH > 6) && defined(DEV_PMU)
30*eeaf6acbSBjoern A. Zeeb 	if (pmu_attched) {
31*eeaf6acbSBjoern A. Zeeb 		u_int cpu;
32*eeaf6acbSBjoern A. Zeeb 		uint64_t h, h2;
33*eeaf6acbSBjoern A. Zeeb 		uint32_t l, r;
34*eeaf6acbSBjoern A. Zeeb 
35*eeaf6acbSBjoern A. Zeeb 		cpu = PCPU_GET(cpuid);
36*eeaf6acbSBjoern A. Zeeb 		h = (uint64_t)atomic_load_acq_32(&ccnt_hi[cpu]);
37*eeaf6acbSBjoern A. Zeeb 		l = cp15_pmccntr_get();
38*eeaf6acbSBjoern A. Zeeb 		/* In case interrupts are disabled we need to check for overflow. */
39*eeaf6acbSBjoern A. Zeeb 		r = cp15_pmovsr_get();
40*eeaf6acbSBjoern A. Zeeb 		if (r & PMU_OVSR_C) {
41*eeaf6acbSBjoern A. Zeeb 			atomic_add_32(&ccnt_hi[cpu], 1);
42*eeaf6acbSBjoern A. Zeeb 			/* Clear the event. */
43*eeaf6acbSBjoern A. Zeeb 			cp15_pmovsr_set(PMU_OVSR_C);
44*eeaf6acbSBjoern A. Zeeb 		}
45*eeaf6acbSBjoern A. Zeeb 		/* Make sure there was no wrap-around while we read the lo half. */
46*eeaf6acbSBjoern A. Zeeb 		h2 = (uint64_t)atomic_load_acq_32(&ccnt_hi[cpu]);
47*eeaf6acbSBjoern A. Zeeb 		if (h != h2)
48*eeaf6acbSBjoern A. Zeeb 			l = cp15_pmccntr_get();
49*eeaf6acbSBjoern A. Zeeb 		return (h2 << 32 | l);
50*eeaf6acbSBjoern A. Zeeb 	} else
51*eeaf6acbSBjoern A. Zeeb #endif
528a474d01SIan Lepore 		return cp15_pmccntr_get();
537ff2eaaaSMark Murray #else /* No performance counters, so use binuptime(9). This is slooooow */
543ce6572fSOlivier Houchard 	struct bintime bt;
553ce6572fSOlivier Houchard 
563ce6572fSOlivier Houchard 	binuptime(&bt);
57eb14346aSJung-uk Kim 	return ((uint64_t)bt.sec << 56 | bt.frac >> 8);
587ff2eaaaSMark Murray #endif
596fc729afSOlivier Houchard }
60a29cc9a3SAndriy Gapon #endif
616fc729afSOlivier Houchard 
626fc729afSOlivier Houchard #define TRAPF_USERMODE(frame)	((frame->tf_spsr & PSR_MODE) == PSR_USR32_MODE)
636fc729afSOlivier Houchard 
646fc729afSOlivier Houchard #define TRAPF_PC(tfp)		((tfp)->tf_pc)
656fc729afSOlivier Houchard 
666fc729afSOlivier Houchard #define cpu_getstack(td)	((td)->td_frame->tf_usr_sp)
676fc729afSOlivier Houchard #define cpu_setstack(td, sp)	((td)->td_frame->tf_usr_sp = (sp))
689f1b87f1SMaxime Henrion #define cpu_spinwait()		/* nothing */
696fc729afSOlivier Houchard 
706fc729afSOlivier Houchard #define ARM_NVEC		8
716fc729afSOlivier Houchard #define ARM_VEC_ALL		0xffffffff
726fc729afSOlivier Houchard 
736fc729afSOlivier Houchard extern vm_offset_t vector_page;
746fc729afSOlivier Houchard 
75b2478843SAndrew Turner /*
76b2478843SAndrew Turner  * Params passed into initarm. If you change the size of this you will
77b2478843SAndrew Turner  * need to update locore.S to allocate more memory on the stack before
78b2478843SAndrew Turner  * it calls initarm.
79b2478843SAndrew Turner  */
8046231809SWarner Losh struct arm_boot_params {
8146231809SWarner Losh 	register_t	abp_size;	/* Size of this structure */
8246231809SWarner Losh 	register_t	abp_r0;		/* r0 from the boot loader */
8346231809SWarner Losh 	register_t	abp_r1;		/* r1 from the boot loader */
8446231809SWarner Losh 	register_t	abp_r2;		/* r2 from the boot loader */
8546231809SWarner Losh 	register_t	abp_r3;		/* r3 from the boot loader */
86313857e9SAndrew Turner 	vm_offset_t	abp_physaddr;	/* The kernel physical address */
87b2478843SAndrew Turner 	vm_offset_t	abp_pagetable;	/* The early page table */
8846231809SWarner Losh };
8946231809SWarner Losh 
906fc729afSOlivier Houchard void	arm_vector_init(vm_offset_t, int);
913d7d8f61SNate Lawson void	fork_trampoline(void);
926fc729afSOlivier Houchard void	identify_arm_cpu(void);
9346231809SWarner Losh void	*initarm(struct arm_boot_params *);
946fc729afSOlivier Houchard 
956fc729afSOlivier Houchard extern char btext[];
966fc729afSOlivier Houchard extern char etext[];
976fc729afSOlivier Houchard int badaddr_read(void *, size_t, void *);
986fc729afSOlivier Houchard #endif /* !MACHINE_CPU_H */
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