1 /* $NetBSD: frame.h,v 1.6 2003/10/05 19:44:58 matt Exp $ */ 2 3 /*- 4 * Copyright (c) 1994-1997 Mark Brinicombe. 5 * Copyright (c) 1994 Brini. 6 * All rights reserved. 7 * 8 * This code is derived from software written for Brini by Mark Brinicombe 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by Brini. 21 * 4. The name of the company nor the name of the author may be used to 22 * endorse or promote products derived from this software without specific 23 * prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED 26 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 27 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 28 * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 29 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 30 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * $FreeBSD$ 38 */ 39 40 #ifndef _MACHINE_ASMACROS_H_ 41 #define _MACHINE_ASMACROS_H_ 42 43 #ifdef _KERNEL 44 45 #ifdef LOCORE 46 47 /* 48 * ASM macros for pushing and pulling trapframes from the stack 49 * 50 * These macros are used to handle the irqframe and trapframe structures 51 * defined above. 52 */ 53 54 /* 55 * PUSHFRAME - macro to push a trap frame on the stack in the current mode 56 * Since the current mode is used, the SVC lr field is not defined. 57 * 58 * NOTE: r13 and r14 are stored separately as a work around for the 59 * SA110 rev 2 STM^ bug 60 */ 61 62 #define PUSHFRAME \ 63 str lr, [sp, #-4]!; /* Push the return address */ \ 64 sub sp, sp, #(4*17); /* Adjust the stack pointer */ \ 65 stmia sp, {r0-r12}; /* Push the user mode registers */ \ 66 add r0, sp, #(4*13); /* Adjust the stack pointer */ \ 67 stmia r0, {r13-r14}^; /* Push the user mode registers */ \ 68 mov r0, r0; /* NOP for previous instruction */ \ 69 mrs r0, spsr_all; /* Put the SPSR on the stack */ \ 70 str r0, [sp, #-4]!; \ 71 mov r0, #0xe0000004; \ 72 mov r1, #0; \ 73 str r1, [r0]; \ 74 mov r0, #0xe0000008; \ 75 mov r1, #0xffffffff; \ 76 str r1, [r0]; 77 78 /* 79 * PULLFRAME - macro to pull a trap frame from the stack in the current mode 80 * Since the current mode is used, the SVC lr field is ignored. 81 */ 82 83 #define PULLFRAME \ 84 ldr r0, [sp], #0x0004; /* Get the SPSR from stack */ \ 85 msr spsr_all, r0; \ 86 ldmia sp, {r0-r14}^; /* Restore registers (usr mode) */ \ 87 mov r0, r0; /* NOP for previous instruction */ \ 88 add sp, sp, #(4*17); /* Adjust the stack pointer */ \ 89 ldr lr, [sp], #0x0004; /* Pull the return address */ 90 91 /* 92 * PUSHFRAMEINSVC - macro to push a trap frame on the stack in SVC32 mode 93 * This should only be used if the processor is not currently in SVC32 94 * mode. The processor mode is switched to SVC mode and the trap frame is 95 * stored. The SVC lr field is used to store the previous value of 96 * lr in SVC mode. 97 * 98 * NOTE: r13 and r14 are stored separately as a work around for the 99 * SA110 rev 2 STM^ bug 100 */ 101 102 #define PUSHFRAMEINSVC \ 103 stmdb sp, {r0-r3}; /* Save 4 registers */ \ 104 mov r0, lr; /* Save xxx32 r14 */ \ 105 mov r1, sp; /* Save xxx32 sp */ \ 106 mrs r3, spsr; /* Save xxx32 spsr */ \ 107 mrs r2, cpsr; /* Get the CPSR */ \ 108 bic r2, r2, #(PSR_MODE); /* Fix for SVC mode */ \ 109 orr r2, r2, #(PSR_SVC32_MODE); \ 110 msr cpsr_c, r2; /* Punch into SVC mode */ \ 111 mov r2, sp; /* Save SVC sp */ \ 112 str r0, [sp, #-4]!; /* Push return address */ \ 113 str lr, [sp, #-4]!; /* Push SVC lr */ \ 114 str r2, [sp, #-4]!; /* Push SVC sp */ \ 115 msr spsr_all, r3; /* Restore correct spsr */ \ 116 ldmdb r1, {r0-r3}; /* Restore 4 regs from xxx mode */ \ 117 sub sp, sp, #(4*15); /* Adjust the stack pointer */ \ 118 stmia sp, {r0-r12}; /* Push the user mode registers */ \ 119 add r0, sp, #(4*13); /* Adjust the stack pointer */ \ 120 stmia r0, {r13-r14}^; /* Push the user mode registers */ \ 121 mov r0, r0; /* NOP for previous instruction */ \ 122 ldr r5, =0xe0000004; /* Check if there's any RAS */ \ 123 ldr r3, [r5]; \ 124 cmp r3, #0; /* Is the update needed ? */ \ 125 ldrgt lr, [r0, #16]; \ 126 ldrgt r1, =0xe0000008; \ 127 ldrgt r4, [r1]; /* Get the end of the RAS */ \ 128 movgt r2, #0; /* Reset the magic addresses */ \ 129 strgt r2, [r5]; \ 130 movgt r2, #0xffffffff; \ 131 strgt r2, [r1]; \ 132 cmpgt lr, r3; /* Were we in the RAS ? */ \ 133 cmpgt r4, lr; \ 134 strgt r3, [r0, #16]; /* Yes, update the pc */ \ 135 mrs r0, spsr_all; /* Put the SPSR on the stack */ \ 136 str r0, [sp, #-4]! 137 138 /* 139 * PULLFRAMEFROMSVCANDEXIT - macro to pull a trap frame from the stack 140 * in SVC32 mode and restore the saved processor mode and PC. 141 * This should be used when the SVC lr register needs to be restored on 142 * exit. 143 */ 144 145 #define PULLFRAMEFROMSVCANDEXIT \ 146 ldr r0, [sp], #0x0004; /* Get the SPSR from stack */ \ 147 msr spsr_all, r0; /* restore SPSR */ \ 148 ldmia sp, {r0-r14}^; /* Restore registers (usr mode) */ \ 149 mov r0, r0; /* NOP for previous instruction */ \ 150 add sp, sp, #(4*15); /* Adjust the stack pointer */ \ 151 ldmia sp, {sp, lr, pc}^ /* Restore lr and exit */ 152 153 #define DATA(name) \ 154 .data ; \ 155 _ALIGN_DATA ; \ 156 .globl name ; \ 157 .type name, %object ; \ 158 name: 159 160 #define EMPTY 161 162 163 #define DO_AST \ 164 ldr r0, [sp] /* Get the SPSR from stack */ ;\ 165 mrs r4, cpsr /* save CPSR */ ;\ 166 orr r1, r4, #(I32_bit|F32_bit) ;\ 167 msr cpsr_c, r1 /* Disable interrupts */ ;\ 168 and r0, r0, #(PSR_MODE) /* Returning to USR mode? */ ;\ 169 teq r0, #(PSR_USR32_MODE) ;\ 170 bne 2f /* Nope, get out now */ ;\ 171 bic r4, r4, #(I32_bit|F32_bit) ;\ 172 1: ldr r5, .Lcurthread ;\ 173 ldr r5, [r5] ;\ 174 ldr r1, [r5, #(TD_FLAGS)] ;\ 175 and r1, r1, #(TDF_ASTPENDING|TDF_NEEDRESCHED) ;\ 176 teq r1, #0x00000000 ;\ 177 beq 2f /* Nope. Just bail */ ;\ 178 msr cpsr_c, r4 /* Restore interrupts */ ;\ 179 mov r0, sp ;\ 180 bl _C_LABEL(ast) /* ast(frame) */ ;\ 181 orr r0, r4, #(I32_bit|F32_bit) ;\ 182 msr cpsr_c, r0 ;\ 183 b 1b ;\ 184 2: 185 186 187 #define AST_LOCALS ;\ 188 .Lcurthread: ;\ 189 .word _C_LABEL(__pcpu) + PC_CURTHREAD 190 191 #endif /* LOCORE */ 192 193 #endif /* _KERNEL */ 194 195 #endif /* !_MACHINE_ASMACROS_H_ */ 196