xref: /freebsd/sys/arm/freescale/vybrid/vf_port.c (revision 792bbaba989533a1fc93823df1720c8c4aaf0442)
1 /*-
2  * Copyright (c) 2014 Ruslan Bukin <br@bsdpad.com>
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  *
14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24  * SUCH DAMAGE.
25  */
26 
27 /*
28  * Vybrid Family Port control and interrupts (PORT)
29  * Chapter 6, Vybrid Reference Manual, Rev. 5, 07/2013
30  */
31 
32 #include <sys/cdefs.h>
33 __FBSDID("$FreeBSD$");
34 
35 #include <sys/param.h>
36 #include <sys/systm.h>
37 #include <sys/bus.h>
38 #include <sys/kernel.h>
39 #include <sys/module.h>
40 #include <sys/malloc.h>
41 #include <sys/rman.h>
42 #include <sys/timeet.h>
43 #include <sys/timetc.h>
44 #include <sys/watchdog.h>
45 
46 #include <dev/ofw/openfirm.h>
47 #include <dev/ofw/ofw_bus.h>
48 #include <dev/ofw/ofw_bus_subr.h>
49 
50 #include <machine/bus.h>
51 #include <machine/cpu.h>
52 #include <machine/intr.h>
53 
54 #include <arm/freescale/vybrid/vf_port.h>
55 #include <arm/freescale/vybrid/vf_common.h>
56 
57 /* Pin Control Register */
58 #define PORT_PCR(n)		(0x1000 * (n >> 5) + 0x4 * (n % 32))
59 #define	 PCR_IRQC_S	16
60 #define	 PCR_IRQC_M	0xF
61 #define	 PCR_DMA_RE	0x1
62 #define	 PCR_DMA_FE	0x2
63 #define	 PCR_DMA_EE	0x3
64 #define	 PCR_INT_LZ	0x8
65 #define	 PCR_INT_RE	0x9
66 #define	 PCR_INT_FE	0xA
67 #define	 PCR_INT_EE	0xB
68 #define	 PCR_INT_LO	0xC
69 #define	 PCR_ISF	(1 << 24)
70 #define	PORT0_ISFR	0xA0	/* Interrupt Status Flag Register */
71 #define	PORT0_DFER	0xC0	/* Digital Filter Enable Register */
72 #define	PORT0_DFCR	0xC4	/* Digital Filter Clock Register */
73 #define	PORT0_DFWR	0xC8	/* Digital Filter Width Register */
74 
75 struct port_event {
76 	uint32_t	enabled;
77 	uint32_t	mux_num;
78 	uint32_t	mux_src;
79 	uint32_t	mux_chn;
80 	void		(*ih) (void *);
81 	void		*ih_user;
82 	enum ev_type	pevt;
83 };
84 
85 static struct port_event event_map[NGPIO];
86 
87 struct port_softc {
88 	struct resource		*res[6];
89 	bus_space_tag_t		bst;
90 	bus_space_handle_t	bsh;
91 	void			*gpio_ih[NGPIO];
92 };
93 
94 struct port_softc *port_sc;
95 
96 static struct resource_spec port_spec[] = {
97 	{ SYS_RES_MEMORY,	0,	RF_ACTIVE },
98 	{ SYS_RES_IRQ,		0,	RF_ACTIVE },
99 	{ SYS_RES_IRQ,		1,	RF_ACTIVE },
100 	{ SYS_RES_IRQ,		2,	RF_ACTIVE },
101 	{ SYS_RES_IRQ,		3,	RF_ACTIVE },
102 	{ SYS_RES_IRQ,		4,	RF_ACTIVE },
103 	{ -1, 0 }
104 };
105 
106 static int
107 port_intr(void *arg)
108 {
109 	struct port_event *pev;
110 	struct port_softc *sc;
111 	int reg;
112 	int i;
113 
114 	sc = arg;
115 
116 	for (i = 0; i < NGPIO; i++) {
117 		reg = READ4(sc, PORT_PCR(i));
118 		if (reg & PCR_ISF) {
119 
120 			/* Clear interrupt */
121 			WRITE4(sc, PORT_PCR(i), reg);
122 
123 			/* Handle event */
124 			pev = &event_map[i];
125 			if (pev->enabled == 1) {
126 				if (pev->ih != NULL) {
127 					pev->ih(pev->ih_user);
128 				}
129 			}
130 		}
131 	}
132 
133 	return (FILTER_HANDLED);
134 }
135 
136 int
137 port_setup(int pnum, enum ev_type pevt, void (*ih)(void *), void *ih_user)
138 {
139 	struct port_event *pev;
140 	struct port_softc *sc;
141 	int reg;
142 	int val;
143 
144 	sc = port_sc;
145 
146 	switch (pevt) {
147 	case DMA_RISING_EDGE:
148 		val = PCR_DMA_RE;
149 		break;
150 	case DMA_FALLING_EDGE:
151 		val = PCR_DMA_FE;
152 		break;
153 	case DMA_EITHER_EDGE:
154 		val = PCR_DMA_EE;
155 		break;
156 	case INT_LOGIC_ZERO:
157 		val = PCR_INT_LZ;
158 		break;
159 	case INT_RISING_EDGE:
160 		val = PCR_INT_RE;
161 		break;
162 	case INT_FALLING_EDGE:
163 		val = PCR_INT_FE;
164 		break;
165 	case INT_EITHER_EDGE:
166 		val = PCR_INT_EE;
167 		break;
168 	case INT_LOGIC_ONE:
169 		val = PCR_INT_LO;
170 		break;
171 	default:
172 		return (-1);
173 	}
174 
175 	reg = READ4(sc, PORT_PCR(pnum));
176 	reg &= ~(PCR_IRQC_M << PCR_IRQC_S);
177 	reg |= (val << PCR_IRQC_S);
178 	WRITE4(sc, PORT_PCR(pnum), reg);
179 
180 	pev = &event_map[pnum];
181 	pev->ih = ih;
182 	pev->ih_user = ih_user;
183 	pev->pevt = pevt;
184 	pev->enabled = 1;
185 
186 	return (0);
187 }
188 
189 static int
190 port_probe(device_t dev)
191 {
192 
193 	if (!ofw_bus_status_okay(dev))
194 		return (ENXIO);
195 
196 	if (!ofw_bus_is_compatible(dev, "fsl,mvf600-port"))
197 		return (ENXIO);
198 
199 	device_set_desc(dev, "Vybrid Family Port control and interrupts");
200 	return (BUS_PROBE_DEFAULT);
201 }
202 
203 static int
204 port_attach(device_t dev)
205 {
206 	struct port_softc *sc;
207 	int irq;
208 
209 	sc = device_get_softc(dev);
210 
211 	if (bus_alloc_resources(dev, port_spec, sc->res)) {
212 		device_printf(dev, "could not allocate resources\n");
213 		return (ENXIO);
214 	}
215 
216 	/* Memory interface */
217 	sc->bst = rman_get_bustag(sc->res[0]);
218 	sc->bsh = rman_get_bushandle(sc->res[0]);
219 
220 	port_sc = sc;
221 
222 	for (irq = 0; irq < NPORTS; irq ++) {
223 		if ((bus_setup_intr(dev, sc->res[1 + irq], INTR_TYPE_MISC,
224 		    port_intr, NULL, sc, &sc->gpio_ih[irq]))) {
225 			device_printf(dev,
226 			    "ERROR: Unable to register interrupt handler\n");
227 			return (ENXIO);
228 		}
229 	}
230 
231 	return (0);
232 }
233 
234 static device_method_t port_methods[] = {
235 	DEVMETHOD(device_probe,		port_probe),
236 	DEVMETHOD(device_attach,	port_attach),
237 	{ 0, 0 }
238 };
239 
240 static driver_t port_driver = {
241 	"port",
242 	port_methods,
243 	sizeof(struct port_softc),
244 };
245 
246 static devclass_t port_devclass;
247 
248 DRIVER_MODULE(port, simplebus, port_driver, port_devclass, 0, 0);
249