xref: /freebsd/sys/arm/freescale/vybrid/vf_port.c (revision 0b3105a37d7adcadcb720112fed4dc4e8040be99)
1 /*-
2  * Copyright (c) 2014 Ruslan Bukin <br@bsdpad.com>
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  *
14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24  * SUCH DAMAGE.
25  */
26 
27 /*
28  * Vybrid Family Port control and interrupts (PORT)
29  * Chapter 6, Vybrid Reference Manual, Rev. 5, 07/2013
30  */
31 
32 #include <sys/cdefs.h>
33 __FBSDID("$FreeBSD$");
34 
35 #include <sys/param.h>
36 #include <sys/systm.h>
37 #include <sys/bus.h>
38 #include <sys/kernel.h>
39 #include <sys/module.h>
40 #include <sys/malloc.h>
41 #include <sys/rman.h>
42 #include <sys/timeet.h>
43 #include <sys/timetc.h>
44 #include <sys/watchdog.h>
45 
46 #include <dev/fdt/fdt_common.h>
47 #include <dev/ofw/openfirm.h>
48 #include <dev/ofw/ofw_bus.h>
49 #include <dev/ofw/ofw_bus_subr.h>
50 
51 #include <machine/bus.h>
52 #include <machine/cpu.h>
53 #include <machine/intr.h>
54 
55 #include <arm/freescale/vybrid/vf_port.h>
56 #include <arm/freescale/vybrid/vf_common.h>
57 
58 /* Pin Control Register */
59 #define PORT_PCR(n)		(0x1000 * (n >> 5) + 0x4 * (n % 32))
60 #define	 PCR_IRQC_S	16
61 #define	 PCR_IRQC_M	0xF
62 #define	 PCR_DMA_RE	0x1
63 #define	 PCR_DMA_FE	0x2
64 #define	 PCR_DMA_EE	0x3
65 #define	 PCR_INT_LZ	0x8
66 #define	 PCR_INT_RE	0x9
67 #define	 PCR_INT_FE	0xA
68 #define	 PCR_INT_EE	0xB
69 #define	 PCR_INT_LO	0xC
70 #define	 PCR_ISF	(1 << 24)
71 #define	PORT0_ISFR	0xA0	/* Interrupt Status Flag Register */
72 #define	PORT0_DFER	0xC0	/* Digital Filter Enable Register */
73 #define	PORT0_DFCR	0xC4	/* Digital Filter Clock Register */
74 #define	PORT0_DFWR	0xC8	/* Digital Filter Width Register */
75 
76 struct port_event {
77 	uint32_t	enabled;
78 	uint32_t	mux_num;
79 	uint32_t	mux_src;
80 	uint32_t	mux_chn;
81 	void		(*ih) (void *);
82 	void		*ih_user;
83 	enum ev_type	pevt;
84 };
85 
86 static struct port_event event_map[NGPIO];
87 
88 struct port_softc {
89 	struct resource		*res[6];
90 	bus_space_tag_t		bst;
91 	bus_space_handle_t	bsh;
92 	void			*gpio_ih[NGPIO];
93 };
94 
95 struct port_softc *port_sc;
96 
97 static struct resource_spec port_spec[] = {
98 	{ SYS_RES_MEMORY,	0,	RF_ACTIVE },
99 	{ SYS_RES_IRQ,		0,	RF_ACTIVE },
100 	{ SYS_RES_IRQ,		1,	RF_ACTIVE },
101 	{ SYS_RES_IRQ,		2,	RF_ACTIVE },
102 	{ SYS_RES_IRQ,		3,	RF_ACTIVE },
103 	{ SYS_RES_IRQ,		4,	RF_ACTIVE },
104 	{ -1, 0 }
105 };
106 
107 static int
108 port_intr(void *arg)
109 {
110 	struct port_event *pev;
111 	struct port_softc *sc;
112 	int reg;
113 	int i;
114 
115 	sc = arg;
116 
117 	for (i = 0; i < NGPIO; i++) {
118 		reg = READ4(sc, PORT_PCR(i));
119 		if (reg & PCR_ISF) {
120 
121 			/* Clear interrupt */
122 			WRITE4(sc, PORT_PCR(i), reg);
123 
124 			/* Handle event */
125 			pev = &event_map[i];
126 			if (pev->enabled == 1) {
127 				if (pev->ih != NULL) {
128 					pev->ih(pev->ih_user);
129 				}
130 			}
131 		}
132 	}
133 
134 	return (FILTER_HANDLED);
135 }
136 
137 int
138 port_setup(int pnum, enum ev_type pevt, void (*ih)(void *), void *ih_user)
139 {
140 	struct port_event *pev;
141 	struct port_softc *sc;
142 	int reg;
143 	int val;
144 
145 	sc = port_sc;
146 
147 	switch (pevt) {
148 	case DMA_RISING_EDGE:
149 		val = PCR_DMA_RE;
150 		break;
151 	case DMA_FALLING_EDGE:
152 		val = PCR_DMA_FE;
153 		break;
154 	case DMA_EITHER_EDGE:
155 		val = PCR_DMA_EE;
156 		break;
157 	case INT_LOGIC_ZERO:
158 		val = PCR_INT_LZ;
159 		break;
160 	case INT_RISING_EDGE:
161 		val = PCR_INT_RE;
162 		break;
163 	case INT_FALLING_EDGE:
164 		val = PCR_INT_FE;
165 		break;
166 	case INT_EITHER_EDGE:
167 		val = PCR_INT_EE;
168 		break;
169 	case INT_LOGIC_ONE:
170 		val = PCR_INT_LO;
171 		break;
172 	default:
173 		return (-1);
174 	};
175 
176 	reg = READ4(sc, PORT_PCR(pnum));
177 	reg &= ~(PCR_IRQC_M << PCR_IRQC_S);
178 	reg |= (val << PCR_IRQC_S);
179 	WRITE4(sc, PORT_PCR(pnum), reg);
180 
181 	pev = &event_map[pnum];
182 	pev->ih = ih;
183 	pev->ih_user = ih_user;
184 	pev->pevt = pevt;
185 	pev->enabled = 1;
186 
187 	return (0);
188 }
189 
190 static int
191 port_probe(device_t dev)
192 {
193 
194 	if (!ofw_bus_status_okay(dev))
195 		return (ENXIO);
196 
197 	if (!ofw_bus_is_compatible(dev, "fsl,mvf600-port"))
198 		return (ENXIO);
199 
200 	device_set_desc(dev, "Vybrid Family Port control and interrupts");
201 	return (BUS_PROBE_DEFAULT);
202 }
203 
204 static int
205 port_attach(device_t dev)
206 {
207 	struct port_softc *sc;
208 	int irq;
209 
210 	sc = device_get_softc(dev);
211 
212 	if (bus_alloc_resources(dev, port_spec, sc->res)) {
213 		device_printf(dev, "could not allocate resources\n");
214 		return (ENXIO);
215 	}
216 
217 	/* Memory interface */
218 	sc->bst = rman_get_bustag(sc->res[0]);
219 	sc->bsh = rman_get_bushandle(sc->res[0]);
220 
221 	port_sc = sc;
222 
223 	for (irq = 0; irq < NPORTS; irq ++) {
224 		if ((bus_setup_intr(dev, sc->res[1 + irq], INTR_TYPE_MISC,
225 		    port_intr, NULL, sc, &sc->gpio_ih[irq]))) {
226 			device_printf(dev,
227 			    "ERROR: Unable to register interrupt handler\n");
228 			return (ENXIO);
229 		}
230 	}
231 
232 	return (0);
233 }
234 
235 static device_method_t port_methods[] = {
236 	DEVMETHOD(device_probe,		port_probe),
237 	DEVMETHOD(device_attach,	port_attach),
238 	{ 0, 0 }
239 };
240 
241 static driver_t port_driver = {
242 	"port",
243 	port_methods,
244 	sizeof(struct port_softc),
245 };
246 
247 static devclass_t port_devclass;
248 
249 DRIVER_MODULE(port, simplebus, port_driver, port_devclass, 0, 0);
250