10c94beceSRuslan Bukin /*-
2*4d846d26SWarner Losh * SPDX-License-Identifier: BSD-2-Clause
3af3dc4a7SPedro F. Giffuni *
40c94beceSRuslan Bukin * Copyright (c) 2014 Ruslan Bukin <br@bsdpad.com>
50c94beceSRuslan Bukin * All rights reserved.
60c94beceSRuslan Bukin *
70c94beceSRuslan Bukin * Redistribution and use in source and binary forms, with or without
80c94beceSRuslan Bukin * modification, are permitted provided that the following conditions
90c94beceSRuslan Bukin * are met:
100c94beceSRuslan Bukin * 1. Redistributions of source code must retain the above copyright
110c94beceSRuslan Bukin * notice, this list of conditions and the following disclaimer.
120c94beceSRuslan Bukin * 2. Redistributions in binary form must reproduce the above copyright
130c94beceSRuslan Bukin * notice, this list of conditions and the following disclaimer in the
140c94beceSRuslan Bukin * documentation and/or other materials provided with the distribution.
150c94beceSRuslan Bukin *
160c94beceSRuslan Bukin * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
170c94beceSRuslan Bukin * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
180c94beceSRuslan Bukin * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
190c94beceSRuslan Bukin * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
200c94beceSRuslan Bukin * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
210c94beceSRuslan Bukin * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
220c94beceSRuslan Bukin * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
230c94beceSRuslan Bukin * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
240c94beceSRuslan Bukin * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
250c94beceSRuslan Bukin * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
260c94beceSRuslan Bukin * SUCH DAMAGE.
270c94beceSRuslan Bukin */
280c94beceSRuslan Bukin
290c94beceSRuslan Bukin /*
300c94beceSRuslan Bukin * Vybrid Family Port control and interrupts (PORT)
310c94beceSRuslan Bukin * Chapter 6, Vybrid Reference Manual, Rev. 5, 07/2013
320c94beceSRuslan Bukin */
330c94beceSRuslan Bukin
340c94beceSRuslan Bukin #include <sys/param.h>
350c94beceSRuslan Bukin #include <sys/systm.h>
360c94beceSRuslan Bukin #include <sys/bus.h>
370c94beceSRuslan Bukin #include <sys/kernel.h>
380c94beceSRuslan Bukin #include <sys/module.h>
390c94beceSRuslan Bukin #include <sys/malloc.h>
400c94beceSRuslan Bukin #include <sys/rman.h>
410c94beceSRuslan Bukin #include <sys/timeet.h>
420c94beceSRuslan Bukin #include <sys/timetc.h>
430c94beceSRuslan Bukin #include <sys/watchdog.h>
440c94beceSRuslan Bukin
450c94beceSRuslan Bukin #include <dev/ofw/openfirm.h>
460c94beceSRuslan Bukin #include <dev/ofw/ofw_bus.h>
470c94beceSRuslan Bukin #include <dev/ofw/ofw_bus_subr.h>
480c94beceSRuslan Bukin
490c94beceSRuslan Bukin #include <machine/bus.h>
500c94beceSRuslan Bukin #include <machine/cpu.h>
510c94beceSRuslan Bukin #include <machine/intr.h>
520c94beceSRuslan Bukin
530c94beceSRuslan Bukin #include <arm/freescale/vybrid/vf_port.h>
540c94beceSRuslan Bukin #include <arm/freescale/vybrid/vf_common.h>
550c94beceSRuslan Bukin
560c94beceSRuslan Bukin /* Pin Control Register */
570c94beceSRuslan Bukin #define PORT_PCR(n) (0x1000 * (n >> 5) + 0x4 * (n % 32))
580c94beceSRuslan Bukin #define PCR_IRQC_S 16
590c94beceSRuslan Bukin #define PCR_IRQC_M 0xF
600c94beceSRuslan Bukin #define PCR_DMA_RE 0x1
610c94beceSRuslan Bukin #define PCR_DMA_FE 0x2
620c94beceSRuslan Bukin #define PCR_DMA_EE 0x3
630c94beceSRuslan Bukin #define PCR_INT_LZ 0x8
640c94beceSRuslan Bukin #define PCR_INT_RE 0x9
650c94beceSRuslan Bukin #define PCR_INT_FE 0xA
660c94beceSRuslan Bukin #define PCR_INT_EE 0xB
670c94beceSRuslan Bukin #define PCR_INT_LO 0xC
680c94beceSRuslan Bukin #define PCR_ISF (1 << 24)
690c94beceSRuslan Bukin #define PORT0_ISFR 0xA0 /* Interrupt Status Flag Register */
700c94beceSRuslan Bukin #define PORT0_DFER 0xC0 /* Digital Filter Enable Register */
710c94beceSRuslan Bukin #define PORT0_DFCR 0xC4 /* Digital Filter Clock Register */
720c94beceSRuslan Bukin #define PORT0_DFWR 0xC8 /* Digital Filter Width Register */
730c94beceSRuslan Bukin
740c94beceSRuslan Bukin struct port_event {
750c94beceSRuslan Bukin uint32_t enabled;
760c94beceSRuslan Bukin uint32_t mux_num;
770c94beceSRuslan Bukin uint32_t mux_src;
780c94beceSRuslan Bukin uint32_t mux_chn;
790c94beceSRuslan Bukin void (*ih) (void *);
800c94beceSRuslan Bukin void *ih_user;
810c94beceSRuslan Bukin enum ev_type pevt;
820c94beceSRuslan Bukin };
830c94beceSRuslan Bukin
840c94beceSRuslan Bukin static struct port_event event_map[NGPIO];
850c94beceSRuslan Bukin
860c94beceSRuslan Bukin struct port_softc {
870c94beceSRuslan Bukin struct resource *res[6];
880c94beceSRuslan Bukin bus_space_tag_t bst;
890c94beceSRuslan Bukin bus_space_handle_t bsh;
900c94beceSRuslan Bukin void *gpio_ih[NGPIO];
910c94beceSRuslan Bukin };
920c94beceSRuslan Bukin
930c94beceSRuslan Bukin struct port_softc *port_sc;
940c94beceSRuslan Bukin
950c94beceSRuslan Bukin static struct resource_spec port_spec[] = {
960c94beceSRuslan Bukin { SYS_RES_MEMORY, 0, RF_ACTIVE },
970c94beceSRuslan Bukin { SYS_RES_IRQ, 0, RF_ACTIVE },
980c94beceSRuslan Bukin { SYS_RES_IRQ, 1, RF_ACTIVE },
990c94beceSRuslan Bukin { SYS_RES_IRQ, 2, RF_ACTIVE },
1000c94beceSRuslan Bukin { SYS_RES_IRQ, 3, RF_ACTIVE },
1010c94beceSRuslan Bukin { SYS_RES_IRQ, 4, RF_ACTIVE },
1020c94beceSRuslan Bukin { -1, 0 }
1030c94beceSRuslan Bukin };
1040c94beceSRuslan Bukin
1050c94beceSRuslan Bukin static int
port_intr(void * arg)1060c94beceSRuslan Bukin port_intr(void *arg)
1070c94beceSRuslan Bukin {
1080c94beceSRuslan Bukin struct port_event *pev;
1090c94beceSRuslan Bukin struct port_softc *sc;
1100c94beceSRuslan Bukin int reg;
1110c94beceSRuslan Bukin int i;
1120c94beceSRuslan Bukin
1130c94beceSRuslan Bukin sc = arg;
1140c94beceSRuslan Bukin
1150c94beceSRuslan Bukin for (i = 0; i < NGPIO; i++) {
1160c94beceSRuslan Bukin reg = READ4(sc, PORT_PCR(i));
1170c94beceSRuslan Bukin if (reg & PCR_ISF) {
1180c94beceSRuslan Bukin /* Clear interrupt */
1190c94beceSRuslan Bukin WRITE4(sc, PORT_PCR(i), reg);
1200c94beceSRuslan Bukin
1210c94beceSRuslan Bukin /* Handle event */
1220c94beceSRuslan Bukin pev = &event_map[i];
1230c94beceSRuslan Bukin if (pev->enabled == 1) {
1240c94beceSRuslan Bukin if (pev->ih != NULL) {
1250c94beceSRuslan Bukin pev->ih(pev->ih_user);
1260c94beceSRuslan Bukin }
1270c94beceSRuslan Bukin }
1280c94beceSRuslan Bukin }
1290c94beceSRuslan Bukin }
1300c94beceSRuslan Bukin
1310c94beceSRuslan Bukin return (FILTER_HANDLED);
1320c94beceSRuslan Bukin }
1330c94beceSRuslan Bukin
1340c94beceSRuslan Bukin int
port_setup(int pnum,enum ev_type pevt,void (* ih)(void *),void * ih_user)1350c94beceSRuslan Bukin port_setup(int pnum, enum ev_type pevt, void (*ih)(void *), void *ih_user)
1360c94beceSRuslan Bukin {
1370c94beceSRuslan Bukin struct port_event *pev;
1380c94beceSRuslan Bukin struct port_softc *sc;
1390c94beceSRuslan Bukin int reg;
1400c94beceSRuslan Bukin int val;
1410c94beceSRuslan Bukin
1420c94beceSRuslan Bukin sc = port_sc;
1430c94beceSRuslan Bukin
1440c94beceSRuslan Bukin switch (pevt) {
1450c94beceSRuslan Bukin case DMA_RISING_EDGE:
1460c94beceSRuslan Bukin val = PCR_DMA_RE;
1470c94beceSRuslan Bukin break;
1480c94beceSRuslan Bukin case DMA_FALLING_EDGE:
1490c94beceSRuslan Bukin val = PCR_DMA_FE;
1500c94beceSRuslan Bukin break;
1510c94beceSRuslan Bukin case DMA_EITHER_EDGE:
1520c94beceSRuslan Bukin val = PCR_DMA_EE;
1530c94beceSRuslan Bukin break;
1540c94beceSRuslan Bukin case INT_LOGIC_ZERO:
1550c94beceSRuslan Bukin val = PCR_INT_LZ;
1560c94beceSRuslan Bukin break;
1570c94beceSRuslan Bukin case INT_RISING_EDGE:
1580c94beceSRuslan Bukin val = PCR_INT_RE;
1590c94beceSRuslan Bukin break;
1600c94beceSRuslan Bukin case INT_FALLING_EDGE:
1610c94beceSRuslan Bukin val = PCR_INT_FE;
1620c94beceSRuslan Bukin break;
1630c94beceSRuslan Bukin case INT_EITHER_EDGE:
164876ac29dSRuslan Bukin val = PCR_INT_EE;
1650c94beceSRuslan Bukin break;
1660c94beceSRuslan Bukin case INT_LOGIC_ONE:
1670c94beceSRuslan Bukin val = PCR_INT_LO;
1680c94beceSRuslan Bukin break;
1690c94beceSRuslan Bukin default:
1700c94beceSRuslan Bukin return (-1);
17174b8d63dSPedro F. Giffuni }
1720c94beceSRuslan Bukin
1730c94beceSRuslan Bukin reg = READ4(sc, PORT_PCR(pnum));
1740c94beceSRuslan Bukin reg &= ~(PCR_IRQC_M << PCR_IRQC_S);
1750c94beceSRuslan Bukin reg |= (val << PCR_IRQC_S);
1760c94beceSRuslan Bukin WRITE4(sc, PORT_PCR(pnum), reg);
1770c94beceSRuslan Bukin
1780c94beceSRuslan Bukin pev = &event_map[pnum];
1790c94beceSRuslan Bukin pev->ih = ih;
1800c94beceSRuslan Bukin pev->ih_user = ih_user;
1810c94beceSRuslan Bukin pev->pevt = pevt;
1820c94beceSRuslan Bukin pev->enabled = 1;
1830c94beceSRuslan Bukin
1840c94beceSRuslan Bukin return (0);
1850c94beceSRuslan Bukin }
1860c94beceSRuslan Bukin
1870c94beceSRuslan Bukin static int
port_probe(device_t dev)1880c94beceSRuslan Bukin port_probe(device_t dev)
1890c94beceSRuslan Bukin {
1900c94beceSRuslan Bukin
1910c94beceSRuslan Bukin if (!ofw_bus_status_okay(dev))
1920c94beceSRuslan Bukin return (ENXIO);
1930c94beceSRuslan Bukin
1940c94beceSRuslan Bukin if (!ofw_bus_is_compatible(dev, "fsl,mvf600-port"))
1950c94beceSRuslan Bukin return (ENXIO);
1960c94beceSRuslan Bukin
1970c94beceSRuslan Bukin device_set_desc(dev, "Vybrid Family Port control and interrupts");
1980c94beceSRuslan Bukin return (BUS_PROBE_DEFAULT);
1990c94beceSRuslan Bukin }
2000c94beceSRuslan Bukin
2010c94beceSRuslan Bukin static int
port_attach(device_t dev)2020c94beceSRuslan Bukin port_attach(device_t dev)
2030c94beceSRuslan Bukin {
2040c94beceSRuslan Bukin struct port_softc *sc;
2050c94beceSRuslan Bukin int irq;
2060c94beceSRuslan Bukin
2070c94beceSRuslan Bukin sc = device_get_softc(dev);
2080c94beceSRuslan Bukin
2090c94beceSRuslan Bukin if (bus_alloc_resources(dev, port_spec, sc->res)) {
2100c94beceSRuslan Bukin device_printf(dev, "could not allocate resources\n");
2110c94beceSRuslan Bukin return (ENXIO);
2120c94beceSRuslan Bukin }
2130c94beceSRuslan Bukin
2140c94beceSRuslan Bukin /* Memory interface */
2150c94beceSRuslan Bukin sc->bst = rman_get_bustag(sc->res[0]);
2160c94beceSRuslan Bukin sc->bsh = rman_get_bushandle(sc->res[0]);
2170c94beceSRuslan Bukin
2180c94beceSRuslan Bukin port_sc = sc;
2190c94beceSRuslan Bukin
2200c94beceSRuslan Bukin for (irq = 0; irq < NPORTS; irq ++) {
2210c94beceSRuslan Bukin if ((bus_setup_intr(dev, sc->res[1 + irq], INTR_TYPE_MISC,
2220c94beceSRuslan Bukin port_intr, NULL, sc, &sc->gpio_ih[irq]))) {
2230c94beceSRuslan Bukin device_printf(dev,
2240c94beceSRuslan Bukin "ERROR: Unable to register interrupt handler\n");
2250c94beceSRuslan Bukin return (ENXIO);
2260c94beceSRuslan Bukin }
2270c94beceSRuslan Bukin }
2280c94beceSRuslan Bukin
2290c94beceSRuslan Bukin return (0);
2300c94beceSRuslan Bukin }
2310c94beceSRuslan Bukin
2320c94beceSRuslan Bukin static device_method_t port_methods[] = {
2330c94beceSRuslan Bukin DEVMETHOD(device_probe, port_probe),
2340c94beceSRuslan Bukin DEVMETHOD(device_attach, port_attach),
2350c94beceSRuslan Bukin { 0, 0 }
2360c94beceSRuslan Bukin };
2370c94beceSRuslan Bukin
2380c94beceSRuslan Bukin static driver_t port_driver = {
2390c94beceSRuslan Bukin "port",
2400c94beceSRuslan Bukin port_methods,
2410c94beceSRuslan Bukin sizeof(struct port_softc),
2420c94beceSRuslan Bukin };
2430c94beceSRuslan Bukin
244ea538dabSJohn Baldwin DRIVER_MODULE(port, simplebus, port_driver, 0, 0);
245