1 /*- 2 * Copyright (c) 2013 Ruslan Bukin <br@bsdpad.com> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 /* 28 * Vybrid Family Universal Serial Bus (USB) Controller 29 * Chapter 44-45, Vybrid Reference Manual, Rev. 5, 07/2013 30 */ 31 32 #include <sys/cdefs.h> 33 __FBSDID("$FreeBSD$"); 34 35 #include "opt_bus.h" 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/kernel.h> 40 #include <sys/module.h> 41 #include <sys/bus.h> 42 #include <sys/condvar.h> 43 #include <sys/rman.h> 44 #include <sys/gpio.h> 45 46 #include <dev/ofw/ofw_bus.h> 47 #include <dev/ofw/ofw_bus_subr.h> 48 49 #include <dev/usb/usb.h> 50 #include <dev/usb/usbdi.h> 51 #include <dev/usb/usb_busdma.h> 52 #include <dev/usb/usb_process.h> 53 #include <dev/usb/usb_controller.h> 54 #include <dev/usb/usb_bus.h> 55 #include <dev/usb/controller/ehci.h> 56 #include <dev/usb/controller/ehcireg.h> 57 58 #include <machine/bus.h> 59 #include <machine/resource.h> 60 61 #include "gpio_if.h" 62 #include "opt_platform.h" 63 64 #define ENUTMILEVEL3 (1 << 15) 65 #define ENUTMILEVEL2 (1 << 14) 66 67 #define GPIO_USB_PWR 134 68 69 #define USB_ID 0x000 /* Identification register */ 70 #define USB_HWGENERAL 0x004 /* Hardware General */ 71 #define USB_HWHOST 0x008 /* Host Hardware Parameters */ 72 #define USB_HWDEVICE 0x00C /* Device Hardware Parameters */ 73 #define USB_HWTXBUF 0x010 /* TX Buffer Hardware Parameters */ 74 #define USB_HWRXBUF 0x014 /* RX Buffer Hardware Parameters */ 75 #define USB_HCSPARAMS 0x104 /* Host Controller Structural Parameters */ 76 77 #define USBPHY_PWD 0x00 /* PHY Power-Down Register */ 78 #define USBPHY_PWD_SET 0x04 /* PHY Power-Down Register */ 79 #define USBPHY_PWD_CLR 0x08 /* PHY Power-Down Register */ 80 #define USBPHY_PWD_TOG 0x0C /* PHY Power-Down Register */ 81 #define USBPHY_TX 0x10 /* PHY Transmitter Control Register */ 82 #define USBPHY_RX 0x20 /* PHY Receiver Control Register */ 83 #define USBPHY_RX_SET 0x24 /* PHY Receiver Control Register */ 84 #define USBPHY_RX_CLR 0x28 /* PHY Receiver Control Register */ 85 #define USBPHY_RX_TOG 0x2C /* PHY Receiver Control Register */ 86 #define USBPHY_CTRL 0x30 /* PHY General Control Register */ 87 #define USBPHY_CTRL_SET 0x34 /* PHY General Control Register */ 88 #define USBPHY_CTRL_CLR 0x38 /* PHY General Control Register */ 89 #define USBPHY_CTRL_TOG 0x3C /* PHY General Control Register */ 90 #define USBPHY_STATUS 0x40 /* PHY Status Register */ 91 #define USBPHY_DEBUG 0x50 /* PHY Debug Register */ 92 #define USBPHY_DEBUG_SET 0x54 /* PHY Debug Register */ 93 #define USBPHY_DEBUG_CLR 0x58 /* PHY Debug Register */ 94 #define USBPHY_DEBUG_TOG 0x5C /* PHY Debug Register */ 95 #define USBPHY_DEBUG0_STATUS 0x60 /* UTMI Debug Status Register 0 */ 96 #define USBPHY_DEBUG1 0x70 /* UTMI Debug Status Register 1 */ 97 #define USBPHY_DEBUG1_SET 0x74 /* UTMI Debug Status Register 1 */ 98 #define USBPHY_DEBUG1_CLR 0x78 /* UTMI Debug Status Register 1 */ 99 #define USBPHY_DEBUG1_TOG 0x7C /* UTMI Debug Status Register 1 */ 100 #define USBPHY_VERSION 0x80 /* UTMI RTL Version */ 101 #define USBPHY_IP 0x90 /* PHY IP Block Register */ 102 #define USBPHY_IP_SET 0x94 /* PHY IP Block Register */ 103 #define USBPHY_IP_CLR 0x98 /* PHY IP Block Register */ 104 #define USBPHY_IP_TOG 0x9C /* PHY IP Block Register */ 105 106 #define USBPHY_CTRL_SFTRST (1U << 31) 107 #define USBPHY_CTRL_CLKGATE (1 << 30) 108 #define USBPHY_DEBUG_CLKGATE (1 << 30) 109 110 #define PHY_READ4(_sc, _reg) \ 111 bus_space_read_4(_sc->bst_phy, _sc->bsh_phy, _reg) 112 #define PHY_WRITE4(_sc, _reg, _val) \ 113 bus_space_write_4(_sc->bst_phy, _sc->bsh_phy, _reg, _val) 114 115 #define USBC_READ4(_sc, _reg) \ 116 bus_space_read_4(_sc->bst_usbc, _sc->bsh_usbc, _reg) 117 #define USBC_WRITE4(_sc, _reg, _val) \ 118 bus_space_write_4(_sc->bst_usbc, _sc->bsh_usbc, _reg, _val) 119 120 /* Forward declarations */ 121 static int vybrid_ehci_attach(device_t dev); 122 static int vybrid_ehci_detach(device_t dev); 123 static int vybrid_ehci_probe(device_t dev); 124 125 struct vybrid_ehci_softc { 126 ehci_softc_t base; 127 device_t dev; 128 struct resource *res[6]; 129 bus_space_tag_t bst_phy; 130 bus_space_handle_t bsh_phy; 131 bus_space_tag_t bst_usbc; 132 bus_space_handle_t bsh_usbc; 133 }; 134 135 static struct resource_spec vybrid_ehci_spec[] = { 136 { SYS_RES_MEMORY, 0, RF_ACTIVE }, 137 { SYS_RES_MEMORY, 1, RF_ACTIVE }, 138 { SYS_RES_MEMORY, 2, RF_ACTIVE }, 139 { SYS_RES_IRQ, 0, RF_ACTIVE }, 140 { -1, 0 } 141 }; 142 143 static device_method_t ehci_methods[] = { 144 /* Device interface */ 145 DEVMETHOD(device_probe, vybrid_ehci_probe), 146 DEVMETHOD(device_attach, vybrid_ehci_attach), 147 DEVMETHOD(device_detach, vybrid_ehci_detach), 148 DEVMETHOD(device_suspend, bus_generic_suspend), 149 DEVMETHOD(device_resume, bus_generic_resume), 150 DEVMETHOD(device_shutdown, bus_generic_shutdown), 151 152 /* Bus interface */ 153 DEVMETHOD(bus_print_child, bus_generic_print_child), 154 155 { 0, 0 } 156 }; 157 158 /* kobj_class definition */ 159 static driver_t ehci_driver = { 160 "ehci", 161 ehci_methods, 162 sizeof(ehci_softc_t) 163 }; 164 165 static devclass_t ehci_devclass; 166 167 DRIVER_MODULE(ehci, simplebus, ehci_driver, ehci_devclass, 0, 0); 168 MODULE_DEPEND(ehci, usb, 1, 1, 1); 169 170 static void 171 vybrid_ehci_post_reset(struct ehci_softc *ehci_softc) 172 { 173 uint32_t usbmode; 174 175 /* Force HOST mode */ 176 usbmode = EOREAD4(ehci_softc, EHCI_USBMODE_NOLPM); 177 usbmode &= ~EHCI_UM_CM; 178 usbmode |= EHCI_UM_CM_HOST; 179 EOWRITE4(ehci_softc, EHCI_USBMODE_NOLPM, usbmode); 180 } 181 182 /* 183 * Public methods 184 */ 185 static int 186 vybrid_ehci_probe(device_t dev) 187 { 188 189 if (!ofw_bus_status_okay(dev)) 190 return (ENXIO); 191 192 if (ofw_bus_is_compatible(dev, "fsl,mvf600-usb-ehci") == 0) 193 return (ENXIO); 194 195 device_set_desc(dev, "Vybrid Family integrated USB controller"); 196 return (BUS_PROBE_DEFAULT); 197 } 198 199 static int 200 phy_init(struct vybrid_ehci_softc *esc) 201 { 202 device_t sc_gpio_dev; 203 int reg; 204 205 /* Reset phy */ 206 reg = PHY_READ4(esc, USBPHY_CTRL); 207 reg |= (USBPHY_CTRL_SFTRST); 208 PHY_WRITE4(esc, USBPHY_CTRL, reg); 209 210 /* Minimum reset time */ 211 DELAY(10000); 212 213 reg &= ~(USBPHY_CTRL_SFTRST | USBPHY_CTRL_CLKGATE); 214 PHY_WRITE4(esc, USBPHY_CTRL, reg); 215 216 reg = (ENUTMILEVEL2 | ENUTMILEVEL3); 217 PHY_WRITE4(esc, USBPHY_CTRL_SET, reg); 218 219 /* Get the GPIO device, we need this to give power to USB */ 220 sc_gpio_dev = devclass_get_device(devclass_find("gpio"), 0); 221 if (sc_gpio_dev == NULL) { 222 device_printf(esc->dev, "Error: failed to get the GPIO dev\n"); 223 return (1); 224 } 225 226 /* Give power to USB */ 227 GPIO_PIN_SETFLAGS(sc_gpio_dev, GPIO_USB_PWR, GPIO_PIN_OUTPUT); 228 GPIO_PIN_SET(sc_gpio_dev, GPIO_USB_PWR, GPIO_PIN_HIGH); 229 230 /* Power up PHY */ 231 PHY_WRITE4(esc, USBPHY_PWD, 0x00); 232 233 /* Ungate clocks */ 234 reg = PHY_READ4(esc, USBPHY_DEBUG); 235 reg &= ~(USBPHY_DEBUG_CLKGATE); 236 PHY_WRITE4(esc, USBPHY_DEBUG, reg); 237 238 #if 0 239 printf("USBPHY_CTRL == 0x%08x\n", 240 PHY_READ4(esc, USBPHY_CTRL)); 241 printf("USBPHY_IP == 0x%08x\n", 242 PHY_READ4(esc, USBPHY_IP)); 243 printf("USBPHY_STATUS == 0x%08x\n", 244 PHY_READ4(esc, USBPHY_STATUS)); 245 printf("USBPHY_DEBUG == 0x%08x\n", 246 PHY_READ4(esc, USBPHY_DEBUG)); 247 printf("USBPHY_DEBUG0_STATUS == 0x%08x\n", 248 PHY_READ4(esc, USBPHY_DEBUG0_STATUS)); 249 printf("USBPHY_DEBUG1 == 0x%08x\n", 250 PHY_READ4(esc, USBPHY_DEBUG1)); 251 #endif 252 253 return (0); 254 } 255 256 static int 257 vybrid_ehci_attach(device_t dev) 258 { 259 struct vybrid_ehci_softc *esc; 260 ehci_softc_t *sc; 261 bus_space_handle_t bsh; 262 int err; 263 int reg; 264 265 esc = device_get_softc(dev); 266 esc->dev = dev; 267 268 sc = &esc->base; 269 sc->sc_bus.parent = dev; 270 sc->sc_bus.devices = sc->sc_devices; 271 sc->sc_bus.devices_max = EHCI_MAX_DEVICES; 272 sc->sc_bus.dma_bits = 32; 273 274 if (bus_alloc_resources(dev, vybrid_ehci_spec, esc->res)) { 275 device_printf(dev, "could not allocate resources\n"); 276 return (ENXIO); 277 } 278 279 /* EHCI registers */ 280 sc->sc_io_tag = rman_get_bustag(esc->res[0]); 281 bsh = rman_get_bushandle(esc->res[0]); 282 sc->sc_io_size = rman_get_size(esc->res[0]); 283 284 esc->bst_usbc = rman_get_bustag(esc->res[1]); 285 esc->bsh_usbc = rman_get_bushandle(esc->res[1]); 286 287 esc->bst_phy = rman_get_bustag(esc->res[2]); 288 esc->bsh_phy = rman_get_bushandle(esc->res[2]); 289 290 /* get all DMA memory */ 291 if (usb_bus_mem_alloc_all(&sc->sc_bus, USB_GET_DMA_TAG(dev), 292 &ehci_iterate_hw_softc)) 293 return (ENXIO); 294 295 #if 0 296 printf("USBx_HCSPARAMS is 0x%08x\n", 297 bus_space_read_4(sc->sc_io_tag, bsh, USB_HCSPARAMS)); 298 printf("USB_ID == 0x%08x\n", 299 bus_space_read_4(sc->sc_io_tag, bsh, USB_ID)); 300 printf("USB_HWGENERAL == 0x%08x\n", 301 bus_space_read_4(sc->sc_io_tag, bsh, USB_HWGENERAL)); 302 printf("USB_HWHOST == 0x%08x\n", 303 bus_space_read_4(sc->sc_io_tag, bsh, USB_HWHOST)); 304 printf("USB_HWDEVICE == 0x%08x\n", 305 bus_space_read_4(sc->sc_io_tag, bsh, USB_HWDEVICE)); 306 printf("USB_HWTXBUF == 0x%08x\n", 307 bus_space_read_4(sc->sc_io_tag, bsh, USB_HWTXBUF)); 308 printf("USB_HWRXBUF == 0x%08x\n", 309 bus_space_read_4(sc->sc_io_tag, bsh, USB_HWRXBUF)); 310 #endif 311 312 if (phy_init(esc)) { 313 device_printf(dev, "Could not setup PHY\n"); 314 return (1); 315 } 316 317 /* 318 * Set handle to USB related registers subregion used by 319 * generic EHCI driver. 320 */ 321 err = bus_space_subregion(sc->sc_io_tag, bsh, 0x100, 322 sc->sc_io_size, &sc->sc_io_hdl); 323 if (err != 0) 324 return (ENXIO); 325 326 /* Setup interrupt handler */ 327 err = bus_setup_intr(dev, esc->res[3], INTR_TYPE_BIO | INTR_MPSAFE, 328 NULL, (driver_intr_t *)ehci_interrupt, sc, 329 &sc->sc_intr_hdl); 330 if (err) { 331 device_printf(dev, "Could not setup irq, " 332 "%d\n", err); 333 return (1); 334 } 335 336 /* Add USB device */ 337 sc->sc_bus.bdev = device_add_child(dev, "usbus", -1); 338 if (!sc->sc_bus.bdev) { 339 device_printf(dev, "Could not add USB device\n"); 340 err = bus_teardown_intr(dev, esc->res[5], 341 sc->sc_intr_hdl); 342 if (err) 343 device_printf(dev, "Could not tear down irq," 344 " %d\n", err); 345 return (1); 346 } 347 device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus); 348 349 strlcpy(sc->sc_vendor, "Freescale", sizeof(sc->sc_vendor)); 350 351 /* Set host mode */ 352 reg = bus_space_read_4(sc->sc_io_tag, sc->sc_io_hdl, 0xA8); 353 reg |= 0x3; 354 bus_space_write_4(sc->sc_io_tag, sc->sc_io_hdl, 0xA8, reg); 355 356 /* Set flags and callbacks*/ 357 sc->sc_flags |= EHCI_SCFLG_TT | EHCI_SCFLG_NORESTERM; 358 sc->sc_vendor_post_reset = vybrid_ehci_post_reset; 359 sc->sc_vendor_get_port_speed = ehci_get_port_speed_portsc; 360 361 err = ehci_init(sc); 362 if (!err) { 363 sc->sc_flags |= EHCI_SCFLG_DONEINIT; 364 err = device_probe_and_attach(sc->sc_bus.bdev); 365 } else { 366 device_printf(dev, "USB init failed err=%d\n", err); 367 368 device_delete_child(dev, sc->sc_bus.bdev); 369 sc->sc_bus.bdev = NULL; 370 371 err = bus_teardown_intr(dev, esc->res[5], 372 sc->sc_intr_hdl); 373 if (err) 374 device_printf(dev, "Could not tear down irq," 375 " %d\n", err); 376 return (1); 377 } 378 return (0); 379 } 380 381 static int 382 vybrid_ehci_detach(device_t dev) 383 { 384 struct vybrid_ehci_softc *esc; 385 ehci_softc_t *sc; 386 int err; 387 388 esc = device_get_softc(dev); 389 sc = &esc->base; 390 391 if (sc->sc_flags & EHCI_SCFLG_DONEINIT) 392 return (0); 393 394 /* 395 * only call ehci_detach() after ehci_init() 396 */ 397 if (sc->sc_flags & EHCI_SCFLG_DONEINIT) { 398 ehci_detach(sc); 399 sc->sc_flags &= ~EHCI_SCFLG_DONEINIT; 400 } 401 402 /* 403 * Disable interrupts that might have been switched on in 404 * ehci_init. 405 */ 406 if (sc->sc_io_tag && sc->sc_io_hdl) 407 bus_space_write_4(sc->sc_io_tag, sc->sc_io_hdl, 408 EHCI_USBINTR, 0); 409 410 if (esc->res[5] && sc->sc_intr_hdl) { 411 err = bus_teardown_intr(dev, esc->res[5], 412 sc->sc_intr_hdl); 413 if (err) { 414 device_printf(dev, "Could not tear down irq," 415 " %d\n", err); 416 return (err); 417 } 418 sc->sc_intr_hdl = NULL; 419 } 420 421 if (sc->sc_bus.bdev) { 422 device_delete_child(dev, sc->sc_bus.bdev); 423 sc->sc_bus.bdev = NULL; 424 } 425 426 /* During module unload there are lots of children leftover */ 427 device_delete_children(dev); 428 429 bus_release_resources(dev, vybrid_ehci_spec, esc->res); 430 431 return (0); 432 } 433