1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2013 Ruslan Bukin <br@bsdpad.com> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 /* 30 * Vybrid Family Universal Serial Bus (USB) Controller 31 * Chapter 44-45, Vybrid Reference Manual, Rev. 5, 07/2013 32 */ 33 34 #include <sys/cdefs.h> 35 #include "opt_bus.h" 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/kernel.h> 40 #include <sys/module.h> 41 #include <sys/bus.h> 42 #include <sys/condvar.h> 43 #include <sys/rman.h> 44 #include <sys/gpio.h> 45 46 #include <dev/ofw/ofw_bus.h> 47 #include <dev/ofw/ofw_bus_subr.h> 48 49 #include <dev/usb/usb.h> 50 #include <dev/usb/usbdi.h> 51 #include <dev/usb/usb_busdma.h> 52 #include <dev/usb/usb_process.h> 53 #include <dev/usb/usb_controller.h> 54 #include <dev/usb/usb_bus.h> 55 #include <dev/usb/controller/ehci.h> 56 #include <dev/usb/controller/ehcireg.h> 57 58 #include <machine/bus.h> 59 #include <machine/resource.h> 60 61 #include "gpio_if.h" 62 #include "opt_platform.h" 63 64 #define ENUTMILEVEL3 (1 << 15) 65 #define ENUTMILEVEL2 (1 << 14) 66 67 #define GPIO_USB_PWR 134 68 69 #define USB_ID 0x000 /* Identification register */ 70 #define USB_HWGENERAL 0x004 /* Hardware General */ 71 #define USB_HWHOST 0x008 /* Host Hardware Parameters */ 72 #define USB_HWDEVICE 0x00C /* Device Hardware Parameters */ 73 #define USB_HWTXBUF 0x010 /* TX Buffer Hardware Parameters */ 74 #define USB_HWRXBUF 0x014 /* RX Buffer Hardware Parameters */ 75 #define USB_HCSPARAMS 0x104 /* Host Controller Structural Parameters */ 76 77 #define USBPHY_PWD 0x00 /* PHY Power-Down Register */ 78 #define USBPHY_PWD_SET 0x04 /* PHY Power-Down Register */ 79 #define USBPHY_PWD_CLR 0x08 /* PHY Power-Down Register */ 80 #define USBPHY_PWD_TOG 0x0C /* PHY Power-Down Register */ 81 #define USBPHY_TX 0x10 /* PHY Transmitter Control Register */ 82 #define USBPHY_RX 0x20 /* PHY Receiver Control Register */ 83 #define USBPHY_RX_SET 0x24 /* PHY Receiver Control Register */ 84 #define USBPHY_RX_CLR 0x28 /* PHY Receiver Control Register */ 85 #define USBPHY_RX_TOG 0x2C /* PHY Receiver Control Register */ 86 #define USBPHY_CTRL 0x30 /* PHY General Control Register */ 87 #define USBPHY_CTRL_SET 0x34 /* PHY General Control Register */ 88 #define USBPHY_CTRL_CLR 0x38 /* PHY General Control Register */ 89 #define USBPHY_CTRL_TOG 0x3C /* PHY General Control Register */ 90 #define USBPHY_STATUS 0x40 /* PHY Status Register */ 91 #define USBPHY_DEBUG 0x50 /* PHY Debug Register */ 92 #define USBPHY_DEBUG_SET 0x54 /* PHY Debug Register */ 93 #define USBPHY_DEBUG_CLR 0x58 /* PHY Debug Register */ 94 #define USBPHY_DEBUG_TOG 0x5C /* PHY Debug Register */ 95 #define USBPHY_DEBUG0_STATUS 0x60 /* UTMI Debug Status Register 0 */ 96 #define USBPHY_DEBUG1 0x70 /* UTMI Debug Status Register 1 */ 97 #define USBPHY_DEBUG1_SET 0x74 /* UTMI Debug Status Register 1 */ 98 #define USBPHY_DEBUG1_CLR 0x78 /* UTMI Debug Status Register 1 */ 99 #define USBPHY_DEBUG1_TOG 0x7C /* UTMI Debug Status Register 1 */ 100 #define USBPHY_VERSION 0x80 /* UTMI RTL Version */ 101 #define USBPHY_IP 0x90 /* PHY IP Block Register */ 102 #define USBPHY_IP_SET 0x94 /* PHY IP Block Register */ 103 #define USBPHY_IP_CLR 0x98 /* PHY IP Block Register */ 104 #define USBPHY_IP_TOG 0x9C /* PHY IP Block Register */ 105 106 #define USBPHY_CTRL_SFTRST (1U << 31) 107 #define USBPHY_CTRL_CLKGATE (1 << 30) 108 #define USBPHY_DEBUG_CLKGATE (1 << 30) 109 110 #define PHY_READ4(_sc, _reg) \ 111 bus_space_read_4(_sc->bst_phy, _sc->bsh_phy, _reg) 112 #define PHY_WRITE4(_sc, _reg, _val) \ 113 bus_space_write_4(_sc->bst_phy, _sc->bsh_phy, _reg, _val) 114 115 #define USBC_READ4(_sc, _reg) \ 116 bus_space_read_4(_sc->bst_usbc, _sc->bsh_usbc, _reg) 117 #define USBC_WRITE4(_sc, _reg, _val) \ 118 bus_space_write_4(_sc->bst_usbc, _sc->bsh_usbc, _reg, _val) 119 120 /* Forward declarations */ 121 static int vybrid_ehci_attach(device_t dev); 122 static int vybrid_ehci_detach(device_t dev); 123 static int vybrid_ehci_probe(device_t dev); 124 125 struct vybrid_ehci_softc { 126 ehci_softc_t base; 127 device_t dev; 128 struct resource *res[6]; 129 bus_space_tag_t bst_phy; 130 bus_space_handle_t bsh_phy; 131 bus_space_tag_t bst_usbc; 132 bus_space_handle_t bsh_usbc; 133 }; 134 135 static struct resource_spec vybrid_ehci_spec[] = { 136 { SYS_RES_MEMORY, 0, RF_ACTIVE }, 137 { SYS_RES_MEMORY, 1, RF_ACTIVE }, 138 { SYS_RES_MEMORY, 2, RF_ACTIVE }, 139 { SYS_RES_IRQ, 0, RF_ACTIVE }, 140 { -1, 0 } 141 }; 142 143 static device_method_t ehci_methods[] = { 144 /* Device interface */ 145 DEVMETHOD(device_probe, vybrid_ehci_probe), 146 DEVMETHOD(device_attach, vybrid_ehci_attach), 147 DEVMETHOD(device_detach, vybrid_ehci_detach), 148 DEVMETHOD(device_suspend, bus_generic_suspend), 149 DEVMETHOD(device_resume, bus_generic_resume), 150 DEVMETHOD(device_shutdown, bus_generic_shutdown), 151 152 /* Bus interface */ 153 DEVMETHOD(bus_print_child, bus_generic_print_child), 154 { 0, 0 } 155 }; 156 157 /* kobj_class definition */ 158 static driver_t ehci_driver = { 159 "ehci", 160 ehci_methods, 161 sizeof(ehci_softc_t) 162 }; 163 164 DRIVER_MODULE(vybrid_ehci, simplebus, ehci_driver, 0, 0); 165 MODULE_DEPEND(vybrid_ehci, usb, 1, 1, 1); 166 167 static void 168 vybrid_ehci_post_reset(struct ehci_softc *ehci_softc) 169 { 170 uint32_t usbmode; 171 172 /* Force HOST mode */ 173 usbmode = EOREAD4(ehci_softc, EHCI_USBMODE_NOLPM); 174 usbmode &= ~EHCI_UM_CM; 175 usbmode |= EHCI_UM_CM_HOST; 176 EOWRITE4(ehci_softc, EHCI_USBMODE_NOLPM, usbmode); 177 } 178 179 /* 180 * Public methods 181 */ 182 static int 183 vybrid_ehci_probe(device_t dev) 184 { 185 186 if (!ofw_bus_status_okay(dev)) 187 return (ENXIO); 188 189 if (ofw_bus_is_compatible(dev, "fsl,mvf600-usb-ehci") == 0) 190 return (ENXIO); 191 192 device_set_desc(dev, "Vybrid Family integrated USB controller"); 193 return (BUS_PROBE_DEFAULT); 194 } 195 196 static int 197 phy_init(struct vybrid_ehci_softc *esc) 198 { 199 device_t sc_gpio_dev; 200 int reg; 201 202 /* Reset phy */ 203 reg = PHY_READ4(esc, USBPHY_CTRL); 204 reg |= (USBPHY_CTRL_SFTRST); 205 PHY_WRITE4(esc, USBPHY_CTRL, reg); 206 207 /* Minimum reset time */ 208 DELAY(10000); 209 210 reg &= ~(USBPHY_CTRL_SFTRST | USBPHY_CTRL_CLKGATE); 211 PHY_WRITE4(esc, USBPHY_CTRL, reg); 212 213 reg = (ENUTMILEVEL2 | ENUTMILEVEL3); 214 PHY_WRITE4(esc, USBPHY_CTRL_SET, reg); 215 216 /* Get the GPIO device, we need this to give power to USB */ 217 sc_gpio_dev = devclass_get_device(devclass_find("gpio"), 0); 218 if (sc_gpio_dev == NULL) { 219 device_printf(esc->dev, "Error: failed to get the GPIO dev\n"); 220 return (1); 221 } 222 223 /* Give power to USB */ 224 GPIO_PIN_SETFLAGS(sc_gpio_dev, GPIO_USB_PWR, GPIO_PIN_OUTPUT); 225 GPIO_PIN_SET(sc_gpio_dev, GPIO_USB_PWR, GPIO_PIN_HIGH); 226 227 /* Power up PHY */ 228 PHY_WRITE4(esc, USBPHY_PWD, 0x00); 229 230 /* Ungate clocks */ 231 reg = PHY_READ4(esc, USBPHY_DEBUG); 232 reg &= ~(USBPHY_DEBUG_CLKGATE); 233 PHY_WRITE4(esc, USBPHY_DEBUG, reg); 234 235 #if 0 236 printf("USBPHY_CTRL == 0x%08x\n", 237 PHY_READ4(esc, USBPHY_CTRL)); 238 printf("USBPHY_IP == 0x%08x\n", 239 PHY_READ4(esc, USBPHY_IP)); 240 printf("USBPHY_STATUS == 0x%08x\n", 241 PHY_READ4(esc, USBPHY_STATUS)); 242 printf("USBPHY_DEBUG == 0x%08x\n", 243 PHY_READ4(esc, USBPHY_DEBUG)); 244 printf("USBPHY_DEBUG0_STATUS == 0x%08x\n", 245 PHY_READ4(esc, USBPHY_DEBUG0_STATUS)); 246 printf("USBPHY_DEBUG1 == 0x%08x\n", 247 PHY_READ4(esc, USBPHY_DEBUG1)); 248 #endif 249 250 return (0); 251 } 252 253 static int 254 vybrid_ehci_attach(device_t dev) 255 { 256 struct vybrid_ehci_softc *esc; 257 ehci_softc_t *sc; 258 bus_space_handle_t bsh; 259 int err; 260 int reg; 261 262 esc = device_get_softc(dev); 263 esc->dev = dev; 264 265 sc = &esc->base; 266 sc->sc_bus.parent = dev; 267 sc->sc_bus.devices = sc->sc_devices; 268 sc->sc_bus.devices_max = EHCI_MAX_DEVICES; 269 sc->sc_bus.dma_bits = 32; 270 271 if (bus_alloc_resources(dev, vybrid_ehci_spec, esc->res)) { 272 device_printf(dev, "could not allocate resources\n"); 273 return (ENXIO); 274 } 275 276 /* EHCI registers */ 277 sc->sc_io_tag = rman_get_bustag(esc->res[0]); 278 bsh = rman_get_bushandle(esc->res[0]); 279 sc->sc_io_size = rman_get_size(esc->res[0]); 280 281 esc->bst_usbc = rman_get_bustag(esc->res[1]); 282 esc->bsh_usbc = rman_get_bushandle(esc->res[1]); 283 284 esc->bst_phy = rman_get_bustag(esc->res[2]); 285 esc->bsh_phy = rman_get_bushandle(esc->res[2]); 286 287 /* get all DMA memory */ 288 if (usb_bus_mem_alloc_all(&sc->sc_bus, USB_GET_DMA_TAG(dev), 289 &ehci_iterate_hw_softc)) 290 return (ENXIO); 291 292 #if 0 293 printf("USBx_HCSPARAMS is 0x%08x\n", 294 bus_space_read_4(sc->sc_io_tag, bsh, USB_HCSPARAMS)); 295 printf("USB_ID == 0x%08x\n", 296 bus_space_read_4(sc->sc_io_tag, bsh, USB_ID)); 297 printf("USB_HWGENERAL == 0x%08x\n", 298 bus_space_read_4(sc->sc_io_tag, bsh, USB_HWGENERAL)); 299 printf("USB_HWHOST == 0x%08x\n", 300 bus_space_read_4(sc->sc_io_tag, bsh, USB_HWHOST)); 301 printf("USB_HWDEVICE == 0x%08x\n", 302 bus_space_read_4(sc->sc_io_tag, bsh, USB_HWDEVICE)); 303 printf("USB_HWTXBUF == 0x%08x\n", 304 bus_space_read_4(sc->sc_io_tag, bsh, USB_HWTXBUF)); 305 printf("USB_HWRXBUF == 0x%08x\n", 306 bus_space_read_4(sc->sc_io_tag, bsh, USB_HWRXBUF)); 307 #endif 308 309 if (phy_init(esc)) { 310 device_printf(dev, "Could not setup PHY\n"); 311 return (1); 312 } 313 314 /* 315 * Set handle to USB related registers subregion used by 316 * generic EHCI driver. 317 */ 318 err = bus_space_subregion(sc->sc_io_tag, bsh, 0x100, 319 sc->sc_io_size, &sc->sc_io_hdl); 320 if (err != 0) 321 return (ENXIO); 322 323 /* Setup interrupt handler */ 324 err = bus_setup_intr(dev, esc->res[3], INTR_TYPE_BIO | INTR_MPSAFE, 325 NULL, (driver_intr_t *)ehci_interrupt, sc, 326 &sc->sc_intr_hdl); 327 if (err) { 328 device_printf(dev, "Could not setup irq, " 329 "%d\n", err); 330 return (1); 331 } 332 333 /* Add USB device */ 334 sc->sc_bus.bdev = device_add_child(dev, "usbus", DEVICE_UNIT_ANY); 335 if (!sc->sc_bus.bdev) { 336 device_printf(dev, "Could not add USB device\n"); 337 err = bus_teardown_intr(dev, esc->res[5], 338 sc->sc_intr_hdl); 339 if (err) 340 device_printf(dev, "Could not tear down irq," 341 " %d\n", err); 342 return (1); 343 } 344 device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus); 345 346 strlcpy(sc->sc_vendor, "Freescale", sizeof(sc->sc_vendor)); 347 348 /* Set host mode */ 349 reg = bus_space_read_4(sc->sc_io_tag, sc->sc_io_hdl, 0xA8); 350 reg |= 0x3; 351 bus_space_write_4(sc->sc_io_tag, sc->sc_io_hdl, 0xA8, reg); 352 353 /* Set flags and callbacks*/ 354 sc->sc_flags |= EHCI_SCFLG_TT | EHCI_SCFLG_NORESTERM; 355 sc->sc_vendor_post_reset = vybrid_ehci_post_reset; 356 sc->sc_vendor_get_port_speed = ehci_get_port_speed_portsc; 357 358 err = ehci_init(sc); 359 if (!err) { 360 sc->sc_flags |= EHCI_SCFLG_DONEINIT; 361 err = device_probe_and_attach(sc->sc_bus.bdev); 362 } else { 363 device_printf(dev, "USB init failed err=%d\n", err); 364 365 device_delete_child(dev, sc->sc_bus.bdev); 366 sc->sc_bus.bdev = NULL; 367 368 err = bus_teardown_intr(dev, esc->res[5], 369 sc->sc_intr_hdl); 370 if (err) 371 device_printf(dev, "Could not tear down irq," 372 " %d\n", err); 373 return (1); 374 } 375 return (0); 376 } 377 378 static int 379 vybrid_ehci_detach(device_t dev) 380 { 381 struct vybrid_ehci_softc *esc; 382 ehci_softc_t *sc; 383 int err; 384 385 esc = device_get_softc(dev); 386 sc = &esc->base; 387 388 /* First detach all children; we can't detach if that fails. */ 389 if ((err = device_delete_children(dev)) != 0) 390 return (err); 391 392 /* 393 * only call ehci_detach() after ehci_init() 394 */ 395 if (sc->sc_flags & EHCI_SCFLG_DONEINIT) { 396 ehci_detach(sc); 397 sc->sc_flags &= ~EHCI_SCFLG_DONEINIT; 398 } 399 400 /* 401 * Disable interrupts that might have been switched on in 402 * ehci_init. 403 */ 404 if (sc->sc_io_tag && sc->sc_io_hdl) 405 bus_space_write_4(sc->sc_io_tag, sc->sc_io_hdl, 406 EHCI_USBINTR, 0); 407 408 if (esc->res[5] && sc->sc_intr_hdl) { 409 err = bus_teardown_intr(dev, esc->res[5], 410 sc->sc_intr_hdl); 411 if (err) { 412 device_printf(dev, "Could not tear down irq," 413 " %d\n", err); 414 return (err); 415 } 416 sc->sc_intr_hdl = NULL; 417 } 418 419 usb_bus_mem_free_all(&sc->sc_bus, &ehci_iterate_hw_softc); 420 421 bus_release_resources(dev, vybrid_ehci_spec, esc->res); 422 423 return (0); 424 } 425