xref: /freebsd/sys/arm/freescale/imx/imx_wdogreg.h (revision a2c472e741ff8682553464270bdef82b70635fdb)
1*a2c472e7SAleksandr Rybalko /*-
2*a2c472e7SAleksandr Rybalko  * Copyright (c) 2012 The FreeBSD Foundation
3*a2c472e7SAleksandr Rybalko  * All rights reserved.
4*a2c472e7SAleksandr Rybalko  *
5*a2c472e7SAleksandr Rybalko  * This software was developed by Oleksandr Rybalko under sponsorship
6*a2c472e7SAleksandr Rybalko  * from the FreeBSD Foundation.
7*a2c472e7SAleksandr Rybalko  *
8*a2c472e7SAleksandr Rybalko  * Redistribution and use in source and binary forms, with or without
9*a2c472e7SAleksandr Rybalko  * modification, are permitted provided that the following conditions
10*a2c472e7SAleksandr Rybalko  * are met:
11*a2c472e7SAleksandr Rybalko  * 1.	Redistributions of source code must retain the above copyright
12*a2c472e7SAleksandr Rybalko  *	notice, this list of conditions and the following disclaimer.
13*a2c472e7SAleksandr Rybalko  * 2.	Redistributions in binary form must reproduce the above copyright
14*a2c472e7SAleksandr Rybalko  *	notice, this list of conditions and the following disclaimer in the
15*a2c472e7SAleksandr Rybalko  *	documentation and/or other materials provided with the distribution.
16*a2c472e7SAleksandr Rybalko  *
17*a2c472e7SAleksandr Rybalko  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18*a2c472e7SAleksandr Rybalko  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19*a2c472e7SAleksandr Rybalko  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20*a2c472e7SAleksandr Rybalko  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21*a2c472e7SAleksandr Rybalko  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22*a2c472e7SAleksandr Rybalko  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23*a2c472e7SAleksandr Rybalko  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24*a2c472e7SAleksandr Rybalko  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25*a2c472e7SAleksandr Rybalko  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26*a2c472e7SAleksandr Rybalko  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27*a2c472e7SAleksandr Rybalko  * SUCH DAMAGE.
28*a2c472e7SAleksandr Rybalko  *
29*a2c472e7SAleksandr Rybalko  * $FreeBSD$
30*a2c472e7SAleksandr Rybalko  */
31*a2c472e7SAleksandr Rybalko 
32*a2c472e7SAleksandr Rybalko #define	WDOG_CLK_FREQ	32768
33*a2c472e7SAleksandr Rybalko 
34*a2c472e7SAleksandr Rybalko #define	WDOG_CR_REG	0x00	/* Control Register */
35*a2c472e7SAleksandr Rybalko #define		WDOG_CR_WT_MASK		0xff00	/* Count of 0.5 sec */
36*a2c472e7SAleksandr Rybalko #define		WDOG_CR_WT_SHIFT	8
37*a2c472e7SAleksandr Rybalko #define		WDOG_CR_WDW		(1 << 7) /* Suspend WDog */
38*a2c472e7SAleksandr Rybalko #define		WDOG_CR_WDA		(1 << 5) /* Don't touch ipp_wdog */
39*a2c472e7SAleksandr Rybalko #define		WDOG_CR_SRS		(1 << 4) /* Don't touch sys_reset */
40*a2c472e7SAleksandr Rybalko #define		WDOG_CR_WDT		(1 << 3) /* Assert ipp_wdog on tout */
41*a2c472e7SAleksandr Rybalko #define		WDOG_CR_WDE		(1 << 2) /* WDog Enable */
42*a2c472e7SAleksandr Rybalko #define		WDOG_CR_WDBG		(1 << 1) /* Suspend when DBG mode */
43*a2c472e7SAleksandr Rybalko #define		WDOG_CR_WDZST		(1 << 0) /* Suspend when LP mode */
44*a2c472e7SAleksandr Rybalko 
45*a2c472e7SAleksandr Rybalko #define	WDOG_SR_REG	0x02	/* Service Register */
46*a2c472e7SAleksandr Rybalko #define		WDOG_SR_STEP1		0x5555
47*a2c472e7SAleksandr Rybalko #define		WDOG_SR_STEP2		0xaaaa
48*a2c472e7SAleksandr Rybalko 
49*a2c472e7SAleksandr Rybalko #define	WDOG_RSR_REG	0x04	/* Reset Status Register */
50*a2c472e7SAleksandr Rybalko #define		WDOG_RSR_TOUT		(1 << 1) /* Due WDog timeout reset */
51*a2c472e7SAleksandr Rybalko #define		WDOG_RSR_SFTW		(1 << 0) /* Due Soft reset */
52*a2c472e7SAleksandr Rybalko 
53*a2c472e7SAleksandr Rybalko #define	WDOG_ICR_REG	0x06	/* Interrupt Control Register */
54*a2c472e7SAleksandr Rybalko #define		WDOG_ICR_WIE		(1 << 15) /* Enable Interrupt */
55*a2c472e7SAleksandr Rybalko #define		WDOG_ICR_WTIS		(1 << 14) /* Interrupt has occurred */
56*a2c472e7SAleksandr Rybalko #define		WDOG_ICR_WTCT_MASK	0x00ff
57*a2c472e7SAleksandr Rybalko #define		WDOG_ICR_WTCT_SHIFT	0	/* Interrupt hold time */
58*a2c472e7SAleksandr Rybalko 
59*a2c472e7SAleksandr Rybalko #define	WDOG_MCR_REG	0x08	/* Miscellaneous Control Register */
60*a2c472e7SAleksandr Rybalko #define		WDOG_MCR_PDE		(1 << 0)
61*a2c472e7SAleksandr Rybalko 
62*a2c472e7SAleksandr Rybalko #define	READ(_sc, _r)							\
63*a2c472e7SAleksandr Rybalko 		bus_space_read_2((_sc)->sc_bst, (_sc)->sc_bsh, (_r))
64*a2c472e7SAleksandr Rybalko #define	WRITE(_sc, _r, _v)						\
65*a2c472e7SAleksandr Rybalko 		bus_space_write_2((_sc)->sc_bst, (_sc)->sc_bsh, (_r), (_v))
66