1a2c472e7SAleksandr Rybalko /*- 2*4d846d26SWarner Losh * SPDX-License-Identifier: BSD-2-Clause 3af3dc4a7SPedro F. Giffuni * 494f8d6fdSAleksandr Rybalko * Copyright (c) 2012, 2013 The FreeBSD Foundation 5a2c472e7SAleksandr Rybalko * 6a2c472e7SAleksandr Rybalko * This software was developed by Oleksandr Rybalko under sponsorship 7a2c472e7SAleksandr Rybalko * from the FreeBSD Foundation. 8a2c472e7SAleksandr Rybalko * 9a2c472e7SAleksandr Rybalko * Redistribution and use in source and binary forms, with or without 10a2c472e7SAleksandr Rybalko * modification, are permitted provided that the following conditions 11a2c472e7SAleksandr Rybalko * are met: 12a2c472e7SAleksandr Rybalko * 1. Redistributions of source code must retain the above copyright 13a2c472e7SAleksandr Rybalko * notice, this list of conditions and the following disclaimer. 14a2c472e7SAleksandr Rybalko * 2. Redistributions in binary form must reproduce the above copyright 15a2c472e7SAleksandr Rybalko * notice, this list of conditions and the following disclaimer in the 16a2c472e7SAleksandr Rybalko * documentation and/or other materials provided with the distribution. 17a2c472e7SAleksandr Rybalko * 18a2c472e7SAleksandr Rybalko * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19a2c472e7SAleksandr Rybalko * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20a2c472e7SAleksandr Rybalko * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21a2c472e7SAleksandr Rybalko * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22a2c472e7SAleksandr Rybalko * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23a2c472e7SAleksandr Rybalko * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24a2c472e7SAleksandr Rybalko * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25a2c472e7SAleksandr Rybalko * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26a2c472e7SAleksandr Rybalko * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27a2c472e7SAleksandr Rybalko * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28a2c472e7SAleksandr Rybalko * SUCH DAMAGE. 29a2c472e7SAleksandr Rybalko * 30a2c472e7SAleksandr Rybalko * $FreeBSD$ 31a2c472e7SAleksandr Rybalko */ 32a2c472e7SAleksandr Rybalko 33a2c472e7SAleksandr Rybalko #define WDOG_CLK_FREQ 32768 34a2c472e7SAleksandr Rybalko 35a2c472e7SAleksandr Rybalko #define WDOG_CR_REG 0x00 /* Control Register */ 362128fefbSIan Lepore #define WDOG_CR_WT_MASK 0xff00 /* Count; 0.5 sec units */ 37a2c472e7SAleksandr Rybalko #define WDOG_CR_WT_SHIFT 8 382128fefbSIan Lepore #define WDOG_CR_WDW (1u << 7) /* Suspend when in WAIT mode */ 392128fefbSIan Lepore #define WDOG_CR_WDA (1u << 5) /* Don't assert ext reset */ 402128fefbSIan Lepore #define WDOG_CR_SRS (1u << 4) /* Don't assert soft reset */ 412128fefbSIan Lepore #define WDOG_CR_WDT (1u << 3) /* Assert ext reset on timeout */ 422128fefbSIan Lepore #define WDOG_CR_WDE (1u << 2) /* Watchdog Enable */ 432128fefbSIan Lepore #define WDOG_CR_WDBG (1u << 1) /* Suspend when DBG mode */ 442128fefbSIan Lepore #define WDOG_CR_WDZST (1u << 0) /* Suspend when LP mode */ 45a2c472e7SAleksandr Rybalko 46a2c472e7SAleksandr Rybalko #define WDOG_SR_REG 0x02 /* Service Register */ 47a2c472e7SAleksandr Rybalko #define WDOG_SR_STEP1 0x5555 48a2c472e7SAleksandr Rybalko #define WDOG_SR_STEP2 0xaaaa 49a2c472e7SAleksandr Rybalko 50a2c472e7SAleksandr Rybalko #define WDOG_RSR_REG 0x04 /* Reset Status Register */ 512128fefbSIan Lepore #define WDOG_RSR_POR (1u << 4) /* Due to Power-On Reset */ 522128fefbSIan Lepore #define WDOG_RSR_TOUT (1u << 1) /* Due WDog timeout reset */ 532128fefbSIan Lepore #define WDOG_RSR_SFTW (1u << 0) /* Due Soft reset */ 54a2c472e7SAleksandr Rybalko 55a2c472e7SAleksandr Rybalko #define WDOG_ICR_REG 0x06 /* Interrupt Control Register */ 562128fefbSIan Lepore #define WDOG_ICR_WIE (1u << 15) /* Enable Interrupt */ 572128fefbSIan Lepore #define WDOG_ICR_WTIS (1u << 14) /* Interrupt has occurred */ 582128fefbSIan Lepore #define WDOG_ICR_WTCT_MASK 0x00ff /* Interrupt lead time in 0.5s */ 592128fefbSIan Lepore #define WDOG_ICR_WTCT_SHIFT 0 /* units before reset occurs */ 60a2c472e7SAleksandr Rybalko 61a2c472e7SAleksandr Rybalko #define WDOG_MCR_REG 0x08 /* Miscellaneous Control Register */ 622128fefbSIan Lepore #define WDOG_MCR_PDE (1u << 0) /* Power-down enable */ 63