1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2012, 2013 The FreeBSD Foundation 5 * 6 * This software was developed by Oleksandr Rybalko under sponsorship 7 * from the FreeBSD Foundation. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 */ 30 31 #include <sys/param.h> 32 #include <sys/bus.h> 33 #include <sys/eventhandler.h> 34 #include <sys/kernel.h> 35 #include <sys/lock.h> 36 #include <sys/module.h> 37 #include <sys/mutex.h> 38 #include <sys/resource.h> 39 #include <sys/rman.h> 40 #include <sys/systm.h> 41 #include <sys/time.h> 42 #include <sys/watchdog.h> 43 44 #include <machine/bus.h> 45 #include <machine/intr.h> 46 47 #include <dev/ofw/openfirm.h> 48 #include <dev/ofw/ofw_bus.h> 49 #include <dev/ofw/ofw_bus_subr.h> 50 51 #include <arm/freescale/imx/imx_machdep.h> 52 #include <arm/freescale/imx/imx_wdogreg.h> 53 54 struct imx_wdog_softc { 55 struct mtx sc_mtx; 56 device_t sc_dev; 57 struct resource *sc_res[2]; 58 void *sc_ih; 59 uint32_t sc_timeout; 60 bool sc_pde_enabled; 61 }; 62 63 static struct resource_spec imx_wdog_spec[] = { 64 { SYS_RES_MEMORY, 0, RF_ACTIVE }, 65 { SYS_RES_IRQ, 0, RF_ACTIVE }, 66 RESOURCE_SPEC_END 67 }; 68 69 #define MEMRES 0 70 #define IRQRES 1 71 72 static struct ofw_compat_data compat_data[] = { 73 {"fsl,imx6sx-wdt", 1}, 74 {"fsl,imx6sl-wdt", 1}, 75 {"fsl,imx6q-wdt", 1}, 76 {"fsl,imx53-wdt", 1}, 77 {"fsl,imx51-wdt", 1}, 78 {"fsl,imx50-wdt", 1}, 79 {"fsl,imx35-wdt", 1}, 80 {"fsl,imx27-wdt", 1}, 81 {"fsl,imx25-wdt", 1}, 82 {"fsl,imx21-wdt", 1}, 83 {NULL, 0} 84 }; 85 86 static inline uint16_t 87 RD2(struct imx_wdog_softc *sc, bus_size_t offs) 88 { 89 90 return (bus_read_2(sc->sc_res[MEMRES], offs)); 91 } 92 93 static inline void 94 WR2(struct imx_wdog_softc *sc, bus_size_t offs, uint16_t val) 95 { 96 97 bus_write_2(sc->sc_res[MEMRES], offs, val); 98 } 99 100 static int 101 imx_wdog_enable(struct imx_wdog_softc *sc, u_int timeout) 102 { 103 uint16_t reg; 104 105 if (timeout < 1 || timeout > 128) 106 return (EINVAL); 107 108 mtx_lock(&sc->sc_mtx); 109 if (timeout != sc->sc_timeout) { 110 sc->sc_timeout = timeout; 111 reg = RD2(sc, WDOG_CR_REG); 112 reg &= ~WDOG_CR_WT_MASK; 113 reg |= ((2 * timeout - 1) << WDOG_CR_WT_SHIFT); 114 WR2(sc, WDOG_CR_REG, reg | WDOG_CR_WDE); 115 } 116 /* Refresh counter */ 117 WR2(sc, WDOG_SR_REG, WDOG_SR_STEP1); 118 WR2(sc, WDOG_SR_REG, WDOG_SR_STEP2); 119 /* Watchdog active, can disable rom-boot watchdog. */ 120 if (sc->sc_pde_enabled) { 121 sc->sc_pde_enabled = false; 122 reg = RD2(sc, WDOG_MCR_REG); 123 WR2(sc, WDOG_MCR_REG, reg & ~WDOG_MCR_PDE); 124 } 125 mtx_unlock(&sc->sc_mtx); 126 127 return (0); 128 } 129 130 static void 131 imx_watchdog(void *arg, u_int cmd, int *error) 132 { 133 struct imx_wdog_softc *sc; 134 u_int timeout; 135 136 sc = arg; 137 if (cmd == 0) { 138 if (bootverbose) 139 device_printf(sc->sc_dev, "Can not be disabled.\n"); 140 *error = EOPNOTSUPP; 141 } else { 142 timeout = (u_int)((1ULL << (cmd & WD_INTERVAL)) / 1000000000U); 143 if (imx_wdog_enable(sc, timeout) == 0) 144 *error = 0; 145 } 146 } 147 148 static int 149 imx_wdog_intr(void *arg) 150 { 151 struct imx_wdog_softc *sc = arg; 152 153 /* 154 * When configured for external reset, the actual reset is supposed to 155 * happen when some external device responds to the assertion of the 156 * WDOG_B signal by asserting the POR signal to the chip. This 157 * interrupt handler is a backstop mechanism; it is set up to fire 158 * simultaneously with WDOG_B, and if the external reset happens we'll 159 * never actually make it to here. If we do make it here, just trigger 160 * a software reset. That code will see that external reset is 161 * configured, and it will wait for 1 second for it to take effect, then 162 * it will do a software reset as a fallback. 163 */ 164 imx_wdog_cpu_reset(BUS_SPACE_PHYSADDR(sc->sc_res[MEMRES], WDOG_CR_REG)); 165 166 return (FILTER_HANDLED); /* unreached */ 167 } 168 169 static int 170 imx_wdog_probe(device_t dev) 171 { 172 173 if (!ofw_bus_status_okay(dev)) 174 return (ENXIO); 175 176 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) 177 return (ENXIO); 178 179 device_set_desc(dev, "Freescale i.MX Watchdog"); 180 return (0); 181 } 182 183 static int 184 imx_wdog_attach(device_t dev) 185 { 186 struct imx_wdog_softc *sc; 187 pcell_t timeout; 188 189 sc = device_get_softc(dev); 190 sc->sc_dev = dev; 191 192 if (bus_alloc_resources(dev, imx_wdog_spec, sc->sc_res)) { 193 device_printf(dev, "could not allocate resources\n"); 194 return (ENXIO); 195 } 196 197 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), "imx_wdt", MTX_DEF); 198 199 /* 200 * If we're configured to assert an external reset signal, set up the 201 * hardware to do so, and install an interrupt handler whose only 202 * purpose is to backstop the external reset. Don't worry if the 203 * interrupt setup fails, since it's only a backstop measure. 204 */ 205 if (ofw_bus_has_prop(sc->sc_dev, "fsl,ext-reset-output")) { 206 WR2(sc, WDOG_CR_REG, WDOG_CR_WDT | RD2(sc, WDOG_CR_REG)); 207 bus_setup_intr(sc->sc_dev, sc->sc_res[IRQRES], 208 INTR_TYPE_MISC | INTR_MPSAFE, imx_wdog_intr, NULL, sc, 209 &sc->sc_ih); 210 WR2(sc, WDOG_ICR_REG, WDOG_ICR_WIE); /* Enable, count is 0. */ 211 } 212 213 /* 214 * Note whether the rom-boot so-called "power-down" watchdog is active, 215 * so we can disable it when the regular watchdog is first enabled. 216 */ 217 if (RD2(sc, WDOG_MCR_REG) & WDOG_MCR_PDE) 218 sc->sc_pde_enabled = true; 219 220 EVENTHANDLER_REGISTER(watchdog_list, imx_watchdog, sc, 0); 221 222 /* If there is a timeout-sec property, activate the watchdog. */ 223 if (OF_getencprop(ofw_bus_get_node(sc->sc_dev), "timeout-sec", 224 &timeout, sizeof(timeout)) == sizeof(timeout)) { 225 if (timeout < 1 || timeout > 128) { 226 device_printf(sc->sc_dev, "ERROR: bad timeout-sec " 227 "property value %u, using 128\n", timeout); 228 timeout = 128; 229 } 230 imx_wdog_enable(sc, timeout); 231 device_printf(sc->sc_dev, "watchdog enabled using " 232 "timeout-sec property value %u\n", timeout); 233 } 234 235 /* 236 * The watchdog hardware cannot be disabled, so there's little point in 237 * coding up a detach() routine to carefully tear everything down, just 238 * make the device busy so that detach can't happen. 239 */ 240 device_busy(sc->sc_dev); 241 return (0); 242 } 243 244 static device_method_t imx_wdog_methods[] = { 245 DEVMETHOD(device_probe, imx_wdog_probe), 246 DEVMETHOD(device_attach, imx_wdog_attach), 247 DEVMETHOD_END 248 }; 249 250 static driver_t imx_wdog_driver = { 251 "imx_wdog", 252 imx_wdog_methods, 253 sizeof(struct imx_wdog_softc), 254 }; 255 256 EARLY_DRIVER_MODULE(imx_wdog, simplebus, imx_wdog_driver, 0, 0, BUS_PASS_TIMER); 257 SIMPLEBUS_PNP_INFO(compat_data); 258