1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2012, 2013 The FreeBSD Foundation 5 * All rights reserved. 6 * 7 * This software was developed by Oleksandr Rybalko under sponsorship 8 * from the FreeBSD Foundation. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __FBSDID("$FreeBSD$"); 34 35 #include <sys/param.h> 36 #include <sys/systm.h> 37 #include <sys/kernel.h> 38 #include <sys/module.h> 39 #include <sys/time.h> 40 #include <sys/bus.h> 41 #include <sys/resource.h> 42 #include <sys/rman.h> 43 #include <sys/watchdog.h> 44 45 #include <machine/bus.h> 46 #include <machine/intr.h> 47 48 #include <dev/ofw/openfirm.h> 49 #include <dev/ofw/ofw_bus.h> 50 #include <dev/ofw/ofw_bus_subr.h> 51 52 #include <arm/freescale/imx/imx_machdep.h> 53 #include <arm/freescale/imx/imx_wdogreg.h> 54 55 struct imx_wdog_softc { 56 struct mtx sc_mtx; 57 device_t sc_dev; 58 struct resource *sc_res[2]; 59 void *sc_ih; 60 uint32_t sc_timeout; 61 bool sc_pde_enabled; 62 }; 63 64 static struct resource_spec imx_wdog_spec[] = { 65 { SYS_RES_MEMORY, 0, RF_ACTIVE }, 66 { SYS_RES_IRQ, 0, RF_ACTIVE }, 67 RESOURCE_SPEC_END 68 }; 69 70 #define MEMRES 0 71 #define IRQRES 1 72 73 static struct ofw_compat_data compat_data[] = { 74 {"fsl,imx6sx-wdt", 1}, 75 {"fsl,imx6sl-wdt", 1}, 76 {"fsl,imx6q-wdt", 1}, 77 {"fsl,imx53-wdt", 1}, 78 {"fsl,imx51-wdt", 1}, 79 {"fsl,imx50-wdt", 1}, 80 {"fsl,imx35-wdt", 1}, 81 {"fsl,imx27-wdt", 1}, 82 {"fsl,imx25-wdt", 1}, 83 {"fsl,imx21-wdt", 1}, 84 {NULL, 0} 85 }; 86 87 static inline uint16_t 88 RD2(struct imx_wdog_softc *sc, bus_size_t offs) 89 { 90 91 return (bus_read_2(sc->sc_res[MEMRES], offs)); 92 } 93 94 static inline void 95 WR2(struct imx_wdog_softc *sc, bus_size_t offs, uint16_t val) 96 { 97 98 bus_write_2(sc->sc_res[MEMRES], offs, val); 99 } 100 101 static int 102 imx_wdog_enable(struct imx_wdog_softc *sc, u_int timeout) 103 { 104 uint16_t reg; 105 106 if (timeout < 1 || timeout > 128) 107 return (EINVAL); 108 109 mtx_lock(&sc->sc_mtx); 110 if (timeout != sc->sc_timeout) { 111 sc->sc_timeout = timeout; 112 reg = RD2(sc, WDOG_CR_REG); 113 reg &= ~WDOG_CR_WT_MASK; 114 reg |= ((2 * timeout - 1) << WDOG_CR_WT_SHIFT); 115 WR2(sc, WDOG_CR_REG, reg | WDOG_CR_WDE); 116 } 117 /* Refresh counter */ 118 WR2(sc, WDOG_SR_REG, WDOG_SR_STEP1); 119 WR2(sc, WDOG_SR_REG, WDOG_SR_STEP2); 120 /* Watchdog active, can disable rom-boot watchdog. */ 121 if (sc->sc_pde_enabled) { 122 sc->sc_pde_enabled = false; 123 reg = RD2(sc, WDOG_MCR_REG); 124 WR2(sc, WDOG_MCR_REG, reg & ~WDOG_MCR_PDE); 125 } 126 mtx_unlock(&sc->sc_mtx); 127 128 return (0); 129 } 130 131 static void 132 imx_watchdog(void *arg, u_int cmd, int *error) 133 { 134 struct imx_wdog_softc *sc; 135 u_int timeout; 136 137 sc = arg; 138 if (cmd == 0) { 139 if (bootverbose) 140 device_printf(sc->sc_dev, "Can not be disabled.\n"); 141 *error = EOPNOTSUPP; 142 } else { 143 timeout = (u_int)((1ULL << (cmd & WD_INTERVAL)) / 1000000000U); 144 if (imx_wdog_enable(sc, timeout) == 0) 145 *error = 0; 146 } 147 } 148 149 static int 150 imx_wdog_intr(void *arg) 151 { 152 struct imx_wdog_softc *sc = arg; 153 154 /* 155 * When configured for external reset, the actual reset is supposed to 156 * happen when some external device responds to the assertion of the 157 * WDOG_B signal by asserting the POR signal to the chip. This 158 * interrupt handler is a backstop mechanism; it is set up to fire 159 * simultaneously with WDOG_B, and if the external reset happens we'll 160 * never actually make it to here. If we do make it here, just trigger 161 * a software reset. That code will see that external reset is 162 * configured, and it will wait for 1 second for it to take effect, then 163 * it will do a software reset as a fallback. 164 */ 165 imx_wdog_cpu_reset(BUS_SPACE_PHYSADDR(sc->sc_res[MEMRES], WDOG_CR_REG)); 166 167 return (FILTER_HANDLED); /* unreached */ 168 } 169 170 static int 171 imx_wdog_probe(device_t dev) 172 { 173 174 if (!ofw_bus_status_okay(dev)) 175 return (ENXIO); 176 177 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) 178 return (ENXIO); 179 180 device_set_desc(dev, "Freescale i.MX Watchdog"); 181 return (0); 182 } 183 184 static int 185 imx_wdog_attach(device_t dev) 186 { 187 struct imx_wdog_softc *sc; 188 pcell_t timeout; 189 190 sc = device_get_softc(dev); 191 sc->sc_dev = dev; 192 193 if (bus_alloc_resources(dev, imx_wdog_spec, sc->sc_res)) { 194 device_printf(dev, "could not allocate resources\n"); 195 return (ENXIO); 196 } 197 198 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), "imx_wdt", MTX_DEF); 199 200 /* 201 * If we're configured to assert an external reset signal, set up the 202 * hardware to do so, and install an interrupt handler whose only 203 * purpose is to backstop the external reset. Don't worry if the 204 * interrupt setup fails, since it's only a backstop measure. 205 */ 206 if (ofw_bus_has_prop(sc->sc_dev, "fsl,ext-reset-output")) { 207 WR2(sc, WDOG_CR_REG, WDOG_CR_WDT | RD2(sc, WDOG_CR_REG)); 208 bus_setup_intr(sc->sc_dev, sc->sc_res[IRQRES], 209 INTR_TYPE_MISC | INTR_MPSAFE, imx_wdog_intr, NULL, sc, 210 &sc->sc_ih); 211 WR2(sc, WDOG_ICR_REG, WDOG_ICR_WIE); /* Enable, count is 0. */ 212 } 213 214 /* 215 * Note whether the rom-boot so-called "power-down" watchdog is active, 216 * so we can disable it when the regular watchdog is first enabled. 217 */ 218 if (RD2(sc, WDOG_MCR_REG) & WDOG_MCR_PDE) 219 sc->sc_pde_enabled = true; 220 221 EVENTHANDLER_REGISTER(watchdog_list, imx_watchdog, sc, 0); 222 223 /* If there is a timeout-sec property, activate the watchdog. */ 224 if (OF_getencprop(ofw_bus_get_node(sc->sc_dev), "timeout-sec", 225 &timeout, sizeof(timeout)) == sizeof(timeout)) { 226 if (timeout < 1 || timeout > 128) { 227 device_printf(sc->sc_dev, "ERROR: bad timeout-sec " 228 "property value %u, using 128\n", timeout); 229 timeout = 128; 230 } 231 imx_wdog_enable(sc, timeout); 232 device_printf(sc->sc_dev, "watchdog enabled using " 233 "timeout-sec property value %u\n", timeout); 234 } 235 236 /* 237 * The watchdog hardware cannot be disabled, so there's little point in 238 * coding up a detach() routine to carefully tear everything down, just 239 * make the device busy so that detach can't happen. 240 */ 241 device_busy(sc->sc_dev); 242 return (0); 243 } 244 245 static device_method_t imx_wdog_methods[] = { 246 DEVMETHOD(device_probe, imx_wdog_probe), 247 DEVMETHOD(device_attach, imx_wdog_attach), 248 DEVMETHOD_END 249 }; 250 251 static driver_t imx_wdog_driver = { 252 "imx_wdog", 253 imx_wdog_methods, 254 sizeof(struct imx_wdog_softc), 255 }; 256 257 static devclass_t imx_wdog_devclass; 258 259 EARLY_DRIVER_MODULE(imx_wdog, simplebus, imx_wdog_driver, 260 imx_wdog_devclass, 0, 0, BUS_PASS_TIMER); 261 SIMPLEBUS_PNP_INFO(compat_data); 262