xref: /freebsd/sys/arm/freescale/imx/imx_wdog.c (revision 31ff8defe34b407a9e44dc132d928148652b24ca)
1a2c472e7SAleksandr Rybalko /*-
2af3dc4a7SPedro F. Giffuni  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3af3dc4a7SPedro F. Giffuni  *
494f8d6fdSAleksandr Rybalko  * Copyright (c) 2012, 2013 The FreeBSD Foundation
5a2c472e7SAleksandr Rybalko  * All rights reserved.
6a2c472e7SAleksandr Rybalko  *
7a2c472e7SAleksandr Rybalko  * This software was developed by Oleksandr Rybalko under sponsorship
8a2c472e7SAleksandr Rybalko  * from the FreeBSD Foundation.
9a2c472e7SAleksandr Rybalko  *
10a2c472e7SAleksandr Rybalko  * Redistribution and use in source and binary forms, with or without
11a2c472e7SAleksandr Rybalko  * modification, are permitted provided that the following conditions
12a2c472e7SAleksandr Rybalko  * are met:
13a2c472e7SAleksandr Rybalko  * 1.	Redistributions of source code must retain the above copyright
14a2c472e7SAleksandr Rybalko  *	notice, this list of conditions and the following disclaimer.
15a2c472e7SAleksandr Rybalko  * 2.	Redistributions in binary form must reproduce the above copyright
16a2c472e7SAleksandr Rybalko  *	notice, this list of conditions and the following disclaimer in the
17a2c472e7SAleksandr Rybalko  *	documentation and/or other materials provided with the distribution.
18a2c472e7SAleksandr Rybalko  *
19a2c472e7SAleksandr Rybalko  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20a2c472e7SAleksandr Rybalko  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21a2c472e7SAleksandr Rybalko  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22a2c472e7SAleksandr Rybalko  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
23a2c472e7SAleksandr Rybalko  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24a2c472e7SAleksandr Rybalko  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25a2c472e7SAleksandr Rybalko  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26a2c472e7SAleksandr Rybalko  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27a2c472e7SAleksandr Rybalko  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28a2c472e7SAleksandr Rybalko  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29a2c472e7SAleksandr Rybalko  * SUCH DAMAGE.
30a2c472e7SAleksandr Rybalko  */
31a2c472e7SAleksandr Rybalko 
32a2c472e7SAleksandr Rybalko #include <sys/cdefs.h>
33a2c472e7SAleksandr Rybalko __FBSDID("$FreeBSD$");
34a2c472e7SAleksandr Rybalko 
35a2c472e7SAleksandr Rybalko #include <sys/param.h>
36a2c472e7SAleksandr Rybalko #include <sys/systm.h>
37a2c472e7SAleksandr Rybalko #include <sys/kernel.h>
38a2c472e7SAleksandr Rybalko #include <sys/module.h>
39a2c472e7SAleksandr Rybalko #include <sys/time.h>
40a2c472e7SAleksandr Rybalko #include <sys/bus.h>
41a2c472e7SAleksandr Rybalko #include <sys/resource.h>
42a2c472e7SAleksandr Rybalko #include <sys/rman.h>
43a2c472e7SAleksandr Rybalko #include <sys/watchdog.h>
44a2c472e7SAleksandr Rybalko 
45a2c472e7SAleksandr Rybalko #include <machine/bus.h>
46a2c472e7SAleksandr Rybalko #include <machine/intr.h>
47a2c472e7SAleksandr Rybalko 
48a2c472e7SAleksandr Rybalko #include <dev/ofw/openfirm.h>
49a2c472e7SAleksandr Rybalko #include <dev/ofw/ofw_bus.h>
50a2c472e7SAleksandr Rybalko #include <dev/ofw/ofw_bus_subr.h>
51a2c472e7SAleksandr Rybalko 
524dbbaf20SIan Lepore #include <arm/freescale/imx/imx_machdep.h>
53a2c472e7SAleksandr Rybalko #include <arm/freescale/imx/imx_wdogreg.h>
54a2c472e7SAleksandr Rybalko 
55a2c472e7SAleksandr Rybalko struct imx_wdog_softc {
56a2c472e7SAleksandr Rybalko 	struct mtx		sc_mtx;
57a2c472e7SAleksandr Rybalko 	device_t		sc_dev;
58a2c472e7SAleksandr Rybalko 	struct resource		*sc_res[2];
594dbbaf20SIan Lepore 	void 			*sc_ih;
60a2c472e7SAleksandr Rybalko 	uint32_t		sc_timeout;
614dbbaf20SIan Lepore 	bool			sc_pde_enabled;
62a2c472e7SAleksandr Rybalko };
63a2c472e7SAleksandr Rybalko 
64a2c472e7SAleksandr Rybalko static struct resource_spec imx_wdog_spec[] = {
65a2c472e7SAleksandr Rybalko 	{ SYS_RES_MEMORY,	0,	RF_ACTIVE },
66a2c472e7SAleksandr Rybalko 	{ SYS_RES_IRQ,		0,	RF_ACTIVE },
6776ecefceSIan Lepore 	RESOURCE_SPEC_END
68a2c472e7SAleksandr Rybalko };
69a2c472e7SAleksandr Rybalko 
7076ecefceSIan Lepore #define	MEMRES	0
7176ecefceSIan Lepore #define	IRQRES	1
7276ecefceSIan Lepore 
73398c1838SIan Lepore static struct ofw_compat_data compat_data[] = {
74398c1838SIan Lepore 	{"fsl,imx6sx-wdt", 1},
75398c1838SIan Lepore 	{"fsl,imx6sl-wdt", 1},
76398c1838SIan Lepore 	{"fsl,imx6q-wdt",  1},
77398c1838SIan Lepore 	{"fsl,imx53-wdt",  1},
78398c1838SIan Lepore 	{"fsl,imx51-wdt",  1},
79398c1838SIan Lepore 	{"fsl,imx50-wdt",  1},
80398c1838SIan Lepore 	{"fsl,imx35-wdt",  1},
81398c1838SIan Lepore 	{"fsl,imx27-wdt",  1},
82398c1838SIan Lepore 	{"fsl,imx25-wdt",  1},
83398c1838SIan Lepore 	{"fsl,imx21-wdt",  1},
84398c1838SIan Lepore 	{NULL,             0}
85398c1838SIan Lepore };
86398c1838SIan Lepore 
8776ecefceSIan Lepore static inline uint16_t
8876ecefceSIan Lepore RD2(struct imx_wdog_softc *sc, bus_size_t offs)
8976ecefceSIan Lepore {
90a2c472e7SAleksandr Rybalko 
915b810fe4SIan Lepore 	return (bus_read_2(sc->sc_res[MEMRES], offs));
9276ecefceSIan Lepore }
93a2c472e7SAleksandr Rybalko 
9476ecefceSIan Lepore static inline void
9576ecefceSIan Lepore WR2(struct imx_wdog_softc *sc, bus_size_t offs, uint16_t val)
9676ecefceSIan Lepore {
97a2c472e7SAleksandr Rybalko 
985b810fe4SIan Lepore 	bus_write_2(sc->sc_res[MEMRES], offs, val);
9976ecefceSIan Lepore }
100a2c472e7SAleksandr Rybalko 
101*31ff8defSIan Lepore static int
102*31ff8defSIan Lepore imx_wdog_enable(struct imx_wdog_softc *sc, u_int timeout)
103a2c472e7SAleksandr Rybalko {
104a2c472e7SAleksandr Rybalko 	uint16_t reg;
105a2c472e7SAleksandr Rybalko 
106*31ff8defSIan Lepore 	if (timeout < 1 || timeout > 128)
107*31ff8defSIan Lepore 		return (EINVAL);
108*31ff8defSIan Lepore 
109a2c472e7SAleksandr Rybalko 	mtx_lock(&sc->sc_mtx);
110a2c472e7SAleksandr Rybalko 	if (timeout != sc->sc_timeout) {
111a2c472e7SAleksandr Rybalko 		sc->sc_timeout = timeout;
112398c1838SIan Lepore 		reg = RD2(sc, WDOG_CR_REG);
113a2c472e7SAleksandr Rybalko 		reg &= ~WDOG_CR_WT_MASK;
114a4db01f7SIan Lepore 		reg |= ((2 * timeout - 1) << WDOG_CR_WT_SHIFT);
1156da71028SIan Lepore 		WR2(sc, WDOG_CR_REG, reg | WDOG_CR_WDE);
1166da71028SIan Lepore 	}
117a2c472e7SAleksandr Rybalko 	/* Refresh counter */
118398c1838SIan Lepore 	WR2(sc, WDOG_SR_REG, WDOG_SR_STEP1);
119398c1838SIan Lepore 	WR2(sc, WDOG_SR_REG, WDOG_SR_STEP2);
1204dbbaf20SIan Lepore 	/* Watchdog active, can disable rom-boot watchdog. */
1214dbbaf20SIan Lepore 	if (sc->sc_pde_enabled) {
1224dbbaf20SIan Lepore 		sc->sc_pde_enabled = false;
1234dbbaf20SIan Lepore 		reg = RD2(sc, WDOG_MCR_REG);
1244dbbaf20SIan Lepore 		WR2(sc, WDOG_MCR_REG, reg & ~WDOG_MCR_PDE);
1254dbbaf20SIan Lepore 	}
126*31ff8defSIan Lepore 	mtx_unlock(&sc->sc_mtx);
127*31ff8defSIan Lepore 
128*31ff8defSIan Lepore 	return (0);
129*31ff8defSIan Lepore }
130*31ff8defSIan Lepore 
131*31ff8defSIan Lepore static void
132*31ff8defSIan Lepore imx_watchdog(void *arg, u_int cmd, int *error)
133*31ff8defSIan Lepore {
134*31ff8defSIan Lepore 	struct imx_wdog_softc *sc;
135*31ff8defSIan Lepore 	u_int timeout;
136*31ff8defSIan Lepore 
137*31ff8defSIan Lepore 	sc = arg;
138*31ff8defSIan Lepore 	if (cmd == 0) {
139*31ff8defSIan Lepore 		if (bootverbose)
140*31ff8defSIan Lepore 			device_printf(sc->sc_dev, "Can not be disabled.\n");
141*31ff8defSIan Lepore 		*error = EOPNOTSUPP;
142*31ff8defSIan Lepore 	} else {
143*31ff8defSIan Lepore 		timeout = (u_int)((1ULL << (cmd & WD_INTERVAL)) / 1000000000U);
144*31ff8defSIan Lepore 		if (imx_wdog_enable(sc, timeout) == 0)
145a2c472e7SAleksandr Rybalko 			*error = 0;
146a2c472e7SAleksandr Rybalko 	}
147a2c472e7SAleksandr Rybalko }
148a2c472e7SAleksandr Rybalko 
149a2c472e7SAleksandr Rybalko static int
1504dbbaf20SIan Lepore imx_wdog_intr(void *arg)
1514dbbaf20SIan Lepore {
1524dbbaf20SIan Lepore 	struct imx_wdog_softc *sc = arg;
1534dbbaf20SIan Lepore 
1544dbbaf20SIan Lepore 	/*
1554dbbaf20SIan Lepore 	 * When configured for external reset, the actual reset is supposed to
1564dbbaf20SIan Lepore 	 * happen when some external device responds to the assertion of the
1574dbbaf20SIan Lepore 	 * WDOG_B signal by asserting the POR signal to the chip.  This
1584dbbaf20SIan Lepore 	 * interrupt handler is a backstop mechanism; it is set up to fire
1594dbbaf20SIan Lepore 	 * simultaneously with WDOG_B, and if the external reset happens we'll
1604dbbaf20SIan Lepore 	 * never actually make it to here.  If we do make it here, just trigger
1614dbbaf20SIan Lepore 	 * a software reset.  That code will see that external reset is
1624dbbaf20SIan Lepore 	 * configured, and it will wait for 1 second for it to take effect, then
1634dbbaf20SIan Lepore 	 * it will do a software reset as a fallback.
1644dbbaf20SIan Lepore 	 */
1654dbbaf20SIan Lepore 	imx_wdog_cpu_reset(BUS_SPACE_PHYSADDR(sc->sc_res[MEMRES], WDOG_CR_REG));
1664dbbaf20SIan Lepore 
1674dbbaf20SIan Lepore 	return (FILTER_HANDLED); /* unreached */
1684dbbaf20SIan Lepore }
1694dbbaf20SIan Lepore 
1704dbbaf20SIan Lepore static int
171a2c472e7SAleksandr Rybalko imx_wdog_probe(device_t dev)
172a2c472e7SAleksandr Rybalko {
173a2c472e7SAleksandr Rybalko 
174add35ed5SIan Lepore 	if (!ofw_bus_status_okay(dev))
175add35ed5SIan Lepore 		return (ENXIO);
176add35ed5SIan Lepore 
177398c1838SIan Lepore 	if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
178a2c472e7SAleksandr Rybalko 		return (ENXIO);
179a2c472e7SAleksandr Rybalko 
180398c1838SIan Lepore 	device_set_desc(dev, "Freescale i.MX Watchdog");
181a2c472e7SAleksandr Rybalko 	return (0);
182a2c472e7SAleksandr Rybalko }
183a2c472e7SAleksandr Rybalko 
184a2c472e7SAleksandr Rybalko static int
185a2c472e7SAleksandr Rybalko imx_wdog_attach(device_t dev)
186a2c472e7SAleksandr Rybalko {
187a2c472e7SAleksandr Rybalko 	struct imx_wdog_softc *sc;
188*31ff8defSIan Lepore 	pcell_t timeout;
189a2c472e7SAleksandr Rybalko 
190a2c472e7SAleksandr Rybalko 	sc = device_get_softc(dev);
191a2c472e7SAleksandr Rybalko 	sc->sc_dev = dev;
192a2c472e7SAleksandr Rybalko 
193a2c472e7SAleksandr Rybalko 	if (bus_alloc_resources(dev, imx_wdog_spec, sc->sc_res)) {
194a2c472e7SAleksandr Rybalko 		device_printf(dev, "could not allocate resources\n");
195a2c472e7SAleksandr Rybalko 		return (ENXIO);
196a2c472e7SAleksandr Rybalko 	}
197a2c472e7SAleksandr Rybalko 
198a2c472e7SAleksandr Rybalko 	mtx_init(&sc->sc_mtx, device_get_nameunit(dev), "imx_wdt", MTX_DEF);
199a2c472e7SAleksandr Rybalko 
2004dbbaf20SIan Lepore 	/*
2014dbbaf20SIan Lepore 	 * If we're configured to assert an external reset signal, set up the
2024dbbaf20SIan Lepore 	 * hardware to do so, and install an interrupt handler whose only
2034dbbaf20SIan Lepore 	 * purpose is to backstop the external reset.  Don't worry if the
2044dbbaf20SIan Lepore 	 * interrupt setup fails, since it's only a backstop measure.
2054dbbaf20SIan Lepore 	 */
2064dbbaf20SIan Lepore 	if (ofw_bus_has_prop(sc->sc_dev, "fsl,ext-reset-output")) {
2074dbbaf20SIan Lepore 		WR2(sc, WDOG_CR_REG, WDOG_CR_WDT | RD2(sc, WDOG_CR_REG));
2084dbbaf20SIan Lepore 		bus_setup_intr(sc->sc_dev, sc->sc_res[IRQRES],
2094dbbaf20SIan Lepore 		    INTR_TYPE_MISC | INTR_MPSAFE, imx_wdog_intr, NULL, sc,
2104dbbaf20SIan Lepore 		    &sc->sc_ih);
2114dbbaf20SIan Lepore 		WR2(sc, WDOG_ICR_REG, WDOG_ICR_WIE); /* Enable, count is 0. */
2124dbbaf20SIan Lepore 	}
2134dbbaf20SIan Lepore 
2144dbbaf20SIan Lepore 	/*
2154dbbaf20SIan Lepore 	 * Note whether the rom-boot so-called "power-down" watchdog is active,
2164dbbaf20SIan Lepore 	 * so we can disable it when the regular watchdog is first enabled.
2174dbbaf20SIan Lepore 	 */
2184dbbaf20SIan Lepore 	if (RD2(sc, WDOG_MCR_REG) & WDOG_MCR_PDE)
2194dbbaf20SIan Lepore 		sc->sc_pde_enabled = true;
220a2c472e7SAleksandr Rybalko 
221a2c472e7SAleksandr Rybalko 	EVENTHANDLER_REGISTER(watchdog_list, imx_watchdog, sc, 0);
2222b352b73SIan Lepore 
223*31ff8defSIan Lepore 	/* If there is a timeout-sec property, activate the watchdog. */
224*31ff8defSIan Lepore 	if (OF_getencprop(ofw_bus_get_node(sc->sc_dev), "timeout-sec",
225*31ff8defSIan Lepore 	    &timeout, sizeof(timeout)) == sizeof(timeout)) {
226*31ff8defSIan Lepore 		if (timeout < 1 || timeout > 128) {
227*31ff8defSIan Lepore 			device_printf(sc->sc_dev, "ERROR: bad timeout-sec "
228*31ff8defSIan Lepore 			    "property value %u, using 128\n", timeout);
229*31ff8defSIan Lepore 			timeout = 128;
230*31ff8defSIan Lepore 		}
231*31ff8defSIan Lepore 		imx_wdog_enable(sc, timeout);
232*31ff8defSIan Lepore 		device_printf(sc->sc_dev, "watchdog enabled using "
233*31ff8defSIan Lepore 		    "timeout-sec property value %u\n", timeout);
234*31ff8defSIan Lepore 	}
235*31ff8defSIan Lepore 
2362b352b73SIan Lepore 	/*
2372b352b73SIan Lepore 	 * The watchdog hardware cannot be disabled, so there's little point in
2382b352b73SIan Lepore 	 * coding up a detach() routine to carefully tear everything down, just
2392b352b73SIan Lepore 	 * make the device busy so that detach can't happen.
2402b352b73SIan Lepore 	 */
2412b352b73SIan Lepore 	device_busy(sc->sc_dev);
242a2c472e7SAleksandr Rybalko 	return (0);
243a2c472e7SAleksandr Rybalko }
24476ecefceSIan Lepore 
24576ecefceSIan Lepore static device_method_t imx_wdog_methods[] = {
24676ecefceSIan Lepore 	DEVMETHOD(device_probe,		imx_wdog_probe),
24776ecefceSIan Lepore 	DEVMETHOD(device_attach,	imx_wdog_attach),
24876ecefceSIan Lepore 	DEVMETHOD_END
24976ecefceSIan Lepore };
25076ecefceSIan Lepore 
25176ecefceSIan Lepore static driver_t imx_wdog_driver = {
25276ecefceSIan Lepore 	"imx_wdog",
25376ecefceSIan Lepore 	imx_wdog_methods,
25476ecefceSIan Lepore 	sizeof(struct imx_wdog_softc),
25576ecefceSIan Lepore };
25676ecefceSIan Lepore 
25776ecefceSIan Lepore static devclass_t imx_wdog_devclass;
25876ecefceSIan Lepore 
259*31ff8defSIan Lepore EARLY_DRIVER_MODULE(imx_wdog, simplebus, imx_wdog_driver,
260*31ff8defSIan Lepore     imx_wdog_devclass, 0, 0, BUS_PASS_TIMER);
2612b352b73SIan Lepore SIMPLEBUS_PNP_INFO(compat_data);
262