1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2013 Ian Lepore <ian@freebsd.org> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include "opt_platform.h" 30 31 #include <sys/cdefs.h> 32 __FBSDID("$FreeBSD$"); 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/bus.h> 37 #include <sys/reboot.h> 38 #include <sys/devmap.h> 39 40 #include <vm/vm.h> 41 42 #include <machine/bus.h> 43 #include <machine/intr.h> 44 #include <machine/machdep.h> 45 #include <machine/platformvar.h> 46 47 #include <arm/arm/mpcore_timervar.h> 48 #include <arm/freescale/imx/imx6_anatopreg.h> 49 #include <arm/freescale/imx/imx6_anatopvar.h> 50 #include <arm/freescale/imx/imx_machdep.h> 51 52 #include <dev/fdt/fdt_common.h> 53 #include <dev/ofw/openfirm.h> 54 55 #include <arm/freescale/imx/imx6_machdep.h> 56 57 #include "platform_if.h" 58 #include "platform_pl310_if.h" 59 60 static platform_attach_t imx6_attach; 61 static platform_devmap_init_t imx6_devmap_init; 62 static platform_late_init_t imx6_late_init; 63 static platform_cpu_reset_t imx6_cpu_reset; 64 65 /* 66 * Fix FDT data related to interrupts. 67 * 68 * Driven by the needs of linux and its drivers (as always), the published FDT 69 * data for imx6 now sets the interrupt parent for most devices to the GPC 70 * interrupt controller, which is for use when the chip is in deep-sleep mode. 71 * We don't support deep sleep or have a GPC-PIC driver; we need all interrupts 72 * to be handled by the GIC. 73 * 74 * Luckily, the change to the FDT data was to assign the GPC as the interrupt 75 * parent for the soc node and letting that get inherited by all other devices 76 * (except a few that directly name GIC as their interrupt parent). So we can 77 * set the world right by just changing the interrupt-parent property of the soc 78 * node to refer to GIC instead of GPC. This will get us by until we write our 79 * own GPC driver (or until linux changes its mind and the FDT data again). 80 * 81 * We validate that we have data that looks like we expect before changing it: 82 * - SOC node exists and has GPC as its interrupt parent. 83 * - GPC node exists and has GIC as its interrupt parent. 84 * - GIC node exists and is its own interrupt parent or has no parent. 85 * 86 * This applies to all models of imx6. Luckily all of them have the devices 87 * involved at the same addresses on the same buses, so we don't need any 88 * per-soc logic. We handle this at platform attach time rather than via the 89 * fdt_fixup_table, because the latter requires matching on the FDT "model" 90 * property, and this applies to all boards including those not yet invented. 91 */ 92 static void 93 fix_fdt_interrupt_data(void) 94 { 95 phandle_t gicipar, gicnode, gicxref; 96 phandle_t gpcipar, gpcnode, gpcxref; 97 phandle_t socipar, socnode; 98 int result; 99 100 socnode = OF_finddevice("/soc"); 101 if (socnode == -1) 102 return; 103 result = OF_getencprop(socnode, "interrupt-parent", &socipar, 104 sizeof(socipar)); 105 if (result <= 0) 106 return; 107 108 /* GIC node may be child of soc node, or appear directly at root. */ 109 gicnode = OF_finddevice("/soc/interrupt-controller@00a01000"); 110 if (gicnode == -1) { 111 gicnode = OF_finddevice("/interrupt-controller@00a01000"); 112 if (gicnode == -1) 113 return; 114 } 115 gicxref = OF_xref_from_node(gicnode); 116 117 /* If gic node has no parent, pretend it is its own parent. */ 118 result = OF_getencprop(gicnode, "interrupt-parent", &gicipar, 119 sizeof(gicipar)); 120 if (result <= 0) 121 gicipar = gicxref; 122 123 gpcnode = OF_finddevice("/soc/aips-bus@02000000/gpc@020dc000"); 124 if (gpcnode == -1) 125 return; 126 result = OF_getencprop(gpcnode, "interrupt-parent", &gpcipar, 127 sizeof(gpcipar)); 128 if (result <= 0) 129 return; 130 gpcxref = OF_xref_from_node(gpcnode); 131 132 if (socipar != gpcxref || gpcipar != gicxref || gicipar != gicxref) 133 return; 134 135 gicxref = cpu_to_fdt32(gicxref); 136 OF_setprop(socnode, "interrupt-parent", &gicxref, sizeof(gicxref)); 137 } 138 139 static int 140 imx6_attach(platform_t plat) 141 { 142 143 /* Fix soc interrupt-parent property. */ 144 fix_fdt_interrupt_data(); 145 146 /* Inform the MPCore timer driver that its clock is variable. */ 147 arm_tmr_change_frequency(ARM_TMR_FREQUENCY_VARIES); 148 149 return (0); 150 } 151 152 static void 153 imx6_late_init(platform_t plat) 154 { 155 const uint32_t IMX6_WDOG_SR_PHYS = 0x020bc004; 156 157 imx_wdog_init_last_reset(IMX6_WDOG_SR_PHYS); 158 } 159 160 /* 161 * Set up static device mappings. 162 * 163 * This attempts to cover the most-used devices with 1MB section mappings, which 164 * is good for performance (uses fewer TLB entries for device access). 165 * 166 * ARMMP covers the interrupt controller, MPCore timers, global timer, and the 167 * L2 cache controller. Most of the 1MB range is unused reserved space. 168 * 169 * AIPS1/AIPS2 cover most of the on-chip devices such as uart, spi, i2c, etc. 170 * 171 * Notably not mapped right now are HDMI, GPU, and other devices below ARMMP in 172 * the memory map. When we get support for graphics it might make sense to 173 * static map some of that area. Be careful with other things in that area such 174 * as OCRAM that probably shouldn't be mapped as VM_MEMATTR_DEVICE memory. 175 */ 176 static int 177 imx6_devmap_init(platform_t plat) 178 { 179 const uint32_t IMX6_ARMMP_PHYS = 0x00a00000; 180 const uint32_t IMX6_ARMMP_SIZE = 0x00100000; 181 const uint32_t IMX6_AIPS1_PHYS = 0x02000000; 182 const uint32_t IMX6_AIPS1_SIZE = 0x00100000; 183 const uint32_t IMX6_AIPS2_PHYS = 0x02100000; 184 const uint32_t IMX6_AIPS2_SIZE = 0x00100000; 185 186 devmap_add_entry(IMX6_ARMMP_PHYS, IMX6_ARMMP_SIZE); 187 devmap_add_entry(IMX6_AIPS1_PHYS, IMX6_AIPS1_SIZE); 188 devmap_add_entry(IMX6_AIPS2_PHYS, IMX6_AIPS2_SIZE); 189 190 return (0); 191 } 192 193 static void 194 imx6_cpu_reset(platform_t plat) 195 { 196 const uint32_t IMX6_WDOG_CR_PHYS = 0x020bc000; 197 198 imx_wdog_cpu_reset(IMX6_WDOG_CR_PHYS); 199 } 200 201 /* 202 * Determine what flavor of imx6 we're running on. 203 * 204 * This code is based on the way u-boot does it. Information found on the web 205 * indicates that Freescale themselves were the original source of this logic, 206 * including the strange check for number of CPUs in the SCU configuration 207 * register, which is apparently needed on some revisions of the SOLO. 208 * 209 * According to the documentation, there is such a thing as an i.MX6 Dual 210 * (non-lite flavor). However, Freescale doesn't seem to have assigned it a 211 * number or provided any logic to handle it in their detection code. 212 * 213 * Note that the ANALOG_DIGPROG and SCU configuration registers are not 214 * documented in the chip reference manual. (SCU configuration is mentioned, 215 * but not mapped out in detail.) I think the bottom two bits of the scu config 216 * register may be ncpu-1. 217 * 218 * This hasn't been tested yet on a dual[-lite]. 219 * 220 * On a solo: 221 * digprog = 0x00610001 222 * hwsoc = 0x00000062 223 * scu config = 0x00000500 224 * On a quad: 225 * digprog = 0x00630002 226 * hwsoc = 0x00000063 227 * scu config = 0x00005503 228 */ 229 u_int 230 imx_soc_type(void) 231 { 232 uint32_t digprog, hwsoc; 233 uint32_t *pcr; 234 static u_int soctype; 235 const vm_offset_t SCU_CONFIG_PHYSADDR = 0x00a00004; 236 #define HWSOC_MX6SL 0x60 237 #define HWSOC_MX6DL 0x61 238 #define HWSOC_MX6SOLO 0x62 239 #define HWSOC_MX6Q 0x63 240 #define HWSOC_MX6UL 0x64 241 242 if (soctype != 0) 243 return (soctype); 244 245 digprog = imx6_anatop_read_4(IMX6_ANALOG_DIGPROG_SL); 246 hwsoc = (digprog >> IMX6_ANALOG_DIGPROG_SOCTYPE_SHIFT) & 247 IMX6_ANALOG_DIGPROG_SOCTYPE_MASK; 248 249 if (hwsoc != HWSOC_MX6SL) { 250 digprog = imx6_anatop_read_4(IMX6_ANALOG_DIGPROG); 251 hwsoc = (digprog & IMX6_ANALOG_DIGPROG_SOCTYPE_MASK) >> 252 IMX6_ANALOG_DIGPROG_SOCTYPE_SHIFT; 253 /*printf("digprog = 0x%08x\n", digprog);*/ 254 if (hwsoc == HWSOC_MX6DL) { 255 pcr = devmap_ptov(SCU_CONFIG_PHYSADDR, 4); 256 if (pcr != NULL) { 257 /*printf("scu config = 0x%08x\n", *pcr);*/ 258 if ((*pcr & 0x03) == 0) { 259 hwsoc = HWSOC_MX6SOLO; 260 } 261 } 262 } 263 } 264 /* printf("hwsoc 0x%08x\n", hwsoc); */ 265 266 switch (hwsoc) { 267 case HWSOC_MX6SL: 268 soctype = IMXSOC_6SL; 269 break; 270 case HWSOC_MX6SOLO: 271 soctype = IMXSOC_6S; 272 break; 273 case HWSOC_MX6DL: 274 soctype = IMXSOC_6DL; 275 break; 276 case HWSOC_MX6Q : 277 soctype = IMXSOC_6Q; 278 break; 279 case HWSOC_MX6UL: 280 soctype = IMXSOC_6UL; 281 break; 282 default: 283 printf("imx_soc_type: Don't understand hwsoc 0x%02x, " 284 "digprog 0x%08x; assuming IMXSOC_6Q\n", hwsoc, digprog); 285 soctype = IMXSOC_6Q; 286 break; 287 } 288 289 return (soctype); 290 } 291 292 /* 293 * Early putc routine for EARLY_PRINTF support. To use, add to kernel config: 294 * option SOCDEV_PA=0x02000000 295 * option SOCDEV_VA=0x02000000 296 * option EARLY_PRINTF 297 * Resist the temptation to change the #if 0 to #ifdef EARLY_PRINTF here. It 298 * makes sense now, but if multiple SOCs do that it will make early_putc another 299 * duplicate symbol to be eliminated on the path to a generic kernel. 300 */ 301 #if 0 302 static void 303 imx6_early_putc(int c) 304 { 305 volatile uint32_t * UART_STAT_REG = (uint32_t *)0x02020098; 306 volatile uint32_t * UART_TX_REG = (uint32_t *)0x02020040; 307 const uint32_t UART_TXRDY = (1 << 3); 308 309 while ((*UART_STAT_REG & UART_TXRDY) == 0) 310 continue; 311 *UART_TX_REG = c; 312 } 313 early_putc_t *early_putc = imx6_early_putc; 314 #endif 315 316 static platform_method_t imx6_methods[] = { 317 PLATFORMMETHOD(platform_attach, imx6_attach), 318 PLATFORMMETHOD(platform_devmap_init, imx6_devmap_init), 319 PLATFORMMETHOD(platform_late_init, imx6_late_init), 320 PLATFORMMETHOD(platform_cpu_reset, imx6_cpu_reset), 321 322 #ifdef SMP 323 PLATFORMMETHOD(platform_mp_start_ap, imx6_mp_start_ap), 324 PLATFORMMETHOD(platform_mp_setmaxid, imx6_mp_setmaxid), 325 #endif 326 327 PLATFORMMETHOD(platform_pl310_init, imx6_pl310_init), 328 329 PLATFORMMETHOD_END, 330 }; 331 332 FDT_PLATFORM_DEF2(imx6, imx6s, "i.MX6 Solo", 0, "fsl,imx6s", 80); 333 FDT_PLATFORM_DEF2(imx6, imx6d, "i.MX6 Dual", 0, "fsl,imx6dl", 80); 334 FDT_PLATFORM_DEF2(imx6, imx6q, "i.MX6 Quad", 0, "fsl,imx6q", 80); 335 FDT_PLATFORM_DEF2(imx6, imx6ul, "i.MX6 UltraLite", 0, "fsl,imx6ul", 67); 336