1 /*- 2 * Copyright (c) 2013 Ian Lepore <ian@freebsd.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 #include "opt_platform.h" 28 29 #include <sys/cdefs.h> 30 __FBSDID("$FreeBSD$"); 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/bus.h> 35 #include <sys/reboot.h> 36 #include <sys/devmap.h> 37 38 #include <vm/vm.h> 39 40 #include <machine/bus.h> 41 #include <machine/intr.h> 42 #include <machine/machdep.h> 43 #include <machine/platformvar.h> 44 45 #include <arm/arm/mpcore_timervar.h> 46 #include <arm/freescale/imx/imx6_anatopreg.h> 47 #include <arm/freescale/imx/imx6_anatopvar.h> 48 #include <arm/freescale/imx/imx_machdep.h> 49 50 #include <dev/fdt/fdt_common.h> 51 #include <dev/ofw/openfirm.h> 52 53 #include <arm/freescale/imx/imx6_machdep.h> 54 55 #include "platform_if.h" 56 #include "platform_pl310_if.h" 57 58 static platform_attach_t imx6_attach; 59 static platform_devmap_init_t imx6_devmap_init; 60 static platform_late_init_t imx6_late_init; 61 static platform_cpu_reset_t imx6_cpu_reset; 62 63 /* 64 * Fix FDT data related to interrupts. 65 * 66 * Driven by the needs of linux and its drivers (as always), the published FDT 67 * data for imx6 now sets the interrupt parent for most devices to the GPC 68 * interrupt controller, which is for use when the chip is in deep-sleep mode. 69 * We don't support deep sleep or have a GPC-PIC driver; we need all interrupts 70 * to be handled by the GIC. 71 * 72 * Luckily, the change to the FDT data was to assign the GPC as the interrupt 73 * parent for the soc node and letting that get inherited by all other devices 74 * (except a few that directly name GIC as their interrupt parent). So we can 75 * set the world right by just changing the interrupt-parent property of the soc 76 * node to refer to GIC instead of GPC. This will get us by until we write our 77 * own GPC driver (or until linux changes its mind and the FDT data again). 78 * 79 * We validate that we have data that looks like we expect before changing it: 80 * - SOC node exists and has GPC as its interrupt parent. 81 * - GPC node exists and has GIC as its interrupt parent. 82 * - GIC node exists and is its own interrupt parent or has no parent. 83 * 84 * This applies to all models of imx6. Luckily all of them have the devices 85 * involved at the same addresses on the same buses, so we don't need any 86 * per-soc logic. We handle this at platform attach time rather than via the 87 * fdt_fixup_table, because the latter requires matching on the FDT "model" 88 * property, and this applies to all boards including those not yet invented. 89 */ 90 static void 91 fix_fdt_interrupt_data(void) 92 { 93 phandle_t gicipar, gicnode, gicxref; 94 phandle_t gpcipar, gpcnode, gpcxref; 95 phandle_t socipar, socnode; 96 int result; 97 98 socnode = OF_finddevice("/soc"); 99 if (socnode == -1) 100 return; 101 result = OF_getencprop(socnode, "interrupt-parent", &socipar, 102 sizeof(socipar)); 103 if (result <= 0) 104 return; 105 106 /* GIC node may be child of soc node, or appear directly at root. */ 107 gicnode = OF_finddevice("/soc/interrupt-controller@00a01000"); 108 if (gicnode == -1) { 109 gicnode = OF_finddevice("/interrupt-controller@00a01000"); 110 if (gicnode == -1) 111 return; 112 } 113 gicxref = OF_xref_from_node(gicnode); 114 115 /* If gic node has no parent, pretend it is its own parent. */ 116 result = OF_getencprop(gicnode, "interrupt-parent", &gicipar, 117 sizeof(gicipar)); 118 if (result <= 0) 119 gicipar = gicxref; 120 121 gpcnode = OF_finddevice("/soc/aips-bus@02000000/gpc@020dc000"); 122 if (gpcnode == -1) 123 return; 124 result = OF_getencprop(gpcnode, "interrupt-parent", &gpcipar, 125 sizeof(gpcipar)); 126 if (result <= 0) 127 return; 128 gpcxref = OF_xref_from_node(gpcnode); 129 130 if (socipar != gpcxref || gpcipar != gicxref || gicipar != gicxref) 131 return; 132 133 gicxref = cpu_to_fdt32(gicxref); 134 OF_setprop(socnode, "interrupt-parent", &gicxref, sizeof(gicxref)); 135 } 136 137 static int 138 imx6_attach(platform_t plat) 139 { 140 141 /* Fix soc interrupt-parent property. */ 142 fix_fdt_interrupt_data(); 143 144 /* Inform the MPCore timer driver that its clock is variable. */ 145 arm_tmr_change_frequency(ARM_TMR_FREQUENCY_VARIES); 146 147 return (0); 148 } 149 150 static void 151 imx6_late_init(platform_t plat) 152 { 153 const uint32_t IMX6_WDOG_SR_PHYS = 0x020bc004; 154 155 imx_wdog_init_last_reset(IMX6_WDOG_SR_PHYS); 156 } 157 158 /* 159 * Set up static device mappings. 160 * 161 * This attempts to cover the most-used devices with 1MB section mappings, which 162 * is good for performance (uses fewer TLB entries for device access). 163 * 164 * ARMMP covers the interrupt controller, MPCore timers, global timer, and the 165 * L2 cache controller. Most of the 1MB range is unused reserved space. 166 * 167 * AIPS1/AIPS2 cover most of the on-chip devices such as uart, spi, i2c, etc. 168 * 169 * Notably not mapped right now are HDMI, GPU, and other devices below ARMMP in 170 * the memory map. When we get support for graphics it might make sense to 171 * static map some of that area. Be careful with other things in that area such 172 * as OCRAM that probably shouldn't be mapped as VM_MEMATTR_DEVICE memory. 173 */ 174 static int 175 imx6_devmap_init(platform_t plat) 176 { 177 const uint32_t IMX6_ARMMP_PHYS = 0x00a00000; 178 const uint32_t IMX6_ARMMP_SIZE = 0x00100000; 179 const uint32_t IMX6_AIPS1_PHYS = 0x02000000; 180 const uint32_t IMX6_AIPS1_SIZE = 0x00100000; 181 const uint32_t IMX6_AIPS2_PHYS = 0x02100000; 182 const uint32_t IMX6_AIPS2_SIZE = 0x00100000; 183 184 devmap_add_entry(IMX6_ARMMP_PHYS, IMX6_ARMMP_SIZE); 185 devmap_add_entry(IMX6_AIPS1_PHYS, IMX6_AIPS1_SIZE); 186 devmap_add_entry(IMX6_AIPS2_PHYS, IMX6_AIPS2_SIZE); 187 188 return (0); 189 } 190 191 static void 192 imx6_cpu_reset(platform_t plat) 193 { 194 const uint32_t IMX6_WDOG_CR_PHYS = 0x020bc000; 195 196 imx_wdog_cpu_reset(IMX6_WDOG_CR_PHYS); 197 } 198 199 /* 200 * Determine what flavor of imx6 we're running on. 201 * 202 * This code is based on the way u-boot does it. Information found on the web 203 * indicates that Freescale themselves were the original source of this logic, 204 * including the strange check for number of CPUs in the SCU configuration 205 * register, which is apparently needed on some revisions of the SOLO. 206 * 207 * According to the documentation, there is such a thing as an i.MX6 Dual 208 * (non-lite flavor). However, Freescale doesn't seem to have assigned it a 209 * number or provided any logic to handle it in their detection code. 210 * 211 * Note that the ANALOG_DIGPROG and SCU configuration registers are not 212 * documented in the chip reference manual. (SCU configuration is mentioned, 213 * but not mapped out in detail.) I think the bottom two bits of the scu config 214 * register may be ncpu-1. 215 * 216 * This hasn't been tested yet on a dual[-lite]. 217 * 218 * On a solo: 219 * digprog = 0x00610001 220 * hwsoc = 0x00000062 221 * scu config = 0x00000500 222 * On a quad: 223 * digprog = 0x00630002 224 * hwsoc = 0x00000063 225 * scu config = 0x00005503 226 */ 227 u_int 228 imx_soc_type(void) 229 { 230 uint32_t digprog, hwsoc; 231 uint32_t *pcr; 232 static u_int soctype; 233 const vm_offset_t SCU_CONFIG_PHYSADDR = 0x00a00004; 234 #define HWSOC_MX6SL 0x60 235 #define HWSOC_MX6DL 0x61 236 #define HWSOC_MX6SOLO 0x62 237 #define HWSOC_MX6Q 0x63 238 #define HWSOC_MX6UL 0x64 239 240 if (soctype != 0) 241 return (soctype); 242 243 digprog = imx6_anatop_read_4(IMX6_ANALOG_DIGPROG_SL); 244 hwsoc = (digprog >> IMX6_ANALOG_DIGPROG_SOCTYPE_SHIFT) & 245 IMX6_ANALOG_DIGPROG_SOCTYPE_MASK; 246 247 if (hwsoc != HWSOC_MX6SL) { 248 digprog = imx6_anatop_read_4(IMX6_ANALOG_DIGPROG); 249 hwsoc = (digprog & IMX6_ANALOG_DIGPROG_SOCTYPE_MASK) >> 250 IMX6_ANALOG_DIGPROG_SOCTYPE_SHIFT; 251 /*printf("digprog = 0x%08x\n", digprog);*/ 252 if (hwsoc == HWSOC_MX6DL) { 253 pcr = devmap_ptov(SCU_CONFIG_PHYSADDR, 4); 254 if (pcr != NULL) { 255 /*printf("scu config = 0x%08x\n", *pcr);*/ 256 if ((*pcr & 0x03) == 0) { 257 hwsoc = HWSOC_MX6SOLO; 258 } 259 } 260 } 261 } 262 /* printf("hwsoc 0x%08x\n", hwsoc); */ 263 264 switch (hwsoc) { 265 case HWSOC_MX6SL: 266 soctype = IMXSOC_6SL; 267 break; 268 case HWSOC_MX6SOLO: 269 soctype = IMXSOC_6S; 270 break; 271 case HWSOC_MX6DL: 272 soctype = IMXSOC_6DL; 273 break; 274 case HWSOC_MX6Q : 275 soctype = IMXSOC_6Q; 276 break; 277 case HWSOC_MX6UL: 278 soctype = IMXSOC_6UL; 279 break; 280 default: 281 printf("imx_soc_type: Don't understand hwsoc 0x%02x, " 282 "digprog 0x%08x; assuming IMXSOC_6Q\n", hwsoc, digprog); 283 soctype = IMXSOC_6Q; 284 break; 285 } 286 287 return (soctype); 288 } 289 290 /* 291 * Early putc routine for EARLY_PRINTF support. To use, add to kernel config: 292 * option SOCDEV_PA=0x02000000 293 * option SOCDEV_VA=0x02000000 294 * option EARLY_PRINTF 295 * Resist the temptation to change the #if 0 to #ifdef EARLY_PRINTF here. It 296 * makes sense now, but if multiple SOCs do that it will make early_putc another 297 * duplicate symbol to be eliminated on the path to a generic kernel. 298 */ 299 #if 0 300 static void 301 imx6_early_putc(int c) 302 { 303 volatile uint32_t * UART_STAT_REG = (uint32_t *)0x02020098; 304 volatile uint32_t * UART_TX_REG = (uint32_t *)0x02020040; 305 const uint32_t UART_TXRDY = (1 << 3); 306 307 while ((*UART_STAT_REG & UART_TXRDY) == 0) 308 continue; 309 *UART_TX_REG = c; 310 } 311 early_putc_t *early_putc = imx6_early_putc; 312 #endif 313 314 static platform_method_t imx6_methods[] = { 315 PLATFORMMETHOD(platform_attach, imx6_attach), 316 PLATFORMMETHOD(platform_devmap_init, imx6_devmap_init), 317 PLATFORMMETHOD(platform_late_init, imx6_late_init), 318 PLATFORMMETHOD(platform_cpu_reset, imx6_cpu_reset), 319 320 #ifdef SMP 321 PLATFORMMETHOD(platform_mp_start_ap, imx6_mp_start_ap), 322 PLATFORMMETHOD(platform_mp_setmaxid, imx6_mp_setmaxid), 323 #endif 324 325 PLATFORMMETHOD(platform_pl310_init, imx6_pl310_init), 326 327 PLATFORMMETHOD_END, 328 }; 329 330 FDT_PLATFORM_DEF2(imx6, imx6s, "i.MX6 Solo", 0, "fsl,imx6s", 80); 331 FDT_PLATFORM_DEF2(imx6, imx6d, "i.MX6 Dual", 0, "fsl,imx6dl", 80); 332 FDT_PLATFORM_DEF2(imx6, imx6q, "i.MX6 Quad", 0, "fsl,imx6q", 80); 333 FDT_PLATFORM_DEF2(imx6, imx6ul, "i.MX6 UltraLite", 0, "fsl,imx6ul", 67); 334