xref: /freebsd/sys/arm/freescale/imx/imx6_machdep.c (revision 5fdc7f7e8f63192353cd0f524fddd2fd69710107)
1034e9ed6SIan Lepore /*-
2034e9ed6SIan Lepore  * Copyright (c) 2013 Ian Lepore <ian@freebsd.org>
3034e9ed6SIan Lepore  * All rights reserved.
4034e9ed6SIan Lepore  *
5034e9ed6SIan Lepore  * Redistribution and use in source and binary forms, with or without
6034e9ed6SIan Lepore  * modification, are permitted provided that the following conditions
7034e9ed6SIan Lepore  * are met:
8034e9ed6SIan Lepore  * 1. Redistributions of source code must retain the above copyright
9034e9ed6SIan Lepore  *    notice, this list of conditions and the following disclaimer.
10034e9ed6SIan Lepore  * 2. Redistributions in binary form must reproduce the above copyright
11034e9ed6SIan Lepore  *    notice, this list of conditions and the following disclaimer in the
12034e9ed6SIan Lepore  *    documentation and/or other materials provided with the distribution.
13034e9ed6SIan Lepore  *
14034e9ed6SIan Lepore  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15034e9ed6SIan Lepore  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16034e9ed6SIan Lepore  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17034e9ed6SIan Lepore  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18034e9ed6SIan Lepore  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19034e9ed6SIan Lepore  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20034e9ed6SIan Lepore  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21034e9ed6SIan Lepore  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22034e9ed6SIan Lepore  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23034e9ed6SIan Lepore  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24034e9ed6SIan Lepore  * SUCH DAMAGE.
25034e9ed6SIan Lepore  */
26034e9ed6SIan Lepore 
27034e9ed6SIan Lepore #include "opt_platform.h"
28034e9ed6SIan Lepore 
29034e9ed6SIan Lepore #include <sys/cdefs.h>
30034e9ed6SIan Lepore __FBSDID("$FreeBSD$");
31034e9ed6SIan Lepore 
32034e9ed6SIan Lepore #include <sys/param.h>
33034e9ed6SIan Lepore #include <sys/systm.h>
34034e9ed6SIan Lepore #include <sys/bus.h>
35034e9ed6SIan Lepore #include <sys/reboot.h>
36034e9ed6SIan Lepore 
37034e9ed6SIan Lepore #include <vm/vm.h>
3813a98c85SIan Lepore 
3913a98c85SIan Lepore #include <machine/bus.h>
4013a98c85SIan Lepore #include <machine/devmap.h>
4181acdf3fSIan Lepore #include <machine/machdep.h>
4227521ff8SAndrew Turner #include <machine/platform.h>
4313a98c85SIan Lepore 
44a3ff7ef6SIan Lepore #include <arm/arm/mpcore_timervar.h>
45034e9ed6SIan Lepore #include <arm/freescale/imx/imx6_anatopreg.h>
46034e9ed6SIan Lepore #include <arm/freescale/imx/imx6_anatopvar.h>
47034e9ed6SIan Lepore #include <arm/freescale/imx/imx_machdep.h>
48034e9ed6SIan Lepore 
4981acdf3fSIan Lepore vm_offset_t
5027521ff8SAndrew Turner platform_lastaddr(void)
5181acdf3fSIan Lepore {
5281acdf3fSIan Lepore 
5381acdf3fSIan Lepore 	return (arm_devmap_lastaddr());
5481acdf3fSIan Lepore }
5581acdf3fSIan Lepore 
5681acdf3fSIan Lepore void
5727521ff8SAndrew Turner platform_probe_and_attach(void)
5881acdf3fSIan Lepore {
5981acdf3fSIan Lepore 
60a3ff7ef6SIan Lepore 	/* Inform the MPCore timer driver that its clock is variable. */
61a3ff7ef6SIan Lepore 	arm_tmr_change_frequency(ARM_TMR_FREQUENCY_VARIES);
6281acdf3fSIan Lepore }
6381acdf3fSIan Lepore 
6481acdf3fSIan Lepore void
6527521ff8SAndrew Turner platform_gpio_init(void)
6681acdf3fSIan Lepore {
6781acdf3fSIan Lepore 
6881acdf3fSIan Lepore }
6981acdf3fSIan Lepore 
7081acdf3fSIan Lepore void
7127521ff8SAndrew Turner platform_late_init(void)
7281acdf3fSIan Lepore {
7381acdf3fSIan Lepore 
7481acdf3fSIan Lepore }
7581acdf3fSIan Lepore 
76034e9ed6SIan Lepore /*
7781acdf3fSIan Lepore  * Set up static device mappings.
78034e9ed6SIan Lepore  *
79034e9ed6SIan Lepore  * This attempts to cover the most-used devices with 1MB section mappings, which
80034e9ed6SIan Lepore  * is good for performance (uses fewer TLB entries for device access).
81034e9ed6SIan Lepore  *
82034e9ed6SIan Lepore  * ARMMP covers the interrupt controller, MPCore timers, global timer, and the
83034e9ed6SIan Lepore  * L2 cache controller.  Most of the 1MB range is unused reserved space.
84034e9ed6SIan Lepore  *
85034e9ed6SIan Lepore  * AIPS1/AIPS2 cover most of the on-chip devices such as uart, spi, i2c, etc.
86034e9ed6SIan Lepore  *
87034e9ed6SIan Lepore  * Notably not mapped right now are HDMI, GPU, and other devices below ARMMP in
88034e9ed6SIan Lepore  * the memory map.  When we get support for graphics it might make sense to
89034e9ed6SIan Lepore  * static map some of that area.  Be careful with other things in that area such
90034e9ed6SIan Lepore  * as OCRAM that probably shouldn't be mapped as PTE_DEVICE memory.
91034e9ed6SIan Lepore  */
9281acdf3fSIan Lepore int
9327521ff8SAndrew Turner platform_devmap_init(void)
94034e9ed6SIan Lepore {
95034e9ed6SIan Lepore 	const uint32_t IMX6_ARMMP_PHYS = 0x00a00000;
96034e9ed6SIan Lepore 	const uint32_t IMX6_ARMMP_SIZE = 0x00100000;
97034e9ed6SIan Lepore 	const uint32_t IMX6_AIPS1_PHYS = 0x02000000;
98034e9ed6SIan Lepore 	const uint32_t IMX6_AIPS1_SIZE = 0x00100000;
99034e9ed6SIan Lepore 	const uint32_t IMX6_AIPS2_PHYS = 0x02100000;
100034e9ed6SIan Lepore 	const uint32_t IMX6_AIPS2_SIZE = 0x00100000;
101034e9ed6SIan Lepore 
10281acdf3fSIan Lepore 	arm_devmap_add_entry(IMX6_ARMMP_PHYS, IMX6_ARMMP_SIZE);
10381acdf3fSIan Lepore 	arm_devmap_add_entry(IMX6_AIPS1_PHYS, IMX6_AIPS1_SIZE);
10481acdf3fSIan Lepore 	arm_devmap_add_entry(IMX6_AIPS2_PHYS, IMX6_AIPS2_SIZE);
10581acdf3fSIan Lepore 
10681acdf3fSIan Lepore 	return (0);
107034e9ed6SIan Lepore }
108034e9ed6SIan Lepore 
109034e9ed6SIan Lepore void
110034e9ed6SIan Lepore cpu_reset(void)
111034e9ed6SIan Lepore {
112034e9ed6SIan Lepore 	const uint32_t IMX6_WDOG_CR_PHYS = 0x020bc000;
113034e9ed6SIan Lepore 
114034e9ed6SIan Lepore 	imx_wdog_cpu_reset(IMX6_WDOG_CR_PHYS);
115034e9ed6SIan Lepore }
116034e9ed6SIan Lepore 
117034e9ed6SIan Lepore /*
118034e9ed6SIan Lepore  * Determine what flavor of imx6 we're running on.
119034e9ed6SIan Lepore  *
120034e9ed6SIan Lepore  * This code is based on the way u-boot does it.  Information found on the web
121034e9ed6SIan Lepore  * indicates that Freescale themselves were the original source of this logic,
122034e9ed6SIan Lepore  * including the strange check for number of CPUs in the SCU configuration
123034e9ed6SIan Lepore  * register, which is apparently needed on some revisions of the SOLO.
124034e9ed6SIan Lepore  *
125034e9ed6SIan Lepore  * According to the documentation, there is such a thing as an i.MX6 Dual
126034e9ed6SIan Lepore  * (non-lite flavor).  However, Freescale doesn't seem to have assigned it a
127034e9ed6SIan Lepore  * number or provided any logic to handle it in their detection code.
128034e9ed6SIan Lepore  *
129034e9ed6SIan Lepore  * Note that the ANALOG_DIGPROG and SCU configuration registers are not
130034e9ed6SIan Lepore  * documented in the chip reference manual.  (SCU configuration is mentioned,
131034e9ed6SIan Lepore  * but not mapped out in detail.)  I think the bottom two bits of the scu config
132034e9ed6SIan Lepore  * register may be ncpu-1.
133034e9ed6SIan Lepore  *
134034e9ed6SIan Lepore  * This hasn't been tested yet on a dual[-lite].
135034e9ed6SIan Lepore  *
136034e9ed6SIan Lepore  * On a solo:
137034e9ed6SIan Lepore  *      digprog    = 0x00610001
138034e9ed6SIan Lepore  *      hwsoc      = 0x00000062
139034e9ed6SIan Lepore  *      scu config = 0x00000500
140034e9ed6SIan Lepore  * On a quad:
141034e9ed6SIan Lepore  *      digprog    = 0x00630002
142034e9ed6SIan Lepore  *      hwsoc      = 0x00000063
143034e9ed6SIan Lepore  *      scu config = 0x00005503
144034e9ed6SIan Lepore  */
145034e9ed6SIan Lepore u_int imx_soc_type()
146034e9ed6SIan Lepore {
147034e9ed6SIan Lepore 	uint32_t digprog, hwsoc;
148034e9ed6SIan Lepore 	uint32_t *pcr;
149*5fdc7f7eSIan Lepore 	static u_int soctype;
150034e9ed6SIan Lepore 	const vm_offset_t SCU_CONFIG_PHYSADDR = 0x00a00004;
151272faa5fSIan Lepore #define	HWSOC_MX6SL	0x60
152272faa5fSIan Lepore #define	HWSOC_MX6DL	0x61
153272faa5fSIan Lepore #define	HWSOC_MX6SOLO	0x62
154272faa5fSIan Lepore #define	HWSOC_MX6Q	0x63
155034e9ed6SIan Lepore 
156*5fdc7f7eSIan Lepore 	if (soctype != 0)
157*5fdc7f7eSIan Lepore 		return (soctype);
158*5fdc7f7eSIan Lepore 
159034e9ed6SIan Lepore 	digprog = imx6_anatop_read_4(IMX6_ANALOG_DIGPROG_SL);
160034e9ed6SIan Lepore 	hwsoc = (digprog >> IMX6_ANALOG_DIGPROG_SOCTYPE_SHIFT) &
161034e9ed6SIan Lepore 	    IMX6_ANALOG_DIGPROG_SOCTYPE_MASK;
162034e9ed6SIan Lepore 
163034e9ed6SIan Lepore 	if (hwsoc != HWSOC_MX6SL) {
164034e9ed6SIan Lepore 		digprog = imx6_anatop_read_4(IMX6_ANALOG_DIGPROG);
165034e9ed6SIan Lepore 		hwsoc = (digprog & IMX6_ANALOG_DIGPROG_SOCTYPE_MASK) >>
166034e9ed6SIan Lepore 		    IMX6_ANALOG_DIGPROG_SOCTYPE_SHIFT;
167034e9ed6SIan Lepore 		/*printf("digprog = 0x%08x\n", digprog);*/
168034e9ed6SIan Lepore 		if (hwsoc == HWSOC_MX6DL) {
16913a98c85SIan Lepore 			pcr = arm_devmap_ptov(SCU_CONFIG_PHYSADDR, 4);
17013a98c85SIan Lepore 			if (pcr != NULL) {
171034e9ed6SIan Lepore 				/*printf("scu config = 0x%08x\n", *pcr);*/
172034e9ed6SIan Lepore 				if ((*pcr & 0x03) == 0) {
173034e9ed6SIan Lepore 					hwsoc = HWSOC_MX6SOLO;
174034e9ed6SIan Lepore 				}
175034e9ed6SIan Lepore 			}
176034e9ed6SIan Lepore 		}
177034e9ed6SIan Lepore 	}
178034e9ed6SIan Lepore 	/* printf("hwsoc 0x%08x\n", hwsoc); */
179034e9ed6SIan Lepore 
180034e9ed6SIan Lepore 	switch (hwsoc) {
181034e9ed6SIan Lepore 	case HWSOC_MX6SL:
182*5fdc7f7eSIan Lepore 		soctype = IMXSOC_6SL;
183*5fdc7f7eSIan Lepore 		break;
184034e9ed6SIan Lepore 	case HWSOC_MX6SOLO:
185*5fdc7f7eSIan Lepore 		soctype = IMXSOC_6S;
186*5fdc7f7eSIan Lepore 		break;
187034e9ed6SIan Lepore 	case HWSOC_MX6DL:
188*5fdc7f7eSIan Lepore 		soctype = IMXSOC_6DL;
189*5fdc7f7eSIan Lepore 		break;
190034e9ed6SIan Lepore 	case HWSOC_MX6Q :
191*5fdc7f7eSIan Lepore 		soctype = IMXSOC_6Q;
192*5fdc7f7eSIan Lepore 		break;
193034e9ed6SIan Lepore 	default:
194034e9ed6SIan Lepore 		printf("imx_soc_type: Don't understand hwsoc 0x%02x, "
195034e9ed6SIan Lepore 		    "digprog 0x%08x; assuming IMXSOC_6Q\n", hwsoc, digprog);
196*5fdc7f7eSIan Lepore 		soctype = IMXSOC_6Q;
197034e9ed6SIan Lepore 		break;
198034e9ed6SIan Lepore 	}
199034e9ed6SIan Lepore 
200*5fdc7f7eSIan Lepore 	return (soctype);
201034e9ed6SIan Lepore }
202034e9ed6SIan Lepore 
2038df34dd2SIan Lepore /*
2048df34dd2SIan Lepore  * Early putc routine for EARLY_PRINTF support.  To use, add to kernel config:
2058df34dd2SIan Lepore  *   option SOCDEV_PA=0x02000000
2068df34dd2SIan Lepore  *   option SOCDEV_VA=0x02000000
2078df34dd2SIan Lepore  *   option EARLY_PRINTF
2088df34dd2SIan Lepore  * Resist the temptation to change the #if 0 to #ifdef EARLY_PRINTF here. It
2098df34dd2SIan Lepore  * makes sense now, but if multiple SOCs do that it will make early_putc another
2108df34dd2SIan Lepore  * duplicate symbol to be eliminated on the path to a generic kernel.
2118df34dd2SIan Lepore  */
2128df34dd2SIan Lepore #if 0
2138df34dd2SIan Lepore static void
2148df34dd2SIan Lepore imx6_early_putc(int c)
2158df34dd2SIan Lepore {
2168df34dd2SIan Lepore 	volatile uint32_t * UART_STAT_REG = (uint32_t *)0x02020098;
2178df34dd2SIan Lepore 	volatile uint32_t * UART_TX_REG   = (uint32_t *)0x02020040;
2188df34dd2SIan Lepore 	const uint32_t      UART_TXRDY    = (1 << 3);
2198df34dd2SIan Lepore 
2208df34dd2SIan Lepore 	while ((*UART_STAT_REG & UART_TXRDY) == 0)
2218df34dd2SIan Lepore 		continue;
2228df34dd2SIan Lepore 	*UART_TX_REG = c;
2238df34dd2SIan Lepore }
2248df34dd2SIan Lepore early_putc_t *early_putc = imx6_early_putc;
2258df34dd2SIan Lepore #endif
2268df34dd2SIan Lepore 
227