1034e9ed6SIan Lepore /*- 2af3dc4a7SPedro F. Giffuni * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3af3dc4a7SPedro F. Giffuni * 4034e9ed6SIan Lepore * Copyright (c) 2013 Ian Lepore <ian@freebsd.org> 5034e9ed6SIan Lepore * All rights reserved. 6034e9ed6SIan Lepore * 7034e9ed6SIan Lepore * Redistribution and use in source and binary forms, with or without 8034e9ed6SIan Lepore * modification, are permitted provided that the following conditions 9034e9ed6SIan Lepore * are met: 10034e9ed6SIan Lepore * 1. Redistributions of source code must retain the above copyright 11034e9ed6SIan Lepore * notice, this list of conditions and the following disclaimer. 12034e9ed6SIan Lepore * 2. Redistributions in binary form must reproduce the above copyright 13034e9ed6SIan Lepore * notice, this list of conditions and the following disclaimer in the 14034e9ed6SIan Lepore * documentation and/or other materials provided with the distribution. 15034e9ed6SIan Lepore * 16034e9ed6SIan Lepore * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17034e9ed6SIan Lepore * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18034e9ed6SIan Lepore * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19034e9ed6SIan Lepore * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20034e9ed6SIan Lepore * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21034e9ed6SIan Lepore * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22034e9ed6SIan Lepore * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23034e9ed6SIan Lepore * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24034e9ed6SIan Lepore * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25034e9ed6SIan Lepore * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26034e9ed6SIan Lepore * SUCH DAMAGE. 27034e9ed6SIan Lepore */ 28034e9ed6SIan Lepore 29034e9ed6SIan Lepore #include "opt_platform.h" 30034e9ed6SIan Lepore 31034e9ed6SIan Lepore #include <sys/cdefs.h> 32034e9ed6SIan Lepore __FBSDID("$FreeBSD$"); 33034e9ed6SIan Lepore 34034e9ed6SIan Lepore #include <sys/param.h> 35034e9ed6SIan Lepore #include <sys/systm.h> 36034e9ed6SIan Lepore #include <sys/bus.h> 37034e9ed6SIan Lepore #include <sys/reboot.h> 3830b72b68SRuslan Bukin #include <sys/devmap.h> 39034e9ed6SIan Lepore 40034e9ed6SIan Lepore #include <vm/vm.h> 4113a98c85SIan Lepore 4213a98c85SIan Lepore #include <machine/bus.h> 43952ded80SIan Lepore #include <machine/intr.h> 4481acdf3fSIan Lepore #include <machine/machdep.h> 45ef7eac43SAndrew Turner #include <machine/platformvar.h> 4613a98c85SIan Lepore 47a3ff7ef6SIan Lepore #include <arm/arm/mpcore_timervar.h> 48034e9ed6SIan Lepore #include <arm/freescale/imx/imx6_anatopreg.h> 49034e9ed6SIan Lepore #include <arm/freescale/imx/imx6_anatopvar.h> 50034e9ed6SIan Lepore #include <arm/freescale/imx/imx_machdep.h> 51034e9ed6SIan Lepore 52952ded80SIan Lepore #include <dev/fdt/fdt_common.h> 53952ded80SIan Lepore #include <dev/ofw/openfirm.h> 54952ded80SIan Lepore 553185adf0SAndrew Turner #include <arm/freescale/imx/imx6_machdep.h> 560960989fSAndrew Turner 57ef7eac43SAndrew Turner #include "platform_if.h" 5875f48c23SAndrew Turner #include "platform_pl310_if.h" 59ef7eac43SAndrew Turner 60ba9f40caSAndrew Turner static platform_attach_t imx6_attach; 61ba9f40caSAndrew Turner static platform_devmap_init_t imx6_devmap_init; 62ba9f40caSAndrew Turner static platform_late_init_t imx6_late_init; 63ba9f40caSAndrew Turner static platform_cpu_reset_t imx6_cpu_reset; 64ba9f40caSAndrew Turner 65e28fbecaSIan Lepore /* 66e28fbecaSIan Lepore * Fix FDT data related to interrupts. 67e28fbecaSIan Lepore * 68e28fbecaSIan Lepore * Driven by the needs of linux and its drivers (as always), the published FDT 69e28fbecaSIan Lepore * data for imx6 now sets the interrupt parent for most devices to the GPC 70e28fbecaSIan Lepore * interrupt controller, which is for use when the chip is in deep-sleep mode. 71e28fbecaSIan Lepore * We don't support deep sleep or have a GPC-PIC driver; we need all interrupts 72e28fbecaSIan Lepore * to be handled by the GIC. 73e28fbecaSIan Lepore * 74e28fbecaSIan Lepore * Luckily, the change to the FDT data was to assign the GPC as the interrupt 75e28fbecaSIan Lepore * parent for the soc node and letting that get inherited by all other devices 76e28fbecaSIan Lepore * (except a few that directly name GIC as their interrupt parent). So we can 77e28fbecaSIan Lepore * set the world right by just changing the interrupt-parent property of the soc 78e28fbecaSIan Lepore * node to refer to GIC instead of GPC. This will get us by until we write our 79e28fbecaSIan Lepore * own GPC driver (or until linux changes its mind and the FDT data again). 80e28fbecaSIan Lepore * 81*2814e686SIan Lepore * 2020/11/25: The tempmon and pmu nodes are siblings (not children) of the soc 82*2814e686SIan Lepore * node, so for them to use interrupts we need to apply the same fix as we do 83*2814e686SIan Lepore * for the soc node. 84*2814e686SIan Lepore * 85e28fbecaSIan Lepore * We validate that we have data that looks like we expect before changing it: 86e28fbecaSIan Lepore * - SOC node exists and has GPC as its interrupt parent. 87e28fbecaSIan Lepore * - GPC node exists and has GIC as its interrupt parent. 8808efd2cdSIan Lepore * - GIC node exists and is its own interrupt parent or has no parent. 89e28fbecaSIan Lepore * 90e28fbecaSIan Lepore * This applies to all models of imx6. Luckily all of them have the devices 91db4fcadfSConrad Meyer * involved at the same addresses on the same buses, so we don't need any 92e28fbecaSIan Lepore * per-soc logic. We handle this at platform attach time rather than via the 93e28fbecaSIan Lepore * fdt_fixup_table, because the latter requires matching on the FDT "model" 94e28fbecaSIan Lepore * property, and this applies to all boards including those not yet invented. 9507fca7acSIan Lepore * 9607fca7acSIan Lepore * This just in: as of the import of dts files from linux 4.15 on 2018-02-10, 9707fca7acSIan Lepore * they appear to have applied a new style rule to the dts which forbids leading 9807fca7acSIan Lepore * zeroes in the @address qualifiers on node names. Since we have to find those 9907fca7acSIan Lepore * nodes by string matching we now have to search for both flavors of each node 10007fca7acSIan Lepore * name involved. 101e28fbecaSIan Lepore */ 102*2814e686SIan Lepore 103*2814e686SIan Lepore static void 104*2814e686SIan Lepore fix_node_iparent(const char* nodepath, phandle_t gpcxref, phandle_t gicxref) 105*2814e686SIan Lepore { 106*2814e686SIan Lepore static const char *propname = "interrupt-parent"; 107*2814e686SIan Lepore phandle_t node, iparent; 108*2814e686SIan Lepore 109*2814e686SIan Lepore if ((node = OF_finddevice(nodepath)) == -1) 110*2814e686SIan Lepore return; 111*2814e686SIan Lepore if (OF_getencprop(node, propname, &iparent, sizeof(iparent)) <= 0) 112*2814e686SIan Lepore return; 113*2814e686SIan Lepore if (iparent != gpcxref) 114*2814e686SIan Lepore return; 115*2814e686SIan Lepore 116*2814e686SIan Lepore OF_setprop(node, propname, &gicxref, sizeof(gicxref)); 117*2814e686SIan Lepore } 118*2814e686SIan Lepore 119e28fbecaSIan Lepore static void 120e28fbecaSIan Lepore fix_fdt_interrupt_data(void) 121e28fbecaSIan Lepore { 122e28fbecaSIan Lepore phandle_t gicipar, gicnode, gicxref; 123e28fbecaSIan Lepore phandle_t gpcipar, gpcnode, gpcxref; 124e28fbecaSIan Lepore int result; 125e28fbecaSIan Lepore 12608efd2cdSIan Lepore /* GIC node may be child of soc node, or appear directly at root. */ 127e28fbecaSIan Lepore gicnode = OF_finddevice("/soc/interrupt-controller@00a01000"); 12807fca7acSIan Lepore if (gicnode == -1) 12907fca7acSIan Lepore gicnode = OF_finddevice("/soc/interrupt-controller@a01000"); 13008efd2cdSIan Lepore if (gicnode == -1) { 13108efd2cdSIan Lepore gicnode = OF_finddevice("/interrupt-controller@00a01000"); 132e28fbecaSIan Lepore if (gicnode == -1) 13307fca7acSIan Lepore gicnode = OF_finddevice("/interrupt-controller@a01000"); 13407fca7acSIan Lepore if (gicnode == -1) 135e28fbecaSIan Lepore return; 13608efd2cdSIan Lepore } 13708efd2cdSIan Lepore gicxref = OF_xref_from_node(gicnode); 13808efd2cdSIan Lepore 13908efd2cdSIan Lepore /* If gic node has no parent, pretend it is its own parent. */ 140e28fbecaSIan Lepore result = OF_getencprop(gicnode, "interrupt-parent", &gicipar, 141e28fbecaSIan Lepore sizeof(gicipar)); 142e28fbecaSIan Lepore if (result <= 0) 14308efd2cdSIan Lepore gicipar = gicxref; 144e28fbecaSIan Lepore 145e28fbecaSIan Lepore gpcnode = OF_finddevice("/soc/aips-bus@02000000/gpc@020dc000"); 146e28fbecaSIan Lepore if (gpcnode == -1) 14707fca7acSIan Lepore gpcnode = OF_finddevice("/soc/aips-bus@2000000/gpc@20dc000"); 14807fca7acSIan Lepore if (gpcnode == -1) 149c76b8bdaSAndreas Tobler gpcnode = OF_finddevice("/soc/bus@2000000/gpc@20dc000"); 150c76b8bdaSAndreas Tobler if (gpcnode == -1) 151e28fbecaSIan Lepore return; 152e28fbecaSIan Lepore result = OF_getencprop(gpcnode, "interrupt-parent", &gpcipar, 153e28fbecaSIan Lepore sizeof(gpcipar)); 154e28fbecaSIan Lepore if (result <= 0) 155e28fbecaSIan Lepore return; 156e28fbecaSIan Lepore gpcxref = OF_xref_from_node(gpcnode); 157e28fbecaSIan Lepore 158*2814e686SIan Lepore if (gpcipar != gicxref || gicipar != gicxref) 159e28fbecaSIan Lepore return; 160e28fbecaSIan Lepore 161e28fbecaSIan Lepore gicxref = cpu_to_fdt32(gicxref); 162*2814e686SIan Lepore fix_node_iparent("/soc", gpcxref, gicxref); 163*2814e686SIan Lepore fix_node_iparent("/pmu", gpcxref, gicxref); 164*2814e686SIan Lepore fix_node_iparent("/tempmon", gpcxref, gicxref); 165e28fbecaSIan Lepore } 166e28fbecaSIan Lepore 1677887a5a1SIan Lepore static void 1687887a5a1SIan Lepore fix_fdt_iomuxc_data(void) 1697887a5a1SIan Lepore { 1707887a5a1SIan Lepore phandle_t node; 1717887a5a1SIan Lepore 1727887a5a1SIan Lepore /* 1737887a5a1SIan Lepore * The linux dts defines two nodes with the same mmio address range, 1747887a5a1SIan Lepore * iomuxc-gpr and the regular iomuxc. The -grp node is a simple_mfd and 1757887a5a1SIan Lepore * a syscon, but it only has access to a small subset of the iomuxc 1767887a5a1SIan Lepore * registers, so it can't serve as the accessor for the iomuxc driver's 1777887a5a1SIan Lepore * register IO. But right now, the simple_mfd driver attaches first, 1787887a5a1SIan Lepore * preventing the real iomuxc driver from allocating its mmio register 1797887a5a1SIan Lepore * range because it partially overlaps with the -gpr range. 1807887a5a1SIan Lepore * 1817887a5a1SIan Lepore * For now, by far the easiest thing to do to keep imx6 working is to 1827887a5a1SIan Lepore * just disable the iomuxc-gpr node because we don't have a driver for 1837887a5a1SIan Lepore * it anyway, we just need to prevent attachment of simple_mfd. 1847887a5a1SIan Lepore * 1857887a5a1SIan Lepore * If we ever write a -gpr driver, this code should probably switch to 1867887a5a1SIan Lepore * modifying the reg property so that the range covers all the iomuxc 1877887a5a1SIan Lepore * regs, then the -gpr driver can be a regular syscon driver that iomuxc 1887887a5a1SIan Lepore * uses for register access. 1897887a5a1SIan Lepore */ 1907887a5a1SIan Lepore node = OF_finddevice("/soc/aips-bus@2000000/iomuxc-gpr@20e0000"); 191c76b8bdaSAndreas Tobler if (node == -1) 192c76b8bdaSAndreas Tobler node = OF_finddevice("/soc/bus@2000000/iomuxc-gpr@20e0000"); 1937887a5a1SIan Lepore if (node != -1) 1947887a5a1SIan Lepore OF_setprop(node, "status", "disabled", sizeof("disabled")); 1957887a5a1SIan Lepore } 1967887a5a1SIan Lepore 197ef7eac43SAndrew Turner static int 198ef7eac43SAndrew Turner imx6_attach(platform_t plat) 19981acdf3fSIan Lepore { 200e28fbecaSIan Lepore 201e28fbecaSIan Lepore /* Fix soc interrupt-parent property. */ 202e28fbecaSIan Lepore fix_fdt_interrupt_data(); 203e28fbecaSIan Lepore 2047887a5a1SIan Lepore /* Fix iomuxc-gpr and iomuxc nodes both using the same mmio range. */ 2057887a5a1SIan Lepore fix_fdt_iomuxc_data(); 2067887a5a1SIan Lepore 207a3ff7ef6SIan Lepore /* Inform the MPCore timer driver that its clock is variable. */ 208a3ff7ef6SIan Lepore arm_tmr_change_frequency(ARM_TMR_FREQUENCY_VARIES); 209ef7eac43SAndrew Turner 210ef7eac43SAndrew Turner return (0); 21181acdf3fSIan Lepore } 21281acdf3fSIan Lepore 213ef7eac43SAndrew Turner static void 214ef7eac43SAndrew Turner imx6_late_init(platform_t plat) 21581acdf3fSIan Lepore { 216bd6b2f9bSIan Lepore const uint32_t IMX6_WDOG_SR_PHYS = 0x020bc004; 217bd6b2f9bSIan Lepore 218bd6b2f9bSIan Lepore imx_wdog_init_last_reset(IMX6_WDOG_SR_PHYS); 21981acdf3fSIan Lepore } 22081acdf3fSIan Lepore 221034e9ed6SIan Lepore /* 22281acdf3fSIan Lepore * Set up static device mappings. 223034e9ed6SIan Lepore * 224034e9ed6SIan Lepore * This attempts to cover the most-used devices with 1MB section mappings, which 225034e9ed6SIan Lepore * is good for performance (uses fewer TLB entries for device access). 226034e9ed6SIan Lepore * 227034e9ed6SIan Lepore * ARMMP covers the interrupt controller, MPCore timers, global timer, and the 228034e9ed6SIan Lepore * L2 cache controller. Most of the 1MB range is unused reserved space. 229034e9ed6SIan Lepore * 230034e9ed6SIan Lepore * AIPS1/AIPS2 cover most of the on-chip devices such as uart, spi, i2c, etc. 231034e9ed6SIan Lepore * 232034e9ed6SIan Lepore * Notably not mapped right now are HDMI, GPU, and other devices below ARMMP in 233034e9ed6SIan Lepore * the memory map. When we get support for graphics it might make sense to 234034e9ed6SIan Lepore * static map some of that area. Be careful with other things in that area such 2351413a3abSSvatopluk Kraus * as OCRAM that probably shouldn't be mapped as VM_MEMATTR_DEVICE memory. 236034e9ed6SIan Lepore */ 237ef7eac43SAndrew Turner static int 238ef7eac43SAndrew Turner imx6_devmap_init(platform_t plat) 239034e9ed6SIan Lepore { 240034e9ed6SIan Lepore const uint32_t IMX6_ARMMP_PHYS = 0x00a00000; 241034e9ed6SIan Lepore const uint32_t IMX6_ARMMP_SIZE = 0x00100000; 242034e9ed6SIan Lepore const uint32_t IMX6_AIPS1_PHYS = 0x02000000; 243034e9ed6SIan Lepore const uint32_t IMX6_AIPS1_SIZE = 0x00100000; 244034e9ed6SIan Lepore const uint32_t IMX6_AIPS2_PHYS = 0x02100000; 245034e9ed6SIan Lepore const uint32_t IMX6_AIPS2_SIZE = 0x00100000; 246034e9ed6SIan Lepore 24730b72b68SRuslan Bukin devmap_add_entry(IMX6_ARMMP_PHYS, IMX6_ARMMP_SIZE); 24830b72b68SRuslan Bukin devmap_add_entry(IMX6_AIPS1_PHYS, IMX6_AIPS1_SIZE); 24930b72b68SRuslan Bukin devmap_add_entry(IMX6_AIPS2_PHYS, IMX6_AIPS2_SIZE); 25081acdf3fSIan Lepore 25181acdf3fSIan Lepore return (0); 252034e9ed6SIan Lepore } 253034e9ed6SIan Lepore 2540dbb8873SAndrew Turner static void 2550dbb8873SAndrew Turner imx6_cpu_reset(platform_t plat) 256034e9ed6SIan Lepore { 257034e9ed6SIan Lepore const uint32_t IMX6_WDOG_CR_PHYS = 0x020bc000; 258034e9ed6SIan Lepore 259034e9ed6SIan Lepore imx_wdog_cpu_reset(IMX6_WDOG_CR_PHYS); 260034e9ed6SIan Lepore } 261034e9ed6SIan Lepore 262034e9ed6SIan Lepore /* 263034e9ed6SIan Lepore * Determine what flavor of imx6 we're running on. 264034e9ed6SIan Lepore * 265034e9ed6SIan Lepore * This code is based on the way u-boot does it. Information found on the web 266034e9ed6SIan Lepore * indicates that Freescale themselves were the original source of this logic, 267034e9ed6SIan Lepore * including the strange check for number of CPUs in the SCU configuration 268034e9ed6SIan Lepore * register, which is apparently needed on some revisions of the SOLO. 269034e9ed6SIan Lepore * 270034e9ed6SIan Lepore * According to the documentation, there is such a thing as an i.MX6 Dual 271034e9ed6SIan Lepore * (non-lite flavor). However, Freescale doesn't seem to have assigned it a 272034e9ed6SIan Lepore * number or provided any logic to handle it in their detection code. 273034e9ed6SIan Lepore * 274034e9ed6SIan Lepore * Note that the ANALOG_DIGPROG and SCU configuration registers are not 275034e9ed6SIan Lepore * documented in the chip reference manual. (SCU configuration is mentioned, 276034e9ed6SIan Lepore * but not mapped out in detail.) I think the bottom two bits of the scu config 277034e9ed6SIan Lepore * register may be ncpu-1. 278034e9ed6SIan Lepore * 279034e9ed6SIan Lepore * This hasn't been tested yet on a dual[-lite]. 280034e9ed6SIan Lepore * 281034e9ed6SIan Lepore * On a solo: 282034e9ed6SIan Lepore * digprog = 0x00610001 283034e9ed6SIan Lepore * hwsoc = 0x00000062 284034e9ed6SIan Lepore * scu config = 0x00000500 285034e9ed6SIan Lepore * On a quad: 286034e9ed6SIan Lepore * digprog = 0x00630002 287034e9ed6SIan Lepore * hwsoc = 0x00000063 288034e9ed6SIan Lepore * scu config = 0x00005503 289034e9ed6SIan Lepore */ 290ba9f40caSAndrew Turner u_int 291ba9f40caSAndrew Turner imx_soc_type(void) 292034e9ed6SIan Lepore { 293034e9ed6SIan Lepore uint32_t digprog, hwsoc; 294034e9ed6SIan Lepore uint32_t *pcr; 2955fdc7f7eSIan Lepore static u_int soctype; 296034e9ed6SIan Lepore const vm_offset_t SCU_CONFIG_PHYSADDR = 0x00a00004; 297272faa5fSIan Lepore #define HWSOC_MX6SL 0x60 298272faa5fSIan Lepore #define HWSOC_MX6DL 0x61 299272faa5fSIan Lepore #define HWSOC_MX6SOLO 0x62 300272faa5fSIan Lepore #define HWSOC_MX6Q 0x63 301c1411a76SIan Lepore #define HWSOC_MX6UL 0x64 302034e9ed6SIan Lepore 3035fdc7f7eSIan Lepore if (soctype != 0) 3045fdc7f7eSIan Lepore return (soctype); 3055fdc7f7eSIan Lepore 306034e9ed6SIan Lepore digprog = imx6_anatop_read_4(IMX6_ANALOG_DIGPROG_SL); 307034e9ed6SIan Lepore hwsoc = (digprog >> IMX6_ANALOG_DIGPROG_SOCTYPE_SHIFT) & 308034e9ed6SIan Lepore IMX6_ANALOG_DIGPROG_SOCTYPE_MASK; 309034e9ed6SIan Lepore 310034e9ed6SIan Lepore if (hwsoc != HWSOC_MX6SL) { 311034e9ed6SIan Lepore digprog = imx6_anatop_read_4(IMX6_ANALOG_DIGPROG); 312034e9ed6SIan Lepore hwsoc = (digprog & IMX6_ANALOG_DIGPROG_SOCTYPE_MASK) >> 313034e9ed6SIan Lepore IMX6_ANALOG_DIGPROG_SOCTYPE_SHIFT; 314034e9ed6SIan Lepore /*printf("digprog = 0x%08x\n", digprog);*/ 315034e9ed6SIan Lepore if (hwsoc == HWSOC_MX6DL) { 31630b72b68SRuslan Bukin pcr = devmap_ptov(SCU_CONFIG_PHYSADDR, 4); 31713a98c85SIan Lepore if (pcr != NULL) { 318034e9ed6SIan Lepore /*printf("scu config = 0x%08x\n", *pcr);*/ 319034e9ed6SIan Lepore if ((*pcr & 0x03) == 0) { 320034e9ed6SIan Lepore hwsoc = HWSOC_MX6SOLO; 321034e9ed6SIan Lepore } 322034e9ed6SIan Lepore } 323034e9ed6SIan Lepore } 324034e9ed6SIan Lepore } 325034e9ed6SIan Lepore /* printf("hwsoc 0x%08x\n", hwsoc); */ 326034e9ed6SIan Lepore 327034e9ed6SIan Lepore switch (hwsoc) { 328034e9ed6SIan Lepore case HWSOC_MX6SL: 3295fdc7f7eSIan Lepore soctype = IMXSOC_6SL; 3305fdc7f7eSIan Lepore break; 331034e9ed6SIan Lepore case HWSOC_MX6SOLO: 3325fdc7f7eSIan Lepore soctype = IMXSOC_6S; 3335fdc7f7eSIan Lepore break; 334034e9ed6SIan Lepore case HWSOC_MX6DL: 3355fdc7f7eSIan Lepore soctype = IMXSOC_6DL; 3365fdc7f7eSIan Lepore break; 337034e9ed6SIan Lepore case HWSOC_MX6Q : 3385fdc7f7eSIan Lepore soctype = IMXSOC_6Q; 3395fdc7f7eSIan Lepore break; 340c1411a76SIan Lepore case HWSOC_MX6UL: 341c1411a76SIan Lepore soctype = IMXSOC_6UL; 342c1411a76SIan Lepore break; 343034e9ed6SIan Lepore default: 344034e9ed6SIan Lepore printf("imx_soc_type: Don't understand hwsoc 0x%02x, " 345034e9ed6SIan Lepore "digprog 0x%08x; assuming IMXSOC_6Q\n", hwsoc, digprog); 3465fdc7f7eSIan Lepore soctype = IMXSOC_6Q; 347034e9ed6SIan Lepore break; 348034e9ed6SIan Lepore } 349034e9ed6SIan Lepore 3505fdc7f7eSIan Lepore return (soctype); 351034e9ed6SIan Lepore } 352034e9ed6SIan Lepore 3538df34dd2SIan Lepore /* 3548df34dd2SIan Lepore * Early putc routine for EARLY_PRINTF support. To use, add to kernel config: 3558df34dd2SIan Lepore * option SOCDEV_PA=0x02000000 3568df34dd2SIan Lepore * option SOCDEV_VA=0x02000000 3578df34dd2SIan Lepore * option EARLY_PRINTF 3588df34dd2SIan Lepore * Resist the temptation to change the #if 0 to #ifdef EARLY_PRINTF here. It 3598df34dd2SIan Lepore * makes sense now, but if multiple SOCs do that it will make early_putc another 3608df34dd2SIan Lepore * duplicate symbol to be eliminated on the path to a generic kernel. 3618df34dd2SIan Lepore */ 3628df34dd2SIan Lepore #if 0 3638df34dd2SIan Lepore static void 3648df34dd2SIan Lepore imx6_early_putc(int c) 3658df34dd2SIan Lepore { 3668df34dd2SIan Lepore volatile uint32_t * UART_STAT_REG = (uint32_t *)0x02020098; 3678df34dd2SIan Lepore volatile uint32_t * UART_TX_REG = (uint32_t *)0x02020040; 3688df34dd2SIan Lepore const uint32_t UART_TXRDY = (1 << 3); 3698df34dd2SIan Lepore 3708df34dd2SIan Lepore while ((*UART_STAT_REG & UART_TXRDY) == 0) 3718df34dd2SIan Lepore continue; 3728df34dd2SIan Lepore *UART_TX_REG = c; 3738df34dd2SIan Lepore } 3748df34dd2SIan Lepore early_putc_t *early_putc = imx6_early_putc; 3758df34dd2SIan Lepore #endif 3768df34dd2SIan Lepore 377ef7eac43SAndrew Turner static platform_method_t imx6_methods[] = { 378ef7eac43SAndrew Turner PLATFORMMETHOD(platform_attach, imx6_attach), 379ef7eac43SAndrew Turner PLATFORMMETHOD(platform_devmap_init, imx6_devmap_init), 380ef7eac43SAndrew Turner PLATFORMMETHOD(platform_late_init, imx6_late_init), 3810dbb8873SAndrew Turner PLATFORMMETHOD(platform_cpu_reset, imx6_cpu_reset), 382ef7eac43SAndrew Turner 3830960989fSAndrew Turner #ifdef SMP 3840960989fSAndrew Turner PLATFORMMETHOD(platform_mp_start_ap, imx6_mp_start_ap), 3850960989fSAndrew Turner PLATFORMMETHOD(platform_mp_setmaxid, imx6_mp_setmaxid), 3860960989fSAndrew Turner #endif 3870960989fSAndrew Turner 38875f48c23SAndrew Turner PLATFORMMETHOD(platform_pl310_init, imx6_pl310_init), 38975f48c23SAndrew Turner 390ef7eac43SAndrew Turner PLATFORMMETHOD_END, 391ef7eac43SAndrew Turner }; 392ef7eac43SAndrew Turner 3934bd9887cSAndrew Turner FDT_PLATFORM_DEF2(imx6, imx6s, "i.MX6 Solo", 0, "fsl,imx6s", 80); 3944bd9887cSAndrew Turner FDT_PLATFORM_DEF2(imx6, imx6d, "i.MX6 Dual", 0, "fsl,imx6dl", 80); 3954bd9887cSAndrew Turner FDT_PLATFORM_DEF2(imx6, imx6q, "i.MX6 Quad", 0, "fsl,imx6q", 80); 3964bd9887cSAndrew Turner FDT_PLATFORM_DEF2(imx6, imx6ul, "i.MX6 UltraLite", 0, "fsl,imx6ul", 67); 397