1034e9ed6SIan Lepore /*- 2034e9ed6SIan Lepore * Copyright (c) 2013 Ian Lepore <ian@freebsd.org> 3034e9ed6SIan Lepore * All rights reserved. 4034e9ed6SIan Lepore * 5034e9ed6SIan Lepore * Redistribution and use in source and binary forms, with or without 6034e9ed6SIan Lepore * modification, are permitted provided that the following conditions 7034e9ed6SIan Lepore * are met: 8034e9ed6SIan Lepore * 1. Redistributions of source code must retain the above copyright 9034e9ed6SIan Lepore * notice, this list of conditions and the following disclaimer. 10034e9ed6SIan Lepore * 2. Redistributions in binary form must reproduce the above copyright 11034e9ed6SIan Lepore * notice, this list of conditions and the following disclaimer in the 12034e9ed6SIan Lepore * documentation and/or other materials provided with the distribution. 13034e9ed6SIan Lepore * 14034e9ed6SIan Lepore * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15034e9ed6SIan Lepore * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16034e9ed6SIan Lepore * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17034e9ed6SIan Lepore * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18034e9ed6SIan Lepore * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19034e9ed6SIan Lepore * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20034e9ed6SIan Lepore * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21034e9ed6SIan Lepore * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22034e9ed6SIan Lepore * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23034e9ed6SIan Lepore * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24034e9ed6SIan Lepore * SUCH DAMAGE. 25034e9ed6SIan Lepore */ 26034e9ed6SIan Lepore 27034e9ed6SIan Lepore #include "opt_platform.h" 28034e9ed6SIan Lepore 29034e9ed6SIan Lepore #include <sys/cdefs.h> 30034e9ed6SIan Lepore __FBSDID("$FreeBSD$"); 31034e9ed6SIan Lepore 32034e9ed6SIan Lepore #include <sys/param.h> 33034e9ed6SIan Lepore #include <sys/systm.h> 34034e9ed6SIan Lepore #include <sys/bus.h> 35034e9ed6SIan Lepore #include <sys/reboot.h> 3630b72b68SRuslan Bukin #include <sys/devmap.h> 37034e9ed6SIan Lepore 38034e9ed6SIan Lepore #include <vm/vm.h> 3913a98c85SIan Lepore 4013a98c85SIan Lepore #include <machine/bus.h> 41952ded80SIan Lepore #include <machine/intr.h> 4281acdf3fSIan Lepore #include <machine/machdep.h> 43ef7eac43SAndrew Turner #include <machine/platformvar.h> 4413a98c85SIan Lepore 45a3ff7ef6SIan Lepore #include <arm/arm/mpcore_timervar.h> 46034e9ed6SIan Lepore #include <arm/freescale/imx/imx6_anatopreg.h> 47034e9ed6SIan Lepore #include <arm/freescale/imx/imx6_anatopvar.h> 48034e9ed6SIan Lepore #include <arm/freescale/imx/imx_machdep.h> 49034e9ed6SIan Lepore 50952ded80SIan Lepore #include <dev/fdt/fdt_common.h> 51952ded80SIan Lepore #include <dev/ofw/openfirm.h> 52952ded80SIan Lepore 53ef7eac43SAndrew Turner #include "platform_if.h" 54ef7eac43SAndrew Turner 55952ded80SIan Lepore struct fdt_fixup_entry fdt_fixup_table[] = { 56952ded80SIan Lepore { NULL, NULL } 57952ded80SIan Lepore }; 58952ded80SIan Lepore 592c746c6aSIan Lepore static uint32_t gpio1_node; 602c746c6aSIan Lepore 6159c3cb81SAndrew Turner #ifndef INTRNG 622c746c6aSIan Lepore /* 632c746c6aSIan Lepore * Work around the linux workaround for imx6 erratum 006687, in which some 642c746c6aSIan Lepore * ethernet interrupts don't go to the GPC and thus won't wake the system from 652c746c6aSIan Lepore * Wait mode. We don't use Wait mode (which halts the GIC, leaving only GPC 662c746c6aSIan Lepore * interrupts able to wake the system), so we don't experience the bug at all. 672c746c6aSIan Lepore * The linux workaround is to reconfigure GPIO1_6 as the ENET interrupt by 682c746c6aSIan Lepore * writing magic values to an undocumented IOMUX register, then letting the gpio 692c746c6aSIan Lepore * interrupt driver notify the ethernet driver. We'll be able to do all that 702c746c6aSIan Lepore * (even though we don't need to) once the INTRNG project is committed and the 712c746c6aSIan Lepore * imx_gpio driver becomes an interrupt driver. Until then, this crazy little 722c746c6aSIan Lepore * workaround watches for requests to map an interrupt 6 with the interrupt 732c746c6aSIan Lepore * controller node referring to gpio1, and it substitutes the proper ffec 742c746c6aSIan Lepore * interrupt number. 752c746c6aSIan Lepore */ 762c746c6aSIan Lepore static int 772c746c6aSIan Lepore imx6_decode_fdt(uint32_t iparent, uint32_t *intr, int *interrupt, 782c746c6aSIan Lepore int *trig, int *pol) 792c746c6aSIan Lepore { 802c746c6aSIan Lepore 812c746c6aSIan Lepore if (fdt32_to_cpu(intr[0]) == 6 && 822c746c6aSIan Lepore OF_node_from_xref(iparent) == gpio1_node) { 832c746c6aSIan Lepore *interrupt = 150; 842c746c6aSIan Lepore *trig = INTR_TRIGGER_CONFORM; 852c746c6aSIan Lepore *pol = INTR_POLARITY_CONFORM; 862c746c6aSIan Lepore return (0); 872c746c6aSIan Lepore } 882c746c6aSIan Lepore return (gic_decode_fdt(iparent, intr, interrupt, trig, pol)); 892c746c6aSIan Lepore } 902c746c6aSIan Lepore 91952ded80SIan Lepore fdt_pic_decode_t fdt_pic_table[] = { 922c746c6aSIan Lepore &imx6_decode_fdt, 93952ded80SIan Lepore NULL 94952ded80SIan Lepore }; 95e6c43510SIan Lepore #endif 96952ded80SIan Lepore 97e28fbecaSIan Lepore /* 98e28fbecaSIan Lepore * Fix FDT data related to interrupts. 99e28fbecaSIan Lepore * 100e28fbecaSIan Lepore * Driven by the needs of linux and its drivers (as always), the published FDT 101e28fbecaSIan Lepore * data for imx6 now sets the interrupt parent for most devices to the GPC 102e28fbecaSIan Lepore * interrupt controller, which is for use when the chip is in deep-sleep mode. 103e28fbecaSIan Lepore * We don't support deep sleep or have a GPC-PIC driver; we need all interrupts 104e28fbecaSIan Lepore * to be handled by the GIC. 105e28fbecaSIan Lepore * 106e28fbecaSIan Lepore * Luckily, the change to the FDT data was to assign the GPC as the interrupt 107e28fbecaSIan Lepore * parent for the soc node and letting that get inherited by all other devices 108e28fbecaSIan Lepore * (except a few that directly name GIC as their interrupt parent). So we can 109e28fbecaSIan Lepore * set the world right by just changing the interrupt-parent property of the soc 110e28fbecaSIan Lepore * node to refer to GIC instead of GPC. This will get us by until we write our 111e28fbecaSIan Lepore * own GPC driver (or until linux changes its mind and the FDT data again). 112e28fbecaSIan Lepore * 113e28fbecaSIan Lepore * We validate that we have data that looks like we expect before changing it: 114e28fbecaSIan Lepore * - SOC node exists and has GPC as its interrupt parent. 115e28fbecaSIan Lepore * - GPC node exists and has GIC as its interrupt parent. 116e28fbecaSIan Lepore * - GIC node exists and is its own interrupt parent. 117e28fbecaSIan Lepore * 118e28fbecaSIan Lepore * This applies to all models of imx6. Luckily all of them have the devices 119e28fbecaSIan Lepore * involved at the same addresses on the same busses, so we don't need any 120e28fbecaSIan Lepore * per-soc logic. We handle this at platform attach time rather than via the 121e28fbecaSIan Lepore * fdt_fixup_table, because the latter requires matching on the FDT "model" 122e28fbecaSIan Lepore * property, and this applies to all boards including those not yet invented. 123e28fbecaSIan Lepore */ 124e28fbecaSIan Lepore static void 125e28fbecaSIan Lepore fix_fdt_interrupt_data(void) 126e28fbecaSIan Lepore { 127e28fbecaSIan Lepore phandle_t gicipar, gicnode, gicxref; 128e28fbecaSIan Lepore phandle_t gpcipar, gpcnode, gpcxref; 129e28fbecaSIan Lepore phandle_t socipar, socnode; 130e28fbecaSIan Lepore int result; 131e28fbecaSIan Lepore 132e28fbecaSIan Lepore socnode = OF_finddevice("/soc"); 133e28fbecaSIan Lepore if (socnode == -1) 134e28fbecaSIan Lepore return; 135e28fbecaSIan Lepore result = OF_getencprop(socnode, "interrupt-parent", &socipar, 136e28fbecaSIan Lepore sizeof(socipar)); 137e28fbecaSIan Lepore if (result <= 0) 138e28fbecaSIan Lepore return; 139e28fbecaSIan Lepore 140e28fbecaSIan Lepore gicnode = OF_finddevice("/soc/interrupt-controller@00a01000"); 141e28fbecaSIan Lepore if (gicnode == -1) 142e28fbecaSIan Lepore return; 143e28fbecaSIan Lepore result = OF_getencprop(gicnode, "interrupt-parent", &gicipar, 144e28fbecaSIan Lepore sizeof(gicipar)); 145e28fbecaSIan Lepore if (result <= 0) 146e28fbecaSIan Lepore return; 147e28fbecaSIan Lepore gicxref = OF_xref_from_node(gicnode); 148e28fbecaSIan Lepore 149e28fbecaSIan Lepore gpcnode = OF_finddevice("/soc/aips-bus@02000000/gpc@020dc000"); 150e28fbecaSIan Lepore if (gpcnode == -1) 151e28fbecaSIan Lepore return; 152e28fbecaSIan Lepore result = OF_getencprop(gpcnode, "interrupt-parent", &gpcipar, 153e28fbecaSIan Lepore sizeof(gpcipar)); 154e28fbecaSIan Lepore if (result <= 0) 155e28fbecaSIan Lepore return; 156e28fbecaSIan Lepore gpcxref = OF_xref_from_node(gpcnode); 157e28fbecaSIan Lepore 158e28fbecaSIan Lepore if (socipar != gpcxref || gpcipar != gicxref || gicipar != gicxref) 159e28fbecaSIan Lepore return; 160e28fbecaSIan Lepore 161e28fbecaSIan Lepore gicxref = cpu_to_fdt32(gicxref); 162e28fbecaSIan Lepore OF_setprop(socnode, "interrupt-parent", &gicxref, sizeof(gicxref)); 163e28fbecaSIan Lepore } 164e28fbecaSIan Lepore 165ef7eac43SAndrew Turner static vm_offset_t 166ef7eac43SAndrew Turner imx6_lastaddr(platform_t plat) 16781acdf3fSIan Lepore { 16881acdf3fSIan Lepore 16930b72b68SRuslan Bukin return (devmap_lastaddr()); 17081acdf3fSIan Lepore } 17181acdf3fSIan Lepore 172ef7eac43SAndrew Turner static int 173ef7eac43SAndrew Turner imx6_attach(platform_t plat) 17481acdf3fSIan Lepore { 175e28fbecaSIan Lepore 176e28fbecaSIan Lepore /* Fix soc interrupt-parent property. */ 177e28fbecaSIan Lepore fix_fdt_interrupt_data(); 178e28fbecaSIan Lepore 179a3ff7ef6SIan Lepore /* Inform the MPCore timer driver that its clock is variable. */ 180a3ff7ef6SIan Lepore arm_tmr_change_frequency(ARM_TMR_FREQUENCY_VARIES); 181ef7eac43SAndrew Turner 182ef7eac43SAndrew Turner return (0); 18381acdf3fSIan Lepore } 18481acdf3fSIan Lepore 185ef7eac43SAndrew Turner static void 186ef7eac43SAndrew Turner imx6_late_init(platform_t plat) 18781acdf3fSIan Lepore { 188bd6b2f9bSIan Lepore const uint32_t IMX6_WDOG_SR_PHYS = 0x020bc004; 189bd6b2f9bSIan Lepore 190bd6b2f9bSIan Lepore imx_wdog_init_last_reset(IMX6_WDOG_SR_PHYS); 19181acdf3fSIan Lepore 1922c746c6aSIan Lepore /* Cache the gpio1 node handle for imx6_decode_fdt() workaround code. */ 1932c746c6aSIan Lepore gpio1_node = OF_node_from_xref( 1942c746c6aSIan Lepore OF_finddevice("/soc/aips-bus@02000000/gpio@0209c000")); 19581acdf3fSIan Lepore } 19681acdf3fSIan Lepore 197034e9ed6SIan Lepore /* 19881acdf3fSIan Lepore * Set up static device mappings. 199034e9ed6SIan Lepore * 200034e9ed6SIan Lepore * This attempts to cover the most-used devices with 1MB section mappings, which 201034e9ed6SIan Lepore * is good for performance (uses fewer TLB entries for device access). 202034e9ed6SIan Lepore * 203034e9ed6SIan Lepore * ARMMP covers the interrupt controller, MPCore timers, global timer, and the 204034e9ed6SIan Lepore * L2 cache controller. Most of the 1MB range is unused reserved space. 205034e9ed6SIan Lepore * 206034e9ed6SIan Lepore * AIPS1/AIPS2 cover most of the on-chip devices such as uart, spi, i2c, etc. 207034e9ed6SIan Lepore * 208034e9ed6SIan Lepore * Notably not mapped right now are HDMI, GPU, and other devices below ARMMP in 209034e9ed6SIan Lepore * the memory map. When we get support for graphics it might make sense to 210034e9ed6SIan Lepore * static map some of that area. Be careful with other things in that area such 2111413a3abSSvatopluk Kraus * as OCRAM that probably shouldn't be mapped as VM_MEMATTR_DEVICE memory. 212034e9ed6SIan Lepore */ 213ef7eac43SAndrew Turner static int 214ef7eac43SAndrew Turner imx6_devmap_init(platform_t plat) 215034e9ed6SIan Lepore { 216034e9ed6SIan Lepore const uint32_t IMX6_ARMMP_PHYS = 0x00a00000; 217034e9ed6SIan Lepore const uint32_t IMX6_ARMMP_SIZE = 0x00100000; 218034e9ed6SIan Lepore const uint32_t IMX6_AIPS1_PHYS = 0x02000000; 219034e9ed6SIan Lepore const uint32_t IMX6_AIPS1_SIZE = 0x00100000; 220034e9ed6SIan Lepore const uint32_t IMX6_AIPS2_PHYS = 0x02100000; 221034e9ed6SIan Lepore const uint32_t IMX6_AIPS2_SIZE = 0x00100000; 222034e9ed6SIan Lepore 22330b72b68SRuslan Bukin devmap_add_entry(IMX6_ARMMP_PHYS, IMX6_ARMMP_SIZE); 22430b72b68SRuslan Bukin devmap_add_entry(IMX6_AIPS1_PHYS, IMX6_AIPS1_SIZE); 22530b72b68SRuslan Bukin devmap_add_entry(IMX6_AIPS2_PHYS, IMX6_AIPS2_SIZE); 22681acdf3fSIan Lepore 22781acdf3fSIan Lepore return (0); 228034e9ed6SIan Lepore } 229034e9ed6SIan Lepore 230*0dbb8873SAndrew Turner static void 231*0dbb8873SAndrew Turner imx6_cpu_reset(platform_t plat) 232034e9ed6SIan Lepore { 233034e9ed6SIan Lepore const uint32_t IMX6_WDOG_CR_PHYS = 0x020bc000; 234034e9ed6SIan Lepore 235034e9ed6SIan Lepore imx_wdog_cpu_reset(IMX6_WDOG_CR_PHYS); 236034e9ed6SIan Lepore } 237034e9ed6SIan Lepore 238034e9ed6SIan Lepore /* 239034e9ed6SIan Lepore * Determine what flavor of imx6 we're running on. 240034e9ed6SIan Lepore * 241034e9ed6SIan Lepore * This code is based on the way u-boot does it. Information found on the web 242034e9ed6SIan Lepore * indicates that Freescale themselves were the original source of this logic, 243034e9ed6SIan Lepore * including the strange check for number of CPUs in the SCU configuration 244034e9ed6SIan Lepore * register, which is apparently needed on some revisions of the SOLO. 245034e9ed6SIan Lepore * 246034e9ed6SIan Lepore * According to the documentation, there is such a thing as an i.MX6 Dual 247034e9ed6SIan Lepore * (non-lite flavor). However, Freescale doesn't seem to have assigned it a 248034e9ed6SIan Lepore * number or provided any logic to handle it in their detection code. 249034e9ed6SIan Lepore * 250034e9ed6SIan Lepore * Note that the ANALOG_DIGPROG and SCU configuration registers are not 251034e9ed6SIan Lepore * documented in the chip reference manual. (SCU configuration is mentioned, 252034e9ed6SIan Lepore * but not mapped out in detail.) I think the bottom two bits of the scu config 253034e9ed6SIan Lepore * register may be ncpu-1. 254034e9ed6SIan Lepore * 255034e9ed6SIan Lepore * This hasn't been tested yet on a dual[-lite]. 256034e9ed6SIan Lepore * 257034e9ed6SIan Lepore * On a solo: 258034e9ed6SIan Lepore * digprog = 0x00610001 259034e9ed6SIan Lepore * hwsoc = 0x00000062 260034e9ed6SIan Lepore * scu config = 0x00000500 261034e9ed6SIan Lepore * On a quad: 262034e9ed6SIan Lepore * digprog = 0x00630002 263034e9ed6SIan Lepore * hwsoc = 0x00000063 264034e9ed6SIan Lepore * scu config = 0x00005503 265034e9ed6SIan Lepore */ 266034e9ed6SIan Lepore u_int imx_soc_type() 267034e9ed6SIan Lepore { 268034e9ed6SIan Lepore uint32_t digprog, hwsoc; 269034e9ed6SIan Lepore uint32_t *pcr; 2705fdc7f7eSIan Lepore static u_int soctype; 271034e9ed6SIan Lepore const vm_offset_t SCU_CONFIG_PHYSADDR = 0x00a00004; 272272faa5fSIan Lepore #define HWSOC_MX6SL 0x60 273272faa5fSIan Lepore #define HWSOC_MX6DL 0x61 274272faa5fSIan Lepore #define HWSOC_MX6SOLO 0x62 275272faa5fSIan Lepore #define HWSOC_MX6Q 0x63 276034e9ed6SIan Lepore 2775fdc7f7eSIan Lepore if (soctype != 0) 2785fdc7f7eSIan Lepore return (soctype); 2795fdc7f7eSIan Lepore 280034e9ed6SIan Lepore digprog = imx6_anatop_read_4(IMX6_ANALOG_DIGPROG_SL); 281034e9ed6SIan Lepore hwsoc = (digprog >> IMX6_ANALOG_DIGPROG_SOCTYPE_SHIFT) & 282034e9ed6SIan Lepore IMX6_ANALOG_DIGPROG_SOCTYPE_MASK; 283034e9ed6SIan Lepore 284034e9ed6SIan Lepore if (hwsoc != HWSOC_MX6SL) { 285034e9ed6SIan Lepore digprog = imx6_anatop_read_4(IMX6_ANALOG_DIGPROG); 286034e9ed6SIan Lepore hwsoc = (digprog & IMX6_ANALOG_DIGPROG_SOCTYPE_MASK) >> 287034e9ed6SIan Lepore IMX6_ANALOG_DIGPROG_SOCTYPE_SHIFT; 288034e9ed6SIan Lepore /*printf("digprog = 0x%08x\n", digprog);*/ 289034e9ed6SIan Lepore if (hwsoc == HWSOC_MX6DL) { 29030b72b68SRuslan Bukin pcr = devmap_ptov(SCU_CONFIG_PHYSADDR, 4); 29113a98c85SIan Lepore if (pcr != NULL) { 292034e9ed6SIan Lepore /*printf("scu config = 0x%08x\n", *pcr);*/ 293034e9ed6SIan Lepore if ((*pcr & 0x03) == 0) { 294034e9ed6SIan Lepore hwsoc = HWSOC_MX6SOLO; 295034e9ed6SIan Lepore } 296034e9ed6SIan Lepore } 297034e9ed6SIan Lepore } 298034e9ed6SIan Lepore } 299034e9ed6SIan Lepore /* printf("hwsoc 0x%08x\n", hwsoc); */ 300034e9ed6SIan Lepore 301034e9ed6SIan Lepore switch (hwsoc) { 302034e9ed6SIan Lepore case HWSOC_MX6SL: 3035fdc7f7eSIan Lepore soctype = IMXSOC_6SL; 3045fdc7f7eSIan Lepore break; 305034e9ed6SIan Lepore case HWSOC_MX6SOLO: 3065fdc7f7eSIan Lepore soctype = IMXSOC_6S; 3075fdc7f7eSIan Lepore break; 308034e9ed6SIan Lepore case HWSOC_MX6DL: 3095fdc7f7eSIan Lepore soctype = IMXSOC_6DL; 3105fdc7f7eSIan Lepore break; 311034e9ed6SIan Lepore case HWSOC_MX6Q : 3125fdc7f7eSIan Lepore soctype = IMXSOC_6Q; 3135fdc7f7eSIan Lepore break; 314034e9ed6SIan Lepore default: 315034e9ed6SIan Lepore printf("imx_soc_type: Don't understand hwsoc 0x%02x, " 316034e9ed6SIan Lepore "digprog 0x%08x; assuming IMXSOC_6Q\n", hwsoc, digprog); 3175fdc7f7eSIan Lepore soctype = IMXSOC_6Q; 318034e9ed6SIan Lepore break; 319034e9ed6SIan Lepore } 320034e9ed6SIan Lepore 3215fdc7f7eSIan Lepore return (soctype); 322034e9ed6SIan Lepore } 323034e9ed6SIan Lepore 3248df34dd2SIan Lepore /* 3258df34dd2SIan Lepore * Early putc routine for EARLY_PRINTF support. To use, add to kernel config: 3268df34dd2SIan Lepore * option SOCDEV_PA=0x02000000 3278df34dd2SIan Lepore * option SOCDEV_VA=0x02000000 3288df34dd2SIan Lepore * option EARLY_PRINTF 3298df34dd2SIan Lepore * Resist the temptation to change the #if 0 to #ifdef EARLY_PRINTF here. It 3308df34dd2SIan Lepore * makes sense now, but if multiple SOCs do that it will make early_putc another 3318df34dd2SIan Lepore * duplicate symbol to be eliminated on the path to a generic kernel. 3328df34dd2SIan Lepore */ 3338df34dd2SIan Lepore #if 0 3348df34dd2SIan Lepore static void 3358df34dd2SIan Lepore imx6_early_putc(int c) 3368df34dd2SIan Lepore { 3378df34dd2SIan Lepore volatile uint32_t * UART_STAT_REG = (uint32_t *)0x02020098; 3388df34dd2SIan Lepore volatile uint32_t * UART_TX_REG = (uint32_t *)0x02020040; 3398df34dd2SIan Lepore const uint32_t UART_TXRDY = (1 << 3); 3408df34dd2SIan Lepore 3418df34dd2SIan Lepore while ((*UART_STAT_REG & UART_TXRDY) == 0) 3428df34dd2SIan Lepore continue; 3438df34dd2SIan Lepore *UART_TX_REG = c; 3448df34dd2SIan Lepore } 3458df34dd2SIan Lepore early_putc_t *early_putc = imx6_early_putc; 3468df34dd2SIan Lepore #endif 3478df34dd2SIan Lepore 348ef7eac43SAndrew Turner static platform_method_t imx6_methods[] = { 349ef7eac43SAndrew Turner PLATFORMMETHOD(platform_attach, imx6_attach), 350ef7eac43SAndrew Turner PLATFORMMETHOD(platform_lastaddr, imx6_lastaddr), 351ef7eac43SAndrew Turner PLATFORMMETHOD(platform_devmap_init, imx6_devmap_init), 352ef7eac43SAndrew Turner PLATFORMMETHOD(platform_late_init, imx6_late_init), 353*0dbb8873SAndrew Turner PLATFORMMETHOD(platform_cpu_reset, imx6_cpu_reset), 354ef7eac43SAndrew Turner 355ef7eac43SAndrew Turner PLATFORMMETHOD_END, 356ef7eac43SAndrew Turner }; 357ef7eac43SAndrew Turner 358cca48a59SAndrew Turner FDT_PLATFORM_DEF2(imx6, imx6s, "i.MX6 Solo", 0, "fsl,imx6s", 0); 359cca48a59SAndrew Turner FDT_PLATFORM_DEF2(imx6, imx6d, "i.MX6 Dual", 0, "fsl,imx6d", 0); 360cca48a59SAndrew Turner FDT_PLATFORM_DEF2(imx6, imx6q, "i.MX6 Quad", 0, "fsl,imx6q", 0); 361