1962940ceSLuiz Otavio O Souza /*-
2962940ceSLuiz Otavio O Souza * Copyright (C) 2015 Daisuke Aoyama <aoyama@peach.ne.jp>
3962940ceSLuiz Otavio O Souza * All rights reserved.
4962940ceSLuiz Otavio O Souza *
5962940ceSLuiz Otavio O Souza * Redistribution and use in source and binary forms, with or without
6962940ceSLuiz Otavio O Souza * modification, are permitted provided that the following conditions
7962940ceSLuiz Otavio O Souza * are met:
8962940ceSLuiz Otavio O Souza * 1. Redistributions of source code must retain the above copyright
9962940ceSLuiz Otavio O Souza * notice, this list of conditions and the following disclaimer.
10962940ceSLuiz Otavio O Souza * 2. Redistributions in binary form must reproduce the above copyright
11962940ceSLuiz Otavio O Souza * notice, this list of conditions and the following disclaimer in the
12962940ceSLuiz Otavio O Souza * documentation and/or other materials provided with the distribution.
13962940ceSLuiz Otavio O Souza *
14962940ceSLuiz Otavio O Souza * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15962940ceSLuiz Otavio O Souza * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16962940ceSLuiz Otavio O Souza *
17962940ceSLuiz Otavio O Souza * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18962940ceSLuiz Otavio O Souza * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19962940ceSLuiz Otavio O Souza * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20962940ceSLuiz Otavio O Souza * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21962940ceSLuiz Otavio O Souza * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22962940ceSLuiz Otavio O Souza * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23962940ceSLuiz Otavio O Souza * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24962940ceSLuiz Otavio O Souza * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25962940ceSLuiz Otavio O Souza * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26962940ceSLuiz Otavio O Souza * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27962940ceSLuiz Otavio O Souza * SUCH DAMAGE.
28962940ceSLuiz Otavio O Souza *
29962940ceSLuiz Otavio O Souza */
30962940ceSLuiz Otavio O Souza
31962940ceSLuiz Otavio O Souza #include <sys/param.h>
32962940ceSLuiz Otavio O Souza #include <sys/systm.h>
33962940ceSLuiz Otavio O Souza #include <sys/kernel.h>
34962940ceSLuiz Otavio O Souza #include <sys/bus.h>
35962940ceSLuiz Otavio O Souza #include <sys/smp.h>
36962940ceSLuiz Otavio O Souza
37962940ceSLuiz Otavio O Souza #include <vm/vm.h>
38962940ceSLuiz Otavio O Souza #include <vm/pmap.h>
39962940ceSLuiz Otavio O Souza
40a89156f5SMichal Meloun #include <machine/cpu.h>
41962940ceSLuiz Otavio O Souza #include <machine/smp.h>
42962940ceSLuiz Otavio O Souza #include <machine/bus.h>
43962940ceSLuiz Otavio O Souza #include <machine/fdt.h>
44962940ceSLuiz Otavio O Souza #include <machine/intr.h>
4510912ba8SEmmanuel Vadot #include <machine/platformvar.h>
4610912ba8SEmmanuel Vadot
4710912ba8SEmmanuel Vadot #include <arm/broadcom/bcm2835/bcm2836_mp.h>
48962940ceSLuiz Otavio O Souza
49962940ceSLuiz Otavio O Souza #ifdef DEBUG
50962940ceSLuiz Otavio O Souza #define DPRINTF(fmt, ...) do { \
51962940ceSLuiz Otavio O Souza printf("%s:%u: ", __func__, __LINE__); \
52962940ceSLuiz Otavio O Souza printf(fmt, ##__VA_ARGS__); \
53962940ceSLuiz Otavio O Souza } while (0)
54962940ceSLuiz Otavio O Souza #else
55962940ceSLuiz Otavio O Souza #define DPRINTF(fmt, ...)
56962940ceSLuiz Otavio O Souza #endif
57962940ceSLuiz Otavio O Souza
58962940ceSLuiz Otavio O Souza #define ARM_LOCAL_BASE 0x40000000
59962940ceSLuiz Otavio O Souza #define ARM_LOCAL_SIZE 0x00001000
60962940ceSLuiz Otavio O Souza
61962940ceSLuiz Otavio O Souza /* mailbox registers */
62962940ceSLuiz Otavio O Souza #define MBOXINTRCTRL_CORE(n) (0x00000050 + (0x04 * (n)))
63962940ceSLuiz Otavio O Souza #define MBOX0SET_CORE(n) (0x00000080 + (0x10 * (n)))
64962940ceSLuiz Otavio O Souza #define MBOX1SET_CORE(n) (0x00000084 + (0x10 * (n)))
65962940ceSLuiz Otavio O Souza #define MBOX2SET_CORE(n) (0x00000088 + (0x10 * (n)))
66962940ceSLuiz Otavio O Souza #define MBOX3SET_CORE(n) (0x0000008C + (0x10 * (n)))
67962940ceSLuiz Otavio O Souza #define MBOX0CLR_CORE(n) (0x000000C0 + (0x10 * (n)))
68962940ceSLuiz Otavio O Souza #define MBOX1CLR_CORE(n) (0x000000C4 + (0x10 * (n)))
69962940ceSLuiz Otavio O Souza #define MBOX2CLR_CORE(n) (0x000000C8 + (0x10 * (n)))
70962940ceSLuiz Otavio O Souza #define MBOX3CLR_CORE(n) (0x000000CC + (0x10 * (n)))
71962940ceSLuiz Otavio O Souza
72962940ceSLuiz Otavio O Souza static bus_space_handle_t bs_periph;
73962940ceSLuiz Otavio O Souza
74962940ceSLuiz Otavio O Souza #define BSRD4(addr) \
75962940ceSLuiz Otavio O Souza bus_space_read_4(fdtbus_bs_tag, bs_periph, (addr))
76962940ceSLuiz Otavio O Souza #define BSWR4(addr, val) \
77962940ceSLuiz Otavio O Souza bus_space_write_4(fdtbus_bs_tag, bs_periph, (addr), (val))
78962940ceSLuiz Otavio O Souza
79962940ceSLuiz Otavio O Souza void
bcm2836_mp_setmaxid(platform_t plat)8010912ba8SEmmanuel Vadot bcm2836_mp_setmaxid(platform_t plat)
81962940ceSLuiz Otavio O Souza {
82962940ceSLuiz Otavio O Souza
83962940ceSLuiz Otavio O Souza DPRINTF("platform_mp_setmaxid\n");
84962940ceSLuiz Otavio O Souza if (mp_ncpus != 0)
85962940ceSLuiz Otavio O Souza return;
86962940ceSLuiz Otavio O Souza
87962940ceSLuiz Otavio O Souza mp_ncpus = 4;
88962940ceSLuiz Otavio O Souza mp_maxid = mp_ncpus - 1;
89962940ceSLuiz Otavio O Souza DPRINTF("mp_maxid=%d\n", mp_maxid);
90962940ceSLuiz Otavio O Souza }
91962940ceSLuiz Otavio O Souza
92962940ceSLuiz Otavio O Souza void
bcm2836_mp_start_ap(platform_t plat)9310912ba8SEmmanuel Vadot bcm2836_mp_start_ap(platform_t plat)
94962940ceSLuiz Otavio O Souza {
95962940ceSLuiz Otavio O Souza uint32_t val;
96962940ceSLuiz Otavio O Souza int i, retry;
97962940ceSLuiz Otavio O Souza
98962940ceSLuiz Otavio O Souza DPRINTF("platform_mp_start_ap\n");
99962940ceSLuiz Otavio O Souza
100962940ceSLuiz Otavio O Souza /* initialize */
101962940ceSLuiz Otavio O Souza if (bus_space_map(fdtbus_bs_tag, ARM_LOCAL_BASE, ARM_LOCAL_SIZE,
102962940ceSLuiz Otavio O Souza 0, &bs_periph) != 0)
103962940ceSLuiz Otavio O Souza panic("can't map local peripheral\n");
104962940ceSLuiz Otavio O Souza for (i = 0; i < mp_ncpus; i++) {
105962940ceSLuiz Otavio O Souza /* clear mailbox 0/3 */
106962940ceSLuiz Otavio O Souza BSWR4(MBOX0CLR_CORE(i), 0xffffffff);
107962940ceSLuiz Otavio O Souza BSWR4(MBOX3CLR_CORE(i), 0xffffffff);
108962940ceSLuiz Otavio O Souza }
109962940ceSLuiz Otavio O Souza wmb();
110a89156f5SMichal Meloun dcache_wbinv_poc_all();
111962940ceSLuiz Otavio O Souza
112962940ceSLuiz Otavio O Souza /* boot secondary CPUs */
113962940ceSLuiz Otavio O Souza for (i = 1; i < mp_ncpus; i++) {
114962940ceSLuiz Otavio O Souza /* set entry point to mailbox 3 */
115962940ceSLuiz Otavio O Souza BSWR4(MBOX3SET_CORE(i),
116962940ceSLuiz Otavio O Souza (uint32_t)pmap_kextract((vm_offset_t)mpentry));
117*ac0a9a90SIan Lepore /* Firmware put cores in WFE state, need SEV to wake up. */
118*ac0a9a90SIan Lepore dsb();
119*ac0a9a90SIan Lepore sev();
120962940ceSLuiz Otavio O Souza
121962940ceSLuiz Otavio O Souza /* wait for bootup */
122962940ceSLuiz Otavio O Souza retry = 1000;
123962940ceSLuiz Otavio O Souza do {
124962940ceSLuiz Otavio O Souza /* check entry point */
125962940ceSLuiz Otavio O Souza val = BSRD4(MBOX3CLR_CORE(i));
126962940ceSLuiz Otavio O Souza if (val == 0)
127962940ceSLuiz Otavio O Souza break;
128962940ceSLuiz Otavio O Souza DELAY(100);
129962940ceSLuiz Otavio O Souza retry--;
130962940ceSLuiz Otavio O Souza if (retry <= 0) {
131962940ceSLuiz Otavio O Souza printf("can't start for CPU%d\n", i);
132962940ceSLuiz Otavio O Souza break;
133962940ceSLuiz Otavio O Souza }
134962940ceSLuiz Otavio O Souza } while (1);
135962940ceSLuiz Otavio O Souza
136962940ceSLuiz Otavio O Souza /* dsb and sev */
1377cc70732SMichal Meloun dsb();
1387cc70732SMichal Meloun sev();
139962940ceSLuiz Otavio O Souza
140962940ceSLuiz Otavio O Souza /* recode AP in CPU map */
141962940ceSLuiz Otavio O Souza CPU_SET(i, &all_cpus);
142962940ceSLuiz Otavio O Souza }
143962940ceSLuiz Otavio O Souza }
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