xref: /freebsd/sys/arm/broadcom/bcm2835/bcm2835_vcbus.h (revision a4e5e0106ac7145f56eb39a691e302cabb4635be)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
3  *
4  * Copyright (c) 2012 Oleksandr Tymoshenko <gonzo@freebsd.org>
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  */
28 
29 /*
30  * Defines for converting physical address to VideoCore bus address and back
31  */
32 
33 #ifndef _BCM2835_VCBUS_H_
34 #define _BCM2835_VCBUS_H_
35 
36 #define	BCM2835_VCBUS_SDRAM_CACHED	0x40000000
37 #define	BCM2835_VCBUS_SDRAM_UNCACHED	0xC0000000
38 
39 #define	BCM2835_ARM_IO_BASE		0x20000000
40 #define	BCM2835_VCBUS_IO_BASE		0x7E000000
41 #define	BCM2835_VCBUS_SDRAM_BASE	BCM2835_VCBUS_SDRAM_CACHED
42 
43 #define	BCM2836_ARM_IO_BASE		0x3f000000
44 #define	BCM2836_VCBUS_IO_BASE		BCM2835_VCBUS_IO_BASE
45 #define	BCM2836_VCBUS_SDRAM_BASE	BCM2835_VCBUS_SDRAM_UNCACHED
46 
47 #define	BCM2837_ARM_IO_BASE		BCM2836_ARM_IO_BASE
48 #define	BCM2837_VCBUS_IO_BASE		BCM2835_VCBUS_IO_BASE
49 #define	BCM2837_VCBUS_SDRAM_BASE	BCM2835_VCBUS_SDRAM_UNCACHED
50 
51 #define	BCM2838_ARM_IO_BASE		0xfe000000
52 #define	BCM2838_VCBUS_IO_BASE		BCM2835_VCBUS_IO_BASE
53 #define	BCM2838_VCBUS_SDRAM_BASE	BCM2835_VCBUS_SDRAM_UNCACHED
54 
55 /*
56  * Max allowed SDRAM mapping for most peripherals.  The Raspberry Pi 4 has more
57  * than 1 GB of SDRAM, but only the lowest 1 GB is mapped into the "Legacy
58  * Master view" of the address space accessible by the DMA engine.  Technically,
59  * we can slide this window around to whatever similarly sized range is
60  * convenient, but this is the most useful window given how busdma(9) works and
61  * that the window must be reconfigured for all channels in a given DMA engine.
62  * The DMA lite engine's window can be configured separately from the 30-bit DMA
63  * engine.
64  */
65 #define	BCM2838_PERIPH_MAXADDR		0x3fffffff
66 
67 #define	BCM28XX_ARM_IO_SIZE		0x01000000
68 
69 vm_paddr_t bcm283x_armc_to_vcbus(vm_paddr_t pa);
70 vm_paddr_t bcm283x_vcbus_to_armc(vm_paddr_t vca);
71 bus_addr_t bcm283x_dmabus_peripheral_lowaddr(void);
72 
73 #define	ARMC_TO_VCBUS(pa)	bcm283x_armc_to_vcbus(pa)
74 #define	VCBUS_TO_ARMC(vca)	bcm283x_vcbus_to_armc(vca)
75 
76 /* Compatibility name for vchiq arm interface. */
77 #define	PHYS_TO_VCBUS		ARMC_TO_VCBUS
78 
79 #endif /* _BCM2835_VCBUS_H_ */
80