1a9387eb1SOleksandr Tymoshenko /*- 2af3dc4a7SPedro F. Giffuni * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3af3dc4a7SPedro F. Giffuni * 4a9387eb1SOleksandr Tymoshenko * Copyright (c) 2012 Oleksandr Tymoshenko <gonzo@freebsd.org> 5a9387eb1SOleksandr Tymoshenko * All rights reserved. 6a9387eb1SOleksandr Tymoshenko * 7a9387eb1SOleksandr Tymoshenko * Redistribution and use in source and binary forms, with or without 8a9387eb1SOleksandr Tymoshenko * modification, are permitted provided that the following conditions 9a9387eb1SOleksandr Tymoshenko * are met: 10a9387eb1SOleksandr Tymoshenko * 1. Redistributions of source code must retain the above copyright 11a9387eb1SOleksandr Tymoshenko * notice, this list of conditions and the following disclaimer. 12a9387eb1SOleksandr Tymoshenko * 2. Redistributions in binary form must reproduce the above copyright 13a9387eb1SOleksandr Tymoshenko * notice, this list of conditions and the following disclaimer in the 14a9387eb1SOleksandr Tymoshenko * documentation and/or other materials provided with the distribution. 15a9387eb1SOleksandr Tymoshenko * 16a9387eb1SOleksandr Tymoshenko * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17a9387eb1SOleksandr Tymoshenko * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18a9387eb1SOleksandr Tymoshenko * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19a9387eb1SOleksandr Tymoshenko * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20a9387eb1SOleksandr Tymoshenko * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21a9387eb1SOleksandr Tymoshenko * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22a9387eb1SOleksandr Tymoshenko * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23a9387eb1SOleksandr Tymoshenko * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24a9387eb1SOleksandr Tymoshenko * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25a9387eb1SOleksandr Tymoshenko * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26a9387eb1SOleksandr Tymoshenko * SUCH DAMAGE. 27a9387eb1SOleksandr Tymoshenko * 28a9387eb1SOleksandr Tymoshenko */ 29a9387eb1SOleksandr Tymoshenko #include <sys/cdefs.h> 30a9387eb1SOleksandr Tymoshenko __FBSDID("$FreeBSD$"); 31a9387eb1SOleksandr Tymoshenko 32a9387eb1SOleksandr Tymoshenko #include <sys/param.h> 33a9387eb1SOleksandr Tymoshenko #include <sys/systm.h> 34a9387eb1SOleksandr Tymoshenko #include <sys/bus.h> 35a9387eb1SOleksandr Tymoshenko #include <sys/kernel.h> 36a9387eb1SOleksandr Tymoshenko #include <sys/lock.h> 37a9387eb1SOleksandr Tymoshenko #include <sys/malloc.h> 38a9387eb1SOleksandr Tymoshenko #include <sys/module.h> 39a9387eb1SOleksandr Tymoshenko #include <sys/mutex.h> 40a9387eb1SOleksandr Tymoshenko #include <sys/rman.h> 418c8f31e7SIan Lepore #include <sys/sysctl.h> 42a9387eb1SOleksandr Tymoshenko #include <sys/taskqueue.h> 43a9387eb1SOleksandr Tymoshenko 44a9387eb1SOleksandr Tymoshenko #include <machine/bus.h> 45a9387eb1SOleksandr Tymoshenko 46a9387eb1SOleksandr Tymoshenko #include <dev/ofw/ofw_bus.h> 47a9387eb1SOleksandr Tymoshenko #include <dev/ofw/ofw_bus_subr.h> 48a9387eb1SOleksandr Tymoshenko 49a9387eb1SOleksandr Tymoshenko #include <dev/mmc/bridge.h> 50a9387eb1SOleksandr Tymoshenko #include <dev/mmc/mmcreg.h> 51a9387eb1SOleksandr Tymoshenko 52a9387eb1SOleksandr Tymoshenko #include <dev/sdhci/sdhci.h> 53b440e965SMarius Strobl 54b440e965SMarius Strobl #include "mmcbr_if.h" 55a9387eb1SOleksandr Tymoshenko #include "sdhci_if.h" 56a9387eb1SOleksandr Tymoshenko 57a94a63f0SWarner Losh #include "opt_mmccam.h" 58a94a63f0SWarner Losh 59adc99a8aSOleksandr Tymoshenko #include "bcm2835_dma.h" 6027eb3304SAndrew Turner #include <arm/broadcom/bcm2835/bcm2835_mbox_prop.h> 61939f1d8fSKyle Evans #ifdef NOTYET 62939f1d8fSKyle Evans #include <arm/broadcom/bcm2835/bcm2835_clkman.h> 63939f1d8fSKyle Evans #endif 64adc99a8aSOleksandr Tymoshenko 653b37b3c2SOleksandr Tymoshenko #define BCM2835_DEFAULT_SDHCI_FREQ 50 66939f1d8fSKyle Evans #define BCM2838_DEFAULT_SDHCI_FREQ 100 673b37b3c2SOleksandr Tymoshenko 68adc99a8aSOleksandr Tymoshenko #define BCM_SDHCI_BUFFER_SIZE 512 69244fe94fSIan Lepore #define NUM_DMA_SEGS 2 70adc99a8aSOleksandr Tymoshenko 71a9387eb1SOleksandr Tymoshenko #ifdef DEBUG 72fe2825beSBjoern A. Zeeb static int bcm2835_sdhci_debug = 0; 73fe2825beSBjoern A. Zeeb 74fe2825beSBjoern A. Zeeb TUNABLE_INT("hw.bcm2835.sdhci.debug", &bcm2835_sdhci_debug); 75fe2825beSBjoern A. Zeeb SYSCTL_INT(_hw_sdhci, OID_AUTO, bcm2835_sdhci_debug, CTLFLAG_RWTUN, 76fe2825beSBjoern A. Zeeb &bcm2835_sdhci_debug, 0, "bcm2835 SDHCI debug level"); 77fe2825beSBjoern A. Zeeb 78fe2825beSBjoern A. Zeeb #define dprintf(fmt, args...) \ 79fe2825beSBjoern A. Zeeb do { \ 80fe2825beSBjoern A. Zeeb if (bcm2835_sdhci_debug) \ 81fe2825beSBjoern A. Zeeb printf("%s: " fmt, __func__, ##args); \ 82fe2825beSBjoern A. Zeeb } while (0) 83a9387eb1SOleksandr Tymoshenko #else 84a9387eb1SOleksandr Tymoshenko #define dprintf(fmt, args...) 85a9387eb1SOleksandr Tymoshenko #endif 86a9387eb1SOleksandr Tymoshenko 87bba987dcSIan Lepore static int bcm2835_sdhci_hs = 1; 88382ac7c8SLuiz Otavio O Souza static int bcm2835_sdhci_pio_mode = 0; 89d3d7f709SOleksandr Tymoshenko 90939f1d8fSKyle Evans struct bcm_mmc_conf { 91939f1d8fSKyle Evans int clock_id; 92939f1d8fSKyle Evans int clock_src; 93939f1d8fSKyle Evans int default_freq; 94939f1d8fSKyle Evans int quirks; 95939f1d8fSKyle Evans bool use_dma; 96939f1d8fSKyle Evans }; 97939f1d8fSKyle Evans 98939f1d8fSKyle Evans struct bcm_mmc_conf bcm2835_sdhci_conf = { 99939f1d8fSKyle Evans .clock_id = BCM2835_MBOX_CLOCK_ID_EMMC, 100939f1d8fSKyle Evans .clock_src = -1, 101939f1d8fSKyle Evans .default_freq = BCM2835_DEFAULT_SDHCI_FREQ, 102939f1d8fSKyle Evans .quirks = SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK | 103939f1d8fSKyle Evans SDHCI_QUIRK_BROKEN_TIMEOUT_VAL | SDHCI_QUIRK_DONT_SET_HISPD_BIT | 104939f1d8fSKyle Evans SDHCI_QUIRK_MISSING_CAPS, 105939f1d8fSKyle Evans .use_dma = true 106939f1d8fSKyle Evans }; 107939f1d8fSKyle Evans 108939f1d8fSKyle Evans struct bcm_mmc_conf bcm2838_emmc2_conf = { 109939f1d8fSKyle Evans .clock_id = BCM2838_MBOX_CLOCK_ID_EMMC2, 110939f1d8fSKyle Evans .clock_src = -1, 111939f1d8fSKyle Evans .default_freq = BCM2838_DEFAULT_SDHCI_FREQ, 112939f1d8fSKyle Evans .quirks = 0, 113939f1d8fSKyle Evans /* XXX DMA is currently broken, but it shouldn't be. */ 114939f1d8fSKyle Evans .use_dma = false 115939f1d8fSKyle Evans }; 116939f1d8fSKyle Evans 1179d6eb8bbSOleksandr Tymoshenko static struct ofw_compat_data compat_data[] = { 118939f1d8fSKyle Evans {"broadcom,bcm2835-sdhci", (uintptr_t)&bcm2835_sdhci_conf}, 119939f1d8fSKyle Evans {"brcm,bcm2835-sdhci", (uintptr_t)&bcm2835_sdhci_conf}, 120939f1d8fSKyle Evans {"brcm,bcm2835-mmc", (uintptr_t)&bcm2835_sdhci_conf}, 121939f1d8fSKyle Evans {"brcm,bcm2711-emmc2", (uintptr_t)&bcm2838_emmc2_conf}, 122939f1d8fSKyle Evans {"brcm,bcm2838-emmc2", (uintptr_t)&bcm2838_emmc2_conf}, 1239d6eb8bbSOleksandr Tymoshenko {NULL, 0} 1249d6eb8bbSOleksandr Tymoshenko }; 1259d6eb8bbSOleksandr Tymoshenko 126d3d7f709SOleksandr Tymoshenko TUNABLE_INT("hw.bcm2835.sdhci.hs", &bcm2835_sdhci_hs); 127adc99a8aSOleksandr Tymoshenko TUNABLE_INT("hw.bcm2835.sdhci.pio_mode", &bcm2835_sdhci_pio_mode); 128d3d7f709SOleksandr Tymoshenko 129a9387eb1SOleksandr Tymoshenko struct bcm_sdhci_softc { 130a9387eb1SOleksandr Tymoshenko device_t sc_dev; 131a9387eb1SOleksandr Tymoshenko struct resource * sc_mem_res; 132a9387eb1SOleksandr Tymoshenko struct resource * sc_irq_res; 133a9387eb1SOleksandr Tymoshenko bus_space_tag_t sc_bst; 134a9387eb1SOleksandr Tymoshenko bus_space_handle_t sc_bsh; 135a9387eb1SOleksandr Tymoshenko void * sc_intrhand; 136a9387eb1SOleksandr Tymoshenko struct mmc_request * sc_req; 137a9387eb1SOleksandr Tymoshenko struct sdhci_slot sc_slot; 138adc99a8aSOleksandr Tymoshenko int sc_dma_ch; 139adc99a8aSOleksandr Tymoshenko bus_dma_tag_t sc_dma_tag; 140adc99a8aSOleksandr Tymoshenko bus_dmamap_t sc_dma_map; 141b479b38cSIan Lepore vm_paddr_t sc_sdhci_buffer_phys; 142244fe94fSIan Lepore bus_addr_t dmamap_seg_addrs[NUM_DMA_SEGS]; 143244fe94fSIan Lepore bus_size_t dmamap_seg_sizes[NUM_DMA_SEGS]; 144bf160401SIan Lepore int dmamap_seg_count; 145244fe94fSIan Lepore int dmamap_seg_index; 146bf160401SIan Lepore int dmamap_status; 147901491d0SBjoern A. Zeeb uint32_t blksz_and_count; 148901491d0SBjoern A. Zeeb uint32_t cmd_and_mode; 149901491d0SBjoern A. Zeeb bool need_update_blk; 150939f1d8fSKyle Evans #ifdef NOTYET 151939f1d8fSKyle Evans device_t clkman; 152939f1d8fSKyle Evans #endif 153939f1d8fSKyle Evans struct bcm_mmc_conf * conf; 154a9387eb1SOleksandr Tymoshenko }; 155a9387eb1SOleksandr Tymoshenko 156a9387eb1SOleksandr Tymoshenko static int bcm_sdhci_probe(device_t); 157a9387eb1SOleksandr Tymoshenko static int bcm_sdhci_attach(device_t); 158a9387eb1SOleksandr Tymoshenko static int bcm_sdhci_detach(device_t); 159a9387eb1SOleksandr Tymoshenko static void bcm_sdhci_intr(void *); 160a9387eb1SOleksandr Tymoshenko 161a9387eb1SOleksandr Tymoshenko static int bcm_sdhci_get_ro(device_t, device_t); 162adc99a8aSOleksandr Tymoshenko static void bcm_sdhci_dma_intr(int ch, void *arg); 163a9387eb1SOleksandr Tymoshenko 164adc99a8aSOleksandr Tymoshenko static void 165bf160401SIan Lepore bcm_sdhci_dmacb(void *arg, bus_dma_segment_t *segs, int nseg, int err) 166adc99a8aSOleksandr Tymoshenko { 167bf160401SIan Lepore struct bcm_sdhci_softc *sc = arg; 168bf160401SIan Lepore int i; 169adc99a8aSOleksandr Tymoshenko 170*c22f8ca6SKyle Evans /* Sanity check: we can only ever have one mapping at a time. */ 171*c22f8ca6SKyle Evans KASSERT(sc->dmamap_seg_count == 0, ("leaked DMA segment")); 172bf160401SIan Lepore sc->dmamap_status = err; 173bf160401SIan Lepore sc->dmamap_seg_count = nseg; 174adc99a8aSOleksandr Tymoshenko 175bf160401SIan Lepore /* Note nseg is guaranteed to be zero if err is non-zero. */ 176bf160401SIan Lepore for (i = 0; i < nseg; i++) { 177bf160401SIan Lepore sc->dmamap_seg_addrs[i] = segs[i].ds_addr; 178bf160401SIan Lepore sc->dmamap_seg_sizes[i] = segs[i].ds_len; 179bf160401SIan Lepore } 180adc99a8aSOleksandr Tymoshenko } 181adc99a8aSOleksandr Tymoshenko 182a9387eb1SOleksandr Tymoshenko static int 183a9387eb1SOleksandr Tymoshenko bcm_sdhci_probe(device_t dev) 184a9387eb1SOleksandr Tymoshenko { 185add35ed5SIan Lepore 186add35ed5SIan Lepore if (!ofw_bus_status_okay(dev)) 187add35ed5SIan Lepore return (ENXIO); 188add35ed5SIan Lepore 1899d6eb8bbSOleksandr Tymoshenko if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) 190a9387eb1SOleksandr Tymoshenko return (ENXIO); 191a9387eb1SOleksandr Tymoshenko 192a9387eb1SOleksandr Tymoshenko device_set_desc(dev, "Broadcom 2708 SDHCI controller"); 1939d6eb8bbSOleksandr Tymoshenko 194a9387eb1SOleksandr Tymoshenko return (BUS_PROBE_DEFAULT); 195a9387eb1SOleksandr Tymoshenko } 196a9387eb1SOleksandr Tymoshenko 197a9387eb1SOleksandr Tymoshenko static int 198a9387eb1SOleksandr Tymoshenko bcm_sdhci_attach(device_t dev) 199a9387eb1SOleksandr Tymoshenko { 200a9387eb1SOleksandr Tymoshenko struct bcm_sdhci_softc *sc = device_get_softc(dev); 201a9387eb1SOleksandr Tymoshenko int rid, err; 2023b37b3c2SOleksandr Tymoshenko phandle_t node; 2033b37b3c2SOleksandr Tymoshenko pcell_t cell; 20427eb3304SAndrew Turner u_int default_freq; 205a9387eb1SOleksandr Tymoshenko 206a9387eb1SOleksandr Tymoshenko sc->sc_dev = dev; 207a9387eb1SOleksandr Tymoshenko sc->sc_req = NULL; 208a9387eb1SOleksandr Tymoshenko 209939f1d8fSKyle Evans sc->conf = (struct bcm_mmc_conf *)ofw_bus_search_compatible(dev, 210939f1d8fSKyle Evans compat_data)->ocd_data; 211939f1d8fSKyle Evans if (sc->conf == 0) 212939f1d8fSKyle Evans return (ENXIO); 213939f1d8fSKyle Evans 214939f1d8fSKyle Evans err = bcm2835_mbox_set_power_state(BCM2835_MBOX_POWER_ID_EMMC, TRUE); 21527eb3304SAndrew Turner if (err != 0) { 21627eb3304SAndrew Turner if (bootverbose) 21727eb3304SAndrew Turner device_printf(dev, "Unable to enable the power\n"); 21827eb3304SAndrew Turner return (err); 21927eb3304SAndrew Turner } 22027eb3304SAndrew Turner 22127eb3304SAndrew Turner default_freq = 0; 222939f1d8fSKyle Evans err = bcm2835_mbox_get_clock_rate(sc->conf->clock_id, &default_freq); 22327eb3304SAndrew Turner if (err == 0) { 22427eb3304SAndrew Turner /* Convert to MHz */ 22527eb3304SAndrew Turner default_freq /= 1000000; 226b7fbc369SLuiz Otavio O Souza } 227b7fbc369SLuiz Otavio O Souza if (default_freq == 0) { 228b7fbc369SLuiz Otavio O Souza node = ofw_bus_get_node(sc->sc_dev); 229b7fbc369SLuiz Otavio O Souza if ((OF_getencprop(node, "clock-frequency", &cell, 230b7fbc369SLuiz Otavio O Souza sizeof(cell))) > 0) 231b7fbc369SLuiz Otavio O Souza default_freq = cell / 1000000; 23227eb3304SAndrew Turner } 23327eb3304SAndrew Turner if (default_freq == 0) 234939f1d8fSKyle Evans default_freq = sc->conf->default_freq; 23527eb3304SAndrew Turner 23627eb3304SAndrew Turner if (bootverbose) 23727eb3304SAndrew Turner device_printf(dev, "SDHCI frequency: %dMHz\n", default_freq); 238939f1d8fSKyle Evans #ifdef NOTYET 239939f1d8fSKyle Evans if (sc->conf->clock_src > 0) { 240939f1d8fSKyle Evans uint32_t f; 241939f1d8fSKyle Evans sc->clkman = devclass_get_device(devclass_find("bcm2835_clkman"), 0); 242939f1d8fSKyle Evans if (sc->clkman == NULL) { 243939f1d8fSKyle Evans device_printf(dev, "cannot find Clock Manager\n"); 244939f1d8fSKyle Evans return (ENXIO); 245939f1d8fSKyle Evans } 246939f1d8fSKyle Evans 247939f1d8fSKyle Evans f = bcm2835_clkman_set_frequency(sc->clkman, sc->conf->clock_src, default_freq); 248939f1d8fSKyle Evans if (f == 0) 249939f1d8fSKyle Evans return (EINVAL); 250939f1d8fSKyle Evans 251939f1d8fSKyle Evans if (bootverbose) 252939f1d8fSKyle Evans device_printf(dev, "Clock source frequency: %dMHz\n", f); 253939f1d8fSKyle Evans } 254939f1d8fSKyle Evans #endif 2553b37b3c2SOleksandr Tymoshenko 256a9387eb1SOleksandr Tymoshenko rid = 0; 257a9387eb1SOleksandr Tymoshenko sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, 258a9387eb1SOleksandr Tymoshenko RF_ACTIVE); 259a9387eb1SOleksandr Tymoshenko if (!sc->sc_mem_res) { 260a9387eb1SOleksandr Tymoshenko device_printf(dev, "cannot allocate memory window\n"); 261a9387eb1SOleksandr Tymoshenko err = ENXIO; 262a9387eb1SOleksandr Tymoshenko goto fail; 263a9387eb1SOleksandr Tymoshenko } 264a9387eb1SOleksandr Tymoshenko 265a9387eb1SOleksandr Tymoshenko sc->sc_bst = rman_get_bustag(sc->sc_mem_res); 266a9387eb1SOleksandr Tymoshenko sc->sc_bsh = rman_get_bushandle(sc->sc_mem_res); 267a9387eb1SOleksandr Tymoshenko 268a9387eb1SOleksandr Tymoshenko rid = 0; 269a9387eb1SOleksandr Tymoshenko sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 270939f1d8fSKyle Evans RF_ACTIVE | RF_SHAREABLE); 271a9387eb1SOleksandr Tymoshenko if (!sc->sc_irq_res) { 272a9387eb1SOleksandr Tymoshenko device_printf(dev, "cannot allocate interrupt\n"); 273a9387eb1SOleksandr Tymoshenko err = ENXIO; 274a9387eb1SOleksandr Tymoshenko goto fail; 275a9387eb1SOleksandr Tymoshenko } 276a9387eb1SOleksandr Tymoshenko 277b479b38cSIan Lepore if (bus_setup_intr(dev, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE, 27807c7a520SLuiz Otavio O Souza NULL, bcm_sdhci_intr, sc, &sc->sc_intrhand)) { 279a9387eb1SOleksandr Tymoshenko device_printf(dev, "cannot setup interrupt handler\n"); 280a9387eb1SOleksandr Tymoshenko err = ENXIO; 281a9387eb1SOleksandr Tymoshenko goto fail; 282a9387eb1SOleksandr Tymoshenko } 283a9387eb1SOleksandr Tymoshenko 284adc99a8aSOleksandr Tymoshenko if (!bcm2835_sdhci_pio_mode) 285adc99a8aSOleksandr Tymoshenko sc->sc_slot.opt = SDHCI_PLATFORM_TRANSFER; 286adc99a8aSOleksandr Tymoshenko 287d3d7f709SOleksandr Tymoshenko sc->sc_slot.caps = SDHCI_CAN_VDD_330 | SDHCI_CAN_VDD_180; 288d3d7f709SOleksandr Tymoshenko if (bcm2835_sdhci_hs) 289d3d7f709SOleksandr Tymoshenko sc->sc_slot.caps |= SDHCI_CAN_DO_HISPD; 2903b37b3c2SOleksandr Tymoshenko sc->sc_slot.caps |= (default_freq << SDHCI_CLOCK_BASE_SHIFT); 291939f1d8fSKyle Evans sc->sc_slot.quirks = sc->conf->quirks; 292a9387eb1SOleksandr Tymoshenko 293a9387eb1SOleksandr Tymoshenko sdhci_init_slot(dev, &sc->sc_slot, 0); 294a9387eb1SOleksandr Tymoshenko 295939f1d8fSKyle Evans if (sc->conf->use_dma) { 296adc99a8aSOleksandr Tymoshenko sc->sc_dma_ch = bcm_dma_allocate(BCM_DMA_CH_ANY); 297adc99a8aSOleksandr Tymoshenko if (sc->sc_dma_ch == BCM_DMA_CH_INVALID) 298adc99a8aSOleksandr Tymoshenko goto fail; 299adc99a8aSOleksandr Tymoshenko 300939f1d8fSKyle Evans if (bcm_dma_setup_intr(sc->sc_dma_ch, bcm_sdhci_dma_intr, sc) != 0) { 301939f1d8fSKyle Evans device_printf(dev, "cannot setup dma interrupt handler\n"); 302939f1d8fSKyle Evans err = ENXIO; 303939f1d8fSKyle Evans goto fail; 304939f1d8fSKyle Evans } 305adc99a8aSOleksandr Tymoshenko 306b479b38cSIan Lepore /* Allocate bus_dma resources. */ 307adc99a8aSOleksandr Tymoshenko err = bus_dma_tag_create(bus_get_dma_tag(dev), 308adc99a8aSOleksandr Tymoshenko 1, 0, BUS_SPACE_MAXADDR_32BIT, 309adc99a8aSOleksandr Tymoshenko BUS_SPACE_MAXADDR, NULL, NULL, 310244fe94fSIan Lepore BCM_SDHCI_BUFFER_SIZE, NUM_DMA_SEGS, BCM_SDHCI_BUFFER_SIZE, 311adc99a8aSOleksandr Tymoshenko BUS_DMA_ALLOCNOW, NULL, NULL, 312adc99a8aSOleksandr Tymoshenko &sc->sc_dma_tag); 313adc99a8aSOleksandr Tymoshenko 314adc99a8aSOleksandr Tymoshenko if (err) { 315adc99a8aSOleksandr Tymoshenko device_printf(dev, "failed allocate DMA tag"); 316adc99a8aSOleksandr Tymoshenko goto fail; 317adc99a8aSOleksandr Tymoshenko } 318adc99a8aSOleksandr Tymoshenko 319b479b38cSIan Lepore err = bus_dmamap_create(sc->sc_dma_tag, 0, &sc->sc_dma_map); 320adc99a8aSOleksandr Tymoshenko if (err) { 321b479b38cSIan Lepore device_printf(dev, "bus_dmamap_create failed\n"); 322adc99a8aSOleksandr Tymoshenko goto fail; 323adc99a8aSOleksandr Tymoshenko } 324939f1d8fSKyle Evans } 325adc99a8aSOleksandr Tymoshenko 3268ff1636cSOleksandr Tymoshenko /* FIXME: Fix along with other BUS_SPACE_PHYSADDR instances */ 3278ff1636cSOleksandr Tymoshenko sc->sc_sdhci_buffer_phys = rman_get_start(sc->sc_mem_res) + 3288ff1636cSOleksandr Tymoshenko SDHCI_BUFFER; 329adc99a8aSOleksandr Tymoshenko 330a9387eb1SOleksandr Tymoshenko bus_generic_probe(dev); 331a9387eb1SOleksandr Tymoshenko bus_generic_attach(dev); 332a9387eb1SOleksandr Tymoshenko 333a9387eb1SOleksandr Tymoshenko sdhci_start_slot(&sc->sc_slot); 334a9387eb1SOleksandr Tymoshenko 335901491d0SBjoern A. Zeeb /* Seed our copies. */ 336901491d0SBjoern A. Zeeb sc->blksz_and_count = SDHCI_READ_4(dev, &sc->sc_slot, SDHCI_BLOCK_SIZE); 337901491d0SBjoern A. Zeeb sc->cmd_and_mode = SDHCI_READ_4(dev, &sc->sc_slot, SDHCI_TRANSFER_MODE); 338901491d0SBjoern A. Zeeb 339a9387eb1SOleksandr Tymoshenko return (0); 340a9387eb1SOleksandr Tymoshenko 341a9387eb1SOleksandr Tymoshenko fail: 342a9387eb1SOleksandr Tymoshenko if (sc->sc_intrhand) 343a9387eb1SOleksandr Tymoshenko bus_teardown_intr(dev, sc->sc_irq_res, sc->sc_intrhand); 344a9387eb1SOleksandr Tymoshenko if (sc->sc_irq_res) 345a9387eb1SOleksandr Tymoshenko bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_irq_res); 346a9387eb1SOleksandr Tymoshenko if (sc->sc_mem_res) 347a9387eb1SOleksandr Tymoshenko bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res); 348a9387eb1SOleksandr Tymoshenko 349a9387eb1SOleksandr Tymoshenko return (err); 350a9387eb1SOleksandr Tymoshenko } 351a9387eb1SOleksandr Tymoshenko 352a9387eb1SOleksandr Tymoshenko static int 353a9387eb1SOleksandr Tymoshenko bcm_sdhci_detach(device_t dev) 354a9387eb1SOleksandr Tymoshenko { 355a9387eb1SOleksandr Tymoshenko 356a9387eb1SOleksandr Tymoshenko return (EBUSY); 357a9387eb1SOleksandr Tymoshenko } 358a9387eb1SOleksandr Tymoshenko 359a9387eb1SOleksandr Tymoshenko static void 360a9387eb1SOleksandr Tymoshenko bcm_sdhci_intr(void *arg) 361a9387eb1SOleksandr Tymoshenko { 362a9387eb1SOleksandr Tymoshenko struct bcm_sdhci_softc *sc = arg; 363a9387eb1SOleksandr Tymoshenko 364a9387eb1SOleksandr Tymoshenko sdhci_generic_intr(&sc->sc_slot); 365a9387eb1SOleksandr Tymoshenko } 366a9387eb1SOleksandr Tymoshenko 367a9387eb1SOleksandr Tymoshenko static int 368a9387eb1SOleksandr Tymoshenko bcm_sdhci_get_ro(device_t bus, device_t child) 369a9387eb1SOleksandr Tymoshenko { 370a9387eb1SOleksandr Tymoshenko 371a9387eb1SOleksandr Tymoshenko return (0); 372a9387eb1SOleksandr Tymoshenko } 373a9387eb1SOleksandr Tymoshenko 374a9387eb1SOleksandr Tymoshenko static inline uint32_t 375a9387eb1SOleksandr Tymoshenko RD4(struct bcm_sdhci_softc *sc, bus_size_t off) 376a9387eb1SOleksandr Tymoshenko { 377a9387eb1SOleksandr Tymoshenko uint32_t val = bus_space_read_4(sc->sc_bst, sc->sc_bsh, off); 378a9387eb1SOleksandr Tymoshenko return val; 379a9387eb1SOleksandr Tymoshenko } 380a9387eb1SOleksandr Tymoshenko 381a9387eb1SOleksandr Tymoshenko static inline void 382a9387eb1SOleksandr Tymoshenko WR4(struct bcm_sdhci_softc *sc, bus_size_t off, uint32_t val) 383a9387eb1SOleksandr Tymoshenko { 3847c26b0a7SLuiz Otavio O Souza 385a9387eb1SOleksandr Tymoshenko bus_space_write_4(sc->sc_bst, sc->sc_bsh, off, val); 3867c26b0a7SLuiz Otavio O Souza /* 3877c26b0a7SLuiz Otavio O Souza * The Arasan HC has a bug where it may lose the content of 3887c26b0a7SLuiz Otavio O Souza * consecutive writes to registers that are within two SD-card 3897c26b0a7SLuiz Otavio O Souza * clock cycles of each other (a clock domain crossing problem). 3907c26b0a7SLuiz Otavio O Souza */ 3917c26b0a7SLuiz Otavio O Souza if (sc->sc_slot.clock > 0) 3927c26b0a7SLuiz Otavio O Souza DELAY(((2 * 1000000) / sc->sc_slot.clock) + 1); 393a9387eb1SOleksandr Tymoshenko } 394a9387eb1SOleksandr Tymoshenko 395a9387eb1SOleksandr Tymoshenko static uint8_t 396a9387eb1SOleksandr Tymoshenko bcm_sdhci_read_1(device_t dev, struct sdhci_slot *slot, bus_size_t off) 397a9387eb1SOleksandr Tymoshenko { 398a9387eb1SOleksandr Tymoshenko struct bcm_sdhci_softc *sc = device_get_softc(dev); 399a9387eb1SOleksandr Tymoshenko uint32_t val = RD4(sc, off & ~3); 400a9387eb1SOleksandr Tymoshenko 401a9387eb1SOleksandr Tymoshenko return ((val >> (off & 3)*8) & 0xff); 402a9387eb1SOleksandr Tymoshenko } 403a9387eb1SOleksandr Tymoshenko 404a9387eb1SOleksandr Tymoshenko static uint16_t 405a9387eb1SOleksandr Tymoshenko bcm_sdhci_read_2(device_t dev, struct sdhci_slot *slot, bus_size_t off) 406a9387eb1SOleksandr Tymoshenko { 407a9387eb1SOleksandr Tymoshenko struct bcm_sdhci_softc *sc = device_get_softc(dev); 408901491d0SBjoern A. Zeeb uint32_t val32; 409a9387eb1SOleksandr Tymoshenko 410bffed0e9SIan Lepore /* 411901491d0SBjoern A. Zeeb * Standard 32-bit handling of command and transfer mode, as 412901491d0SBjoern A. Zeeb * well as block size and count. 413bffed0e9SIan Lepore */ 414901491d0SBjoern A. Zeeb if ((off == SDHCI_BLOCK_SIZE || off == SDHCI_BLOCK_COUNT) && 415901491d0SBjoern A. Zeeb sc->need_update_blk) 416901491d0SBjoern A. Zeeb val32 = sc->blksz_and_count; 417901491d0SBjoern A. Zeeb else if (off == SDHCI_TRANSFER_MODE || off == SDHCI_COMMAND_FLAGS) 418901491d0SBjoern A. Zeeb val32 = sc->cmd_and_mode; 419901491d0SBjoern A. Zeeb else 420901491d0SBjoern A. Zeeb val32 = RD4(sc, off & ~3); 421901491d0SBjoern A. Zeeb 422901491d0SBjoern A. Zeeb return ((val32 >> (off & 3)*8) & 0xffff); 423a9387eb1SOleksandr Tymoshenko } 424a9387eb1SOleksandr Tymoshenko 425a9387eb1SOleksandr Tymoshenko static uint32_t 426a9387eb1SOleksandr Tymoshenko bcm_sdhci_read_4(device_t dev, struct sdhci_slot *slot, bus_size_t off) 427a9387eb1SOleksandr Tymoshenko { 428a9387eb1SOleksandr Tymoshenko struct bcm_sdhci_softc *sc = device_get_softc(dev); 429a9387eb1SOleksandr Tymoshenko 430a9387eb1SOleksandr Tymoshenko return RD4(sc, off); 431a9387eb1SOleksandr Tymoshenko } 432a9387eb1SOleksandr Tymoshenko 433a9387eb1SOleksandr Tymoshenko static void 434a9387eb1SOleksandr Tymoshenko bcm_sdhci_read_multi_4(device_t dev, struct sdhci_slot *slot, bus_size_t off, 435a9387eb1SOleksandr Tymoshenko uint32_t *data, bus_size_t count) 436a9387eb1SOleksandr Tymoshenko { 437a9387eb1SOleksandr Tymoshenko struct bcm_sdhci_softc *sc = device_get_softc(dev); 438a9387eb1SOleksandr Tymoshenko 439a9387eb1SOleksandr Tymoshenko bus_space_read_multi_4(sc->sc_bst, sc->sc_bsh, off, data, count); 440a9387eb1SOleksandr Tymoshenko } 441a9387eb1SOleksandr Tymoshenko 442a9387eb1SOleksandr Tymoshenko static void 443a9387eb1SOleksandr Tymoshenko bcm_sdhci_write_1(device_t dev, struct sdhci_slot *slot, bus_size_t off, uint8_t val) 444a9387eb1SOleksandr Tymoshenko { 445a9387eb1SOleksandr Tymoshenko struct bcm_sdhci_softc *sc = device_get_softc(dev); 446a9387eb1SOleksandr Tymoshenko uint32_t val32 = RD4(sc, off & ~3); 447a9387eb1SOleksandr Tymoshenko val32 &= ~(0xff << (off & 3)*8); 448a9387eb1SOleksandr Tymoshenko val32 |= (val << (off & 3)*8); 449a9387eb1SOleksandr Tymoshenko WR4(sc, off & ~3, val32); 450a9387eb1SOleksandr Tymoshenko } 451a9387eb1SOleksandr Tymoshenko 452a9387eb1SOleksandr Tymoshenko static void 453a9387eb1SOleksandr Tymoshenko bcm_sdhci_write_2(device_t dev, struct sdhci_slot *slot, bus_size_t off, uint16_t val) 454a9387eb1SOleksandr Tymoshenko { 455a9387eb1SOleksandr Tymoshenko struct bcm_sdhci_softc *sc = device_get_softc(dev); 456a9387eb1SOleksandr Tymoshenko uint32_t val32; 457901491d0SBjoern A. Zeeb 458901491d0SBjoern A. Zeeb /* 459901491d0SBjoern A. Zeeb * If we have a queued up 16bit value for blk size or count, use and 460901491d0SBjoern A. Zeeb * update the saved value rather than doing any real register access. 461901491d0SBjoern A. Zeeb * If we did not touch either since the last write, then read from 462901491d0SBjoern A. Zeeb * register as at least block count can change. 463901491d0SBjoern A. Zeeb * Similarly, if we are about to issue a command, always use the saved 464901491d0SBjoern A. Zeeb * value for transfer mode as we can never write that without issuing 465901491d0SBjoern A. Zeeb * a command. 466901491d0SBjoern A. Zeeb */ 467901491d0SBjoern A. Zeeb if ((off == SDHCI_BLOCK_SIZE || off == SDHCI_BLOCK_COUNT) && 468901491d0SBjoern A. Zeeb sc->need_update_blk) 469901491d0SBjoern A. Zeeb val32 = sc->blksz_and_count; 470901491d0SBjoern A. Zeeb else if (off == SDHCI_COMMAND_FLAGS) 471bffed0e9SIan Lepore val32 = sc->cmd_and_mode; 472a9387eb1SOleksandr Tymoshenko else 473a9387eb1SOleksandr Tymoshenko val32 = RD4(sc, off & ~3); 474901491d0SBjoern A. Zeeb 475a9387eb1SOleksandr Tymoshenko val32 &= ~(0xffff << (off & 3)*8); 476a9387eb1SOleksandr Tymoshenko val32 |= (val << (off & 3)*8); 477901491d0SBjoern A. Zeeb 478a9387eb1SOleksandr Tymoshenko if (off == SDHCI_TRANSFER_MODE) 479bffed0e9SIan Lepore sc->cmd_and_mode = val32; 480901491d0SBjoern A. Zeeb else if (off == SDHCI_BLOCK_SIZE || off == SDHCI_BLOCK_COUNT) { 481901491d0SBjoern A. Zeeb sc->blksz_and_count = val32; 482901491d0SBjoern A. Zeeb sc->need_update_blk = true; 483901491d0SBjoern A. Zeeb } else { 484901491d0SBjoern A. Zeeb if (off == SDHCI_COMMAND_FLAGS) { 485901491d0SBjoern A. Zeeb /* If we saved blk writes, do them now before cmd. */ 486901491d0SBjoern A. Zeeb if (sc->need_update_blk) { 487901491d0SBjoern A. Zeeb WR4(sc, SDHCI_BLOCK_SIZE, sc->blksz_and_count); 488901491d0SBjoern A. Zeeb sc->need_update_blk = false; 489901491d0SBjoern A. Zeeb } 490901491d0SBjoern A. Zeeb /* Always save cmd and mode registers. */ 49186ee58d9SIan Lepore sc->cmd_and_mode = val32; 49286ee58d9SIan Lepore } 493901491d0SBjoern A. Zeeb WR4(sc, off & ~3, val32); 494901491d0SBjoern A. Zeeb } 495a9387eb1SOleksandr Tymoshenko } 496a9387eb1SOleksandr Tymoshenko 497a9387eb1SOleksandr Tymoshenko static void 498a9387eb1SOleksandr Tymoshenko bcm_sdhci_write_4(device_t dev, struct sdhci_slot *slot, bus_size_t off, uint32_t val) 499a9387eb1SOleksandr Tymoshenko { 500a9387eb1SOleksandr Tymoshenko struct bcm_sdhci_softc *sc = device_get_softc(dev); 501a9387eb1SOleksandr Tymoshenko WR4(sc, off, val); 502a9387eb1SOleksandr Tymoshenko } 503a9387eb1SOleksandr Tymoshenko 504a9387eb1SOleksandr Tymoshenko static void 505a9387eb1SOleksandr Tymoshenko bcm_sdhci_write_multi_4(device_t dev, struct sdhci_slot *slot, bus_size_t off, 506a9387eb1SOleksandr Tymoshenko uint32_t *data, bus_size_t count) 507a9387eb1SOleksandr Tymoshenko { 508a9387eb1SOleksandr Tymoshenko struct bcm_sdhci_softc *sc = device_get_softc(dev); 509a9387eb1SOleksandr Tymoshenko 510a9387eb1SOleksandr Tymoshenko bus_space_write_multi_4(sc->sc_bst, sc->sc_bsh, off, data, count); 511a9387eb1SOleksandr Tymoshenko } 512a9387eb1SOleksandr Tymoshenko 513adc99a8aSOleksandr Tymoshenko static void 514244fe94fSIan Lepore bcm_sdhci_start_dma_seg(struct bcm_sdhci_softc *sc) 515244fe94fSIan Lepore { 516244fe94fSIan Lepore struct sdhci_slot *slot; 517244fe94fSIan Lepore vm_paddr_t pdst, psrc; 518939f1d8fSKyle Evans int err, idx, len, sync_op, width; 519244fe94fSIan Lepore 520244fe94fSIan Lepore slot = &sc->sc_slot; 521244fe94fSIan Lepore idx = sc->dmamap_seg_index++; 522244fe94fSIan Lepore len = sc->dmamap_seg_sizes[idx]; 523244fe94fSIan Lepore slot->offset += len; 524939f1d8fSKyle Evans width = (len & 0xf ? BCM_DMA_32BIT : BCM_DMA_128BIT); 525244fe94fSIan Lepore 526244fe94fSIan Lepore if (slot->curcmd->data->flags & MMC_DATA_READ) { 527244fe94fSIan Lepore bcm_dma_setup_src(sc->sc_dma_ch, BCM_DMA_DREQ_EMMC, 528244fe94fSIan Lepore BCM_DMA_SAME_ADDR, BCM_DMA_32BIT); 529244fe94fSIan Lepore bcm_dma_setup_dst(sc->sc_dma_ch, BCM_DMA_DREQ_NONE, 530939f1d8fSKyle Evans BCM_DMA_INC_ADDR, width); 531244fe94fSIan Lepore psrc = sc->sc_sdhci_buffer_phys; 532244fe94fSIan Lepore pdst = sc->dmamap_seg_addrs[idx]; 533244fe94fSIan Lepore sync_op = BUS_DMASYNC_PREREAD; 534244fe94fSIan Lepore } else { 535244fe94fSIan Lepore bcm_dma_setup_src(sc->sc_dma_ch, BCM_DMA_DREQ_NONE, 536939f1d8fSKyle Evans BCM_DMA_INC_ADDR, width); 537244fe94fSIan Lepore bcm_dma_setup_dst(sc->sc_dma_ch, BCM_DMA_DREQ_EMMC, 538244fe94fSIan Lepore BCM_DMA_SAME_ADDR, BCM_DMA_32BIT); 539244fe94fSIan Lepore psrc = sc->dmamap_seg_addrs[idx]; 540244fe94fSIan Lepore pdst = sc->sc_sdhci_buffer_phys; 541244fe94fSIan Lepore sync_op = BUS_DMASYNC_PREWRITE; 542244fe94fSIan Lepore } 543244fe94fSIan Lepore 544244fe94fSIan Lepore /* 545244fe94fSIan Lepore * When starting a new DMA operation do the busdma sync operation, and 546244fe94fSIan Lepore * disable SDCHI data interrrupts because we'll be driven by DMA 547244fe94fSIan Lepore * interrupts (or SDHCI error interrupts) until the IO is done. 548244fe94fSIan Lepore */ 549244fe94fSIan Lepore if (idx == 0) { 550244fe94fSIan Lepore bus_dmamap_sync(sc->sc_dma_tag, sc->sc_dma_map, sync_op); 551244fe94fSIan Lepore slot->intmask &= ~(SDHCI_INT_DATA_AVAIL | 552*c22f8ca6SKyle Evans SDHCI_INT_SPACE_AVAIL); 553244fe94fSIan Lepore bcm_sdhci_write_4(sc->sc_dev, &sc->sc_slot, SDHCI_SIGNAL_ENABLE, 554244fe94fSIan Lepore slot->intmask); 555244fe94fSIan Lepore } 556244fe94fSIan Lepore 557244fe94fSIan Lepore /* 558244fe94fSIan Lepore * Start the DMA transfer. Only programming errors (like failing to 559244fe94fSIan Lepore * allocate a channel) cause a non-zero return from bcm_dma_start(). 560244fe94fSIan Lepore */ 561244fe94fSIan Lepore err = bcm_dma_start(sc->sc_dma_ch, psrc, pdst, len); 562244fe94fSIan Lepore KASSERT((err == 0), ("bcm2835_sdhci: failed DMA start")); 563244fe94fSIan Lepore } 564244fe94fSIan Lepore 565244fe94fSIan Lepore static void 566adc99a8aSOleksandr Tymoshenko bcm_sdhci_dma_intr(int ch, void *arg) 567adc99a8aSOleksandr Tymoshenko { 568adc99a8aSOleksandr Tymoshenko struct bcm_sdhci_softc *sc = (struct bcm_sdhci_softc *)arg; 569adc99a8aSOleksandr Tymoshenko struct sdhci_slot *slot = &sc->sc_slot; 570adc99a8aSOleksandr Tymoshenko uint32_t reg, mask; 571b479b38cSIan Lepore int left, sync_op; 572adc99a8aSOleksandr Tymoshenko 573adc99a8aSOleksandr Tymoshenko mtx_lock(&slot->mtx); 574adc99a8aSOleksandr Tymoshenko 575da30babaSKyle Evans if (slot->curcmd == NULL) { 576da30babaSKyle Evans mtx_unlock(&slot->mtx); 577da30babaSKyle Evans return; 578da30babaSKyle Evans } 579da30babaSKyle Evans 580244fe94fSIan Lepore /* 581244fe94fSIan Lepore * If there are more segments for the current dma, start the next one. 582244fe94fSIan Lepore * Otherwise unload the dma map and decide what to do next based on the 583244fe94fSIan Lepore * status of the sdhci controller and whether there's more data left. 584244fe94fSIan Lepore */ 585244fe94fSIan Lepore if (sc->dmamap_seg_index < sc->dmamap_seg_count) { 586244fe94fSIan Lepore bcm_sdhci_start_dma_seg(sc); 587244fe94fSIan Lepore mtx_unlock(&slot->mtx); 588244fe94fSIan Lepore return; 589244fe94fSIan Lepore } 590244fe94fSIan Lepore 591adc99a8aSOleksandr Tymoshenko if (slot->curcmd->data->flags & MMC_DATA_READ) { 592b479b38cSIan Lepore sync_op = BUS_DMASYNC_POSTREAD; 593adc99a8aSOleksandr Tymoshenko mask = SDHCI_INT_DATA_AVAIL; 594adc99a8aSOleksandr Tymoshenko } else { 595b479b38cSIan Lepore sync_op = BUS_DMASYNC_POSTWRITE; 596adc99a8aSOleksandr Tymoshenko mask = SDHCI_INT_SPACE_AVAIL; 597adc99a8aSOleksandr Tymoshenko } 598*c22f8ca6SKyle Evans 599*c22f8ca6SKyle Evans if (sc->dmamap_seg_count != 0) { 600b479b38cSIan Lepore bus_dmamap_sync(sc->sc_dma_tag, sc->sc_dma_map, sync_op); 601b479b38cSIan Lepore bus_dmamap_unload(sc->sc_dma_tag, sc->sc_dma_map); 602adc99a8aSOleksandr Tymoshenko 603244fe94fSIan Lepore sc->dmamap_seg_count = 0; 604244fe94fSIan Lepore sc->dmamap_seg_index = 0; 605*c22f8ca6SKyle Evans } 606adc99a8aSOleksandr Tymoshenko 607adc99a8aSOleksandr Tymoshenko left = min(BCM_SDHCI_BUFFER_SIZE, 608adc99a8aSOleksandr Tymoshenko slot->curcmd->data->len - slot->offset); 609adc99a8aSOleksandr Tymoshenko 6109c907eb9SBjoern A. Zeeb /* 6119c907eb9SBjoern A. Zeeb * If there is less than buffer size outstanding, we would not handle 6129c907eb9SBjoern A. Zeeb * it anymore using DMA if bcm_sdhci_will_handle_transfer() were asked. 6139c907eb9SBjoern A. Zeeb * Re-enable interrupts and return and let the SDHCI state machine 6149c907eb9SBjoern A. Zeeb * finish the job. 6159c907eb9SBjoern A. Zeeb */ 6169c907eb9SBjoern A. Zeeb if (left < BCM_SDHCI_BUFFER_SIZE) { 6179c907eb9SBjoern A. Zeeb /* Re-enable data interrupts. */ 618*c22f8ca6SKyle Evans slot->intmask |= SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL; 6199c907eb9SBjoern A. Zeeb bcm_sdhci_write_4(slot->bus, slot, SDHCI_SIGNAL_ENABLE, 6209c907eb9SBjoern A. Zeeb slot->intmask); 6219c907eb9SBjoern A. Zeeb mtx_unlock(&slot->mtx); 6229c907eb9SBjoern A. Zeeb return; 6239c907eb9SBjoern A. Zeeb } 6249c907eb9SBjoern A. Zeeb 625adc99a8aSOleksandr Tymoshenko reg = bcm_sdhci_read_4(slot->bus, slot, SDHCI_INT_STATUS); 626adc99a8aSOleksandr Tymoshenko 627adc99a8aSOleksandr Tymoshenko /* already available? */ 628adc99a8aSOleksandr Tymoshenko if (reg & mask) { 629adc99a8aSOleksandr Tymoshenko 630adc99a8aSOleksandr Tymoshenko /* ACK for DATA_AVAIL or SPACE_AVAIL */ 631adc99a8aSOleksandr Tymoshenko bcm_sdhci_write_4(slot->bus, slot, 632adc99a8aSOleksandr Tymoshenko SDHCI_INT_STATUS, mask); 633adc99a8aSOleksandr Tymoshenko 634adc99a8aSOleksandr Tymoshenko /* continue next DMA transfer */ 635bf160401SIan Lepore if (bus_dmamap_load(sc->sc_dma_tag, sc->sc_dma_map, 636b479b38cSIan Lepore (uint8_t *)slot->curcmd->data->data + 637bf160401SIan Lepore slot->offset, left, bcm_sdhci_dmacb, sc, 638bf160401SIan Lepore BUS_DMA_NOWAIT) != 0 || sc->dmamap_status != 0) { 639bf160401SIan Lepore slot->curcmd->error = MMC_ERR_NO_MEMORY; 640bf160401SIan Lepore sdhci_finish_data(slot); 641bf160401SIan Lepore } else { 642244fe94fSIan Lepore bcm_sdhci_start_dma_seg(sc); 643adc99a8aSOleksandr Tymoshenko } 644adc99a8aSOleksandr Tymoshenko } else { 645adc99a8aSOleksandr Tymoshenko /* wait for next data by INT */ 646adc99a8aSOleksandr Tymoshenko 647adc99a8aSOleksandr Tymoshenko /* enable INT */ 648adc99a8aSOleksandr Tymoshenko slot->intmask |= SDHCI_INT_DATA_AVAIL | 649*c22f8ca6SKyle Evans SDHCI_INT_SPACE_AVAIL; 650adc99a8aSOleksandr Tymoshenko bcm_sdhci_write_4(slot->bus, slot, SDHCI_SIGNAL_ENABLE, 651adc99a8aSOleksandr Tymoshenko slot->intmask); 652adc99a8aSOleksandr Tymoshenko } 653adc99a8aSOleksandr Tymoshenko 654adc99a8aSOleksandr Tymoshenko mtx_unlock(&slot->mtx); 655adc99a8aSOleksandr Tymoshenko } 656adc99a8aSOleksandr Tymoshenko 657adc99a8aSOleksandr Tymoshenko static void 658bf160401SIan Lepore bcm_sdhci_read_dma(device_t dev, struct sdhci_slot *slot) 659adc99a8aSOleksandr Tymoshenko { 660adc99a8aSOleksandr Tymoshenko struct bcm_sdhci_softc *sc = device_get_softc(slot->bus); 661adc99a8aSOleksandr Tymoshenko size_t left; 662adc99a8aSOleksandr Tymoshenko 663*c22f8ca6SKyle Evans /* XXX TODO: Not many-segment safe */ 664244fe94fSIan Lepore if (sc->dmamap_seg_count != 0) { 665adc99a8aSOleksandr Tymoshenko device_printf(sc->sc_dev, "DMA in use\n"); 666adc99a8aSOleksandr Tymoshenko return; 667adc99a8aSOleksandr Tymoshenko } 668adc99a8aSOleksandr Tymoshenko 669adc99a8aSOleksandr Tymoshenko left = min(BCM_SDHCI_BUFFER_SIZE, 670adc99a8aSOleksandr Tymoshenko slot->curcmd->data->len - slot->offset); 671adc99a8aSOleksandr Tymoshenko 672adc99a8aSOleksandr Tymoshenko KASSERT((left & 3) == 0, 6738ff1636cSOleksandr Tymoshenko ("%s: len = %zu, not word-aligned", __func__, left)); 674adc99a8aSOleksandr Tymoshenko 675bf160401SIan Lepore if (bus_dmamap_load(sc->sc_dma_tag, sc->sc_dma_map, 676bf160401SIan Lepore (uint8_t *)slot->curcmd->data->data + slot->offset, left, 677bf160401SIan Lepore bcm_sdhci_dmacb, sc, BUS_DMA_NOWAIT) != 0 || 678bf160401SIan Lepore sc->dmamap_status != 0) { 679bf160401SIan Lepore slot->curcmd->error = MMC_ERR_NO_MEMORY; 680bf160401SIan Lepore return; 681bf160401SIan Lepore } 682bf160401SIan Lepore 683adc99a8aSOleksandr Tymoshenko /* DMA start */ 684244fe94fSIan Lepore bcm_sdhci_start_dma_seg(sc); 685adc99a8aSOleksandr Tymoshenko } 686adc99a8aSOleksandr Tymoshenko 687adc99a8aSOleksandr Tymoshenko static void 688bf160401SIan Lepore bcm_sdhci_write_dma(device_t dev, struct sdhci_slot *slot) 689adc99a8aSOleksandr Tymoshenko { 690adc99a8aSOleksandr Tymoshenko struct bcm_sdhci_softc *sc = device_get_softc(slot->bus); 691adc99a8aSOleksandr Tymoshenko size_t left; 692adc99a8aSOleksandr Tymoshenko 693*c22f8ca6SKyle Evans /* XXX TODO: Not many-segment safe */ 694244fe94fSIan Lepore if (sc->dmamap_seg_count != 0) { 695adc99a8aSOleksandr Tymoshenko device_printf(sc->sc_dev, "DMA in use\n"); 696adc99a8aSOleksandr Tymoshenko return; 697adc99a8aSOleksandr Tymoshenko } 698adc99a8aSOleksandr Tymoshenko 699adc99a8aSOleksandr Tymoshenko left = min(BCM_SDHCI_BUFFER_SIZE, 700adc99a8aSOleksandr Tymoshenko slot->curcmd->data->len - slot->offset); 701adc99a8aSOleksandr Tymoshenko 702adc99a8aSOleksandr Tymoshenko KASSERT((left & 3) == 0, 7038ff1636cSOleksandr Tymoshenko ("%s: len = %zu, not word-aligned", __func__, left)); 704adc99a8aSOleksandr Tymoshenko 705bf160401SIan Lepore if (bus_dmamap_load(sc->sc_dma_tag, sc->sc_dma_map, 706b479b38cSIan Lepore (uint8_t *)slot->curcmd->data->data + slot->offset, left, 707bf160401SIan Lepore bcm_sdhci_dmacb, sc, BUS_DMA_NOWAIT) != 0 || 708bf160401SIan Lepore sc->dmamap_status != 0) { 709bf160401SIan Lepore slot->curcmd->error = MMC_ERR_NO_MEMORY; 710bf160401SIan Lepore return; 711bf160401SIan Lepore } 712adc99a8aSOleksandr Tymoshenko 713adc99a8aSOleksandr Tymoshenko /* DMA start */ 714244fe94fSIan Lepore bcm_sdhci_start_dma_seg(sc); 715adc99a8aSOleksandr Tymoshenko } 716adc99a8aSOleksandr Tymoshenko 717adc99a8aSOleksandr Tymoshenko static int 718adc99a8aSOleksandr Tymoshenko bcm_sdhci_will_handle_transfer(device_t dev, struct sdhci_slot *slot) 719adc99a8aSOleksandr Tymoshenko { 720939f1d8fSKyle Evans struct bcm_sdhci_softc *sc = device_get_softc(slot->bus); 721adc99a8aSOleksandr Tymoshenko size_t left; 722adc99a8aSOleksandr Tymoshenko 723939f1d8fSKyle Evans if (!sc->conf->use_dma) 724939f1d8fSKyle Evans return (0); 725939f1d8fSKyle Evans 726b479b38cSIan Lepore /* 727b479b38cSIan Lepore * Do not use DMA for transfers less than block size or with a length 728b479b38cSIan Lepore * that is not a multiple of four. 729b479b38cSIan Lepore */ 730adc99a8aSOleksandr Tymoshenko left = min(BCM_DMA_BLOCK_SIZE, 731adc99a8aSOleksandr Tymoshenko slot->curcmd->data->len - slot->offset); 732adc99a8aSOleksandr Tymoshenko if (left < BCM_DMA_BLOCK_SIZE) 733adc99a8aSOleksandr Tymoshenko return (0); 734b479b38cSIan Lepore if (left & 0x03) 735b479b38cSIan Lepore return (0); 736adc99a8aSOleksandr Tymoshenko 737adc99a8aSOleksandr Tymoshenko return (1); 738adc99a8aSOleksandr Tymoshenko } 739adc99a8aSOleksandr Tymoshenko 740adc99a8aSOleksandr Tymoshenko static void 741adc99a8aSOleksandr Tymoshenko bcm_sdhci_start_transfer(device_t dev, struct sdhci_slot *slot, 742adc99a8aSOleksandr Tymoshenko uint32_t *intmask) 743adc99a8aSOleksandr Tymoshenko { 744adc99a8aSOleksandr Tymoshenko 745adc99a8aSOleksandr Tymoshenko /* DMA transfer FIFO 1KB */ 746adc99a8aSOleksandr Tymoshenko if (slot->curcmd->data->flags & MMC_DATA_READ) 747bf160401SIan Lepore bcm_sdhci_read_dma(dev, slot); 748adc99a8aSOleksandr Tymoshenko else 749bf160401SIan Lepore bcm_sdhci_write_dma(dev, slot); 750adc99a8aSOleksandr Tymoshenko } 751adc99a8aSOleksandr Tymoshenko 752adc99a8aSOleksandr Tymoshenko static void 753adc99a8aSOleksandr Tymoshenko bcm_sdhci_finish_transfer(device_t dev, struct sdhci_slot *slot) 754adc99a8aSOleksandr Tymoshenko { 755*c22f8ca6SKyle Evans struct bcm_sdhci_softc *sc = device_get_softc(slot->bus); 756adc99a8aSOleksandr Tymoshenko 757*c22f8ca6SKyle Evans /* Clean up */ 758*c22f8ca6SKyle Evans if (sc->dmamap_seg_count != 0) { 759*c22f8ca6SKyle Evans if (slot->curcmd->data->flags & MMC_DATA_READ) 760*c22f8ca6SKyle Evans bus_dmamap_sync(sc->sc_dma_tag, sc->sc_dma_map, 761*c22f8ca6SKyle Evans BUS_DMASYNC_POSTREAD); 762*c22f8ca6SKyle Evans else 763*c22f8ca6SKyle Evans bus_dmamap_sync(sc->sc_dma_tag, sc->sc_dma_map, 764*c22f8ca6SKyle Evans BUS_DMASYNC_POSTWRITE); 765*c22f8ca6SKyle Evans bus_dmamap_unload(sc->sc_dma_tag, sc->sc_dma_map); 766*c22f8ca6SKyle Evans 767*c22f8ca6SKyle Evans sc->dmamap_seg_count = 0; 768*c22f8ca6SKyle Evans sc->dmamap_seg_index = 0; 769*c22f8ca6SKyle Evans 770*c22f8ca6SKyle Evans slot->intmask |= SDHCI_INT_DATA_AVAIL | 771*c22f8ca6SKyle Evans SDHCI_INT_SPACE_AVAIL; 772*c22f8ca6SKyle Evans bcm_sdhci_write_4(slot->bus, slot, SDHCI_SIGNAL_ENABLE, 773*c22f8ca6SKyle Evans slot->intmask); 774*c22f8ca6SKyle Evans } else { 775*c22f8ca6SKyle Evans KASSERT((slot->intmask & SDHCI_INT_DATA_AVAIL) != 0 && 776*c22f8ca6SKyle Evans (slot->intmask & SDHCI_INT_SPACE_AVAIL) != 0, 777*c22f8ca6SKyle Evans ("%s: interrupt mask not restored", __func__)); 778*c22f8ca6SKyle Evans } 779adc99a8aSOleksandr Tymoshenko sdhci_finish_data(slot); 780adc99a8aSOleksandr Tymoshenko } 781adc99a8aSOleksandr Tymoshenko 782a9387eb1SOleksandr Tymoshenko static device_method_t bcm_sdhci_methods[] = { 783a9387eb1SOleksandr Tymoshenko /* Device interface */ 784a9387eb1SOleksandr Tymoshenko DEVMETHOD(device_probe, bcm_sdhci_probe), 785a9387eb1SOleksandr Tymoshenko DEVMETHOD(device_attach, bcm_sdhci_attach), 786a9387eb1SOleksandr Tymoshenko DEVMETHOD(device_detach, bcm_sdhci_detach), 787a9387eb1SOleksandr Tymoshenko 788a9387eb1SOleksandr Tymoshenko /* Bus interface */ 789a9387eb1SOleksandr Tymoshenko DEVMETHOD(bus_read_ivar, sdhci_generic_read_ivar), 790a9387eb1SOleksandr Tymoshenko DEVMETHOD(bus_write_ivar, sdhci_generic_write_ivar), 79104223932SBjoern A. Zeeb DEVMETHOD(bus_add_child, bus_generic_add_child), 792a9387eb1SOleksandr Tymoshenko 793a9387eb1SOleksandr Tymoshenko /* MMC bridge interface */ 794a9387eb1SOleksandr Tymoshenko DEVMETHOD(mmcbr_update_ios, sdhci_generic_update_ios), 795a9387eb1SOleksandr Tymoshenko DEVMETHOD(mmcbr_request, sdhci_generic_request), 796a9387eb1SOleksandr Tymoshenko DEVMETHOD(mmcbr_get_ro, bcm_sdhci_get_ro), 797a9387eb1SOleksandr Tymoshenko DEVMETHOD(mmcbr_acquire_host, sdhci_generic_acquire_host), 798a9387eb1SOleksandr Tymoshenko DEVMETHOD(mmcbr_release_host, sdhci_generic_release_host), 799a9387eb1SOleksandr Tymoshenko 800adc99a8aSOleksandr Tymoshenko /* Platform transfer methods */ 801adc99a8aSOleksandr Tymoshenko DEVMETHOD(sdhci_platform_will_handle, bcm_sdhci_will_handle_transfer), 802adc99a8aSOleksandr Tymoshenko DEVMETHOD(sdhci_platform_start_transfer, bcm_sdhci_start_transfer), 803adc99a8aSOleksandr Tymoshenko DEVMETHOD(sdhci_platform_finish_transfer, bcm_sdhci_finish_transfer), 804adc99a8aSOleksandr Tymoshenko /* SDHCI registers accessors */ 805a9387eb1SOleksandr Tymoshenko DEVMETHOD(sdhci_read_1, bcm_sdhci_read_1), 806a9387eb1SOleksandr Tymoshenko DEVMETHOD(sdhci_read_2, bcm_sdhci_read_2), 807a9387eb1SOleksandr Tymoshenko DEVMETHOD(sdhci_read_4, bcm_sdhci_read_4), 808a9387eb1SOleksandr Tymoshenko DEVMETHOD(sdhci_read_multi_4, bcm_sdhci_read_multi_4), 809a9387eb1SOleksandr Tymoshenko DEVMETHOD(sdhci_write_1, bcm_sdhci_write_1), 810a9387eb1SOleksandr Tymoshenko DEVMETHOD(sdhci_write_2, bcm_sdhci_write_2), 811a9387eb1SOleksandr Tymoshenko DEVMETHOD(sdhci_write_4, bcm_sdhci_write_4), 812a9387eb1SOleksandr Tymoshenko DEVMETHOD(sdhci_write_multi_4, bcm_sdhci_write_multi_4), 813a9387eb1SOleksandr Tymoshenko 814b440e965SMarius Strobl DEVMETHOD_END 815a9387eb1SOleksandr Tymoshenko }; 816a9387eb1SOleksandr Tymoshenko 817a9387eb1SOleksandr Tymoshenko static devclass_t bcm_sdhci_devclass; 818a9387eb1SOleksandr Tymoshenko 819a9387eb1SOleksandr Tymoshenko static driver_t bcm_sdhci_driver = { 820a9387eb1SOleksandr Tymoshenko "sdhci_bcm", 821a9387eb1SOleksandr Tymoshenko bcm_sdhci_methods, 822a9387eb1SOleksandr Tymoshenko sizeof(struct bcm_sdhci_softc), 823a9387eb1SOleksandr Tymoshenko }; 824a9387eb1SOleksandr Tymoshenko 825b440e965SMarius Strobl DRIVER_MODULE(sdhci_bcm, simplebus, bcm_sdhci_driver, bcm_sdhci_devclass, 826b440e965SMarius Strobl NULL, NULL); 827939f1d8fSKyle Evans #ifdef NOTYET 828939f1d8fSKyle Evans MODULE_DEPEND(sdhci_bcm, bcm2835_clkman, 1, 1, 1); 829939f1d8fSKyle Evans #endif 830ab00a509SMarius Strobl SDHCI_DEPEND(sdhci_bcm); 83102c474b4SIlya Bakulin #ifndef MMCCAM 83255dae242SMarius Strobl MMC_DECLARE_BRIDGE(sdhci_bcm); 83302c474b4SIlya Bakulin #endif 834